JPS6331550U - - Google Patents
Info
- Publication number
- JPS6331550U JPS6331550U JP1986125599U JP12559986U JPS6331550U JP S6331550 U JPS6331550 U JP S6331550U JP 1986125599 U JP1986125599 U JP 1986125599U JP 12559986 U JP12559986 U JP 12559986U JP S6331550 U JPS6331550 U JP S6331550U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- light
- line sensor
- substrate
- receiving elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 4
- 239000010409 thin film Substances 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Facsimile Heads (AREA)
Description
第1図、第2図および第3図は本考案実施例で
作成したラインセンサーの概略を示す断面図、一
部切りかき部を含む側面図および平面図であり、
第4図および第5図は従来のラインセンサーの概
略を示す断面図および平面図である。
FIGS. 1, 2, and 3 are a cross-sectional view, a side view including a partially cut portion, and a plan view schematically showing a line sensor made according to an embodiment of the present invention,
FIGS. 4 and 5 are a cross-sectional view and a plan view schematically showing a conventional line sensor.
Claims (1)
受光素子の情報を読み取る集積回路が同一基板上
に設けられたラインセンサーにおいて、該直線状
受光素子を基板の端面に設けると共に該集積回路
を基板の上面に設けたことを特徴とするラインセ
ンサー。 (2) 集積回路から受光素子への接続が基板上に
設けられた薄膜電極を用いて行なわれている実用
新案登録請求の範囲第1項記載のラインセンサー
。[Claims for Utility Model Registration] (1) In a line sensor in which linear thin-film semiconductor light-receiving elements and an integrated circuit for reading information from the light-receiving elements are provided on the same substrate, the linear light-receiving elements are arranged on the same substrate. A line sensor characterized in that the integrated circuit is provided on an end surface and the integrated circuit is provided on an upper surface of a substrate. (2) The line sensor according to claim 1, wherein the integrated circuit is connected to the light receiving element using a thin film electrode provided on the substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986125599U JPS6331550U (en) | 1986-08-18 | 1986-08-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986125599U JPS6331550U (en) | 1986-08-18 | 1986-08-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6331550U true JPS6331550U (en) | 1988-03-01 |
Family
ID=31018633
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986125599U Pending JPS6331550U (en) | 1986-08-18 | 1986-08-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6331550U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5648183A (en) * | 1979-09-26 | 1981-05-01 | Ricoh Co Ltd | Photosensor |
JPS60119165A (en) * | 1983-12-01 | 1985-06-26 | Ricoh Co Ltd | Production of one-dimensional image sensor |
-
1986
- 1986-08-18 JP JP1986125599U patent/JPS6331550U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5648183A (en) * | 1979-09-26 | 1981-05-01 | Ricoh Co Ltd | Photosensor |
JPS60119165A (en) * | 1983-12-01 | 1985-06-26 | Ricoh Co Ltd | Production of one-dimensional image sensor |
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