JPS61156758A - High voltage rectifier - Google Patents
High voltage rectifierInfo
- Publication number
- JPS61156758A JPS61156758A JP27458484A JP27458484A JPS61156758A JP S61156758 A JPS61156758 A JP S61156758A JP 27458484 A JP27458484 A JP 27458484A JP 27458484 A JP27458484 A JP 27458484A JP S61156758 A JPS61156758 A JP S61156758A
- Authority
- JP
- Japan
- Prior art keywords
- lead wires
- diodes
- high voltage
- workability
- voltage rectifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/115—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Rectifiers (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、各種の民生機器、産業機器などに使用される
高圧発生装置の高圧整流装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a high-voltage rectifier for a high-voltage generator used in various consumer devices, industrial devices, and the like.
（従来の技術）
従来、この種の高圧発生装置は、例えば実開昭５９−６
７９１２号公報に示されているように、第７図のような
構成になっていた。(Prior art) Conventionally, this type of high-pressure generator has been developed, for example, in
As shown in Japanese Patent No. 7912, the configuration was as shown in FIG.
すなわち、第８図に示す回路構成のものが、配線・９タ
ーンが形成されたプリント基板８上に各部品を実装して
構成され、高圧を整流するようになっている。That is, the circuit configuration shown in FIG. 8 is constructed by mounting each component on a printed circuit board 8 on which wiring and nine turns are formed, and rectifies high voltage.
（発明が解決しようとする問題点）
このような従来の構成では、プリント基板８にダイオー
ド１ａ〜ｌｃ、コンデンサ２ａ 、２ｂを半田付する作
業に工数がかかり、又トンネル半田や、接近箔との短絡
等の品質トラブルが発生する。(Problems to be Solved by the Invention) In such a conventional configuration, it takes a lot of man-hours to solder the diodes 1a to lc and capacitors 2a and 2b to the printed circuit board 8, and also requires tunnel soldering and contact with adjacent foils. Quality problems such as short circuits occur.
又、構成上プリント基板８を使用するので部品点数が増
加し、さらに形状的に大きくなる問題点を有していた。Further, since the printed circuit board 8 is used in the structure, the number of parts increases, and the shape also becomes larger.
本発明は、前記の問題点を解決するもので、大幅な信頼
性の向上、作業性の向上を目的とするものである。The present invention solves the above-mentioned problems, and aims to significantly improve reliability and workability.
（問題点を解決するだめの手段）
この問題点を解決するために本発明は、複数のダイオー
ドのリード線を用いてコンデンサを保持固定し、整流回
路を構成するものである。(Means for solving the problem) In order to solve this problem, the present invention uses lead wires of a plurality of diodes to hold and fix a capacitor to form a rectifier circuit.
（作用）
この構成により、回路組立工程での作業トラブルや不良
の発生がなくなり１作業性の向上、品質向上、部品点数
の削減によるコストダウンが達成される。(Function) This configuration eliminates work troubles and defects in the circuit assembly process, and improves workability, improves quality, and reduces costs by reducing the number of parts.
（実施例）
以下、本発明の一実施例を添付図面にもとづいて説明す
る。(Example) Hereinafter, an example of the present invention will be described based on the accompanying drawings.
第１図において、ｌａ、ｌｂ、ｌｃはダイオードで、こ
のダイオードのリード線４ｍ、４ｂ及び４ｃ 、４ｄを
それぞれフォーミングし、コンデンサチップ２ａ 、２
ｂを挾むようにして電極３ａ。In FIG. 1, la, lb, and lc are diodes, and lead wires 4m, 4b, 4c, and 4d of these diodes are formed, respectively, and capacitor chips 2a, 2
The electrodes 3a sandwich b.
３ｂに接合する。この場合、リード線の７オーミングは
、第２図のようにコンデンサチップ２ａのセンターに位
置し、かつ第３図のように保持面を広くすることで、安
定した保持性を得るようにする。又、このフォーミング
は弾性をもたせてコンデンサチップを挾持した状態で、
第６図のように半田ディップし、電極面への半田付を行
ない接続する。以上のようにして組立てられた整流装置
を単品、あるいはトランスと一体に樹脂注型して使用す
ることにより、より小型になるとともに整流部の信頼性
の向上、作業性の向上を図ることができる。Join to 3b. In this case, the 7-ohm lead wire is located at the center of the capacitor chip 2a as shown in FIG. 2, and the holding surface is widened as shown in FIG. 3 to ensure stable holding. In addition, this forming has elasticity and holds the capacitor chip in place.
As shown in FIG. 6, dip the electrode in solder and solder it to the electrode surface to connect. By using the rectifier assembled in the above manner singly or integrally with a transformer by resin casting, it is possible to make the rectifier smaller, improve the reliability of the rectifier, and improve workability. .
また、ダイオードｌ ａ 、１ ｂ ＋・・・１ｎを、
予め第４図、第５図に示すように、接着剤７あるいは絶
縁ざ−ド６を用いて固定するようにすれば、第９図に示
す多倍圧構成にも本発明を応用することが可能で、半田
付不良率は大幅に低減する。In addition, the diodes la, 1b +...1n,
As shown in FIGS. 4 and 5, the present invention can also be applied to the multi-pressure configuration shown in FIG. possible, and the soldering defect rate is significantly reduced.
（発明の効果）
以上のように本発明によれば、部品点数を削減し、しか
も作業性の向上及び、信頼性の向上を図ることが出来る
。(Effects of the Invention) As described above, according to the present invention, the number of parts can be reduced, and workability and reliability can be improved.
第１図は、本発明の一実施例による高圧整流装置を示す
斜視図、第２図は、リード線フォーミングを側面よりみ
た図、第３図は、同す−ド線フォーミ／グのコンデンサ
の保持部を示す図、第４図、第５図は、それぞれダイオ
ードの固定方法を示す図、第６図は、半田ディップによ
るリード線とコンデンサの接続を示す図、第７図は、従
来の整流装置部の構成図、第８図は整流回路図、第９図
は、多倍圧整流回路図である。
１ａ、１ｂ、ＩＣ・・・ダイオード、２ ａ ｍ ２
ｂ ・”コンデンサチップ、３ａ、３ｂ・・・コンデン
サチップの電極部、４ａ 、４ｂ 、４ｃ 、４ｄ・・
・ダイオードのリード線。
第１図
等２図
Ａコ
第３図
第４図
第５図
第６図
π７フ
第７図
（ａ）
（ｂ）
品分４；＝シ無≧らFig. 1 is a perspective view showing a high voltage rectifier according to an embodiment of the present invention, Fig. 2 is a side view of lead wire forming, and Fig. 3 shows a capacitor of the same lead wire forming. Figures 4 and 5 show the holding part, Figures 4 and 5 respectively show how to fix the diode, Figure 6 shows the connection of the lead wire and capacitor by solder dip, and Figure 7 shows the conventional rectifier. FIG. 8 is a diagram of the configuration of the device section, FIG. 8 is a rectifier circuit diagram, and FIG. 9 is a multi-voltage rectifier circuit diagram. 1a, 1b, IC...diode, 2 a m 2
b・”Capacitor chip, 3a, 3b... Electrode part of capacitor chip, 4a, 4b, 4c, 4d...
・Diode lead wire. Figure 1 etc. 2 Figure A Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 π7F Figure 7 (a) (b) Item 4;
Claims (1)
る高圧発生装置の高圧整流装置において、前記複数のダ
イオードのリード線のみを使用して所要の配線をすると
ともに、フォーミングした前記リード線で前記コンデン
サを挾持、接合してなることを特徴とする高圧整流装置
。In a high voltage rectifier of a high voltage generator incorporating a plurality of diodes and a plurality of capacitors, performing necessary wiring using only the lead wires of the plurality of diodes, and sandwiching the capacitor with the formed lead wires, A high-voltage rectifier characterized by being made by joining.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27458484A JPS61156758A (en) | 1984-12-28 | 1984-12-28 | High voltage rectifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27458484A JPS61156758A (en) | 1984-12-28 | 1984-12-28 | High voltage rectifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61156758A true JPS61156758A (en) | 1986-07-16 |
Family
ID=17543778
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27458484A Pending JPS61156758A (en) | 1984-12-28 | 1984-12-28 | High voltage rectifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61156758A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6254592U (en) * | 1985-09-25 | 1987-04-04 | ||
| EP0929142A2 (en) * | 1997-12-09 | 1999-07-14 | MAGNETEK S.p.A. | Method for forming a capacitive element connected in a circuit with a power device, and circuit formed in this way |
-
1984
- 1984-12-28 JP JP27458484A patent/JPS61156758A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6254592U (en) * | 1985-09-25 | 1987-04-04 | ||
| EP0929142A2 (en) * | 1997-12-09 | 1999-07-14 | MAGNETEK S.p.A. | Method for forming a capacitive element connected in a circuit with a power device, and circuit formed in this way |
| EP0929142A3 (en) * | 1997-12-09 | 2004-11-03 | MAGNETEK S.p.A. | Method for forming a capacitive element connected in a circuit with a power device, and circuit formed in this way |
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