JPS60175365U - floppy disk device - Google Patents
floppy disk deviceInfo
- Publication number
- JPS60175365U JPS60175365U JP6249584U JP6249584U JPS60175365U JP S60175365 U JPS60175365 U JP S60175365U JP 6249584 U JP6249584 U JP 6249584U JP 6249584 U JP6249584 U JP 6249584U JP S60175365 U JPS60175365 U JP S60175365U
- Authority
- JP
- Japan
- Prior art keywords
- data
- circuit
- read
- magnetic head
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の１実施例構成図、第２図は第１図図示
本考案の１実施例構成の動作を説明するタイムチャート
、第３図は本考案の他の実施例構成図、第４図は第３図
図示本考案の他の実施例構成の動作を説明するタイムチ
ャートを示す。
図中、１，１８は反転回路、２． ３．２２．２３は周
波数変調器、４，２７は分周回路、４ ／、１，５２７
′は発振器、５，２４は周波数混合器、６゜２５は書き
込み駆動回路、７はフロッピィディスク・ドライブ・ユ
ニット、８．２９は読み出し増幅器、９．１０．３０は
周波数分離回路、１１−１ないし１１−６はゲート、１
２は波形整形回路、１３はＷ進カウンター １４はフリ
ップフロップ回路、１５は送出シフトパルス作成回路、
１６−１．１６−２はシフトレジスタ、１７はオアゲー
ト、１９はコントロール回路、２０は同期分離回路、２
１はサンプリングクロック発生器、２６はフロッピィデ
ィスク、２８はドライブコントロール回路、３１は直列
・並列変換器、３２は１バイトバツフア、３３は調歩式
データ送出回路を表す。FIG. 1 is a configuration diagram of one embodiment of the present invention, FIG. 2 is a time chart explaining the operation of the configuration of one embodiment of the present invention shown in FIG. 1, and FIG. 3 is a configuration diagram of another embodiment of the present invention. FIG. 4 shows a time chart illustrating the operation of another embodiment of the present invention shown in FIG. In the figure, 1 and 18 are inverting circuits; 2. 3.22.23 is a frequency modulator, 4,27 is a frequency dividing circuit, 4/, 1,527
' is an oscillator, 5 and 24 are frequency mixers, 6°25 is a write drive circuit, 7 is a floppy disk drive unit, 8.29 is a read amplifier, 9.10.30 is a frequency separation circuit, 11-1 to 11-6 is the gate, 1
2 is a waveform shaping circuit, 13 is a W-adic counter, 14 is a flip-flop circuit, 15 is a transmission shift pulse generation circuit,
16-1.16-2 is a shift register, 17 is an OR gate, 19 is a control circuit, 20 is a synchronous separation circuit, 2
1 is a sampling clock generator, 26 is a floppy disk, 28 is a drive control circuit, 31 is a serial/parallel converter, 32 is a 1-byte buffer, and 33 is an asynchronous data sending circuit.
Claims (1)
気媒体に前記データを書き込むと共に該書き込んだデー
タを読み出すための磁気ヘッドと、該磁気ヘッドに所定
のデータを書き込むための信号を供給する書き込み駆動
回路と、前記磁侃ヘッドから読み出された信号を増幅し
、データを抽出するデータ抽出回路とを備えたフロッピ
ィディスク装置において、前記磁気媒体に書き込むデー
タおよび該データに同期したクロック信号を夫々周波数
変調する周波数分離回路と、該周波数変調回路によって
変調された信号を混合する周波数混合器と、該周波数混
合器によって混合された信号番前記磁気ヘッドに供給す
る前記書き込み駆動回路と、該磁気ヘッドから読み出さ
れた信号を増幅し、前記周波数変調回路によって変調さ
れた元のデータおよびクロック信号に対応する読み出し
データおよび読み出しクロック信号を夫々分離する周波
数分離回路と、該周波数分離回路によって分離された前
記読み出しクロック信号を用いて前記分離された読み出
しデータから元′のデータを・抽出するデータ抽出回路
とを備えることを特徴とするフロッピィディスク装置。A magnetic medium for magnetically concentrically storing data, a magnetic head for writing the data on the magnetic medium and reading the written data, and supplying a signal for writing predetermined data to the magnetic head. In a floppy disk device equipped with a write drive circuit and a data extraction circuit that amplifies a signal read from the magnetic head and extracts data, the data to be written on the magnetic medium and a clock signal synchronized with the data are a frequency separation circuit that performs frequency modulation, a frequency mixer that mixes the signals modulated by the frequency modulation circuit, the write drive circuit that supplies the signal number mixed by the frequency mixer to the magnetic head, and the magnetic head. a frequency separation circuit that amplifies a signal read from the head and separates read data and a read clock signal corresponding to the original data and clock signal modulated by the frequency modulation circuit; and a data extraction circuit for extracting original data from the separated read data using the read clock signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6249584U JPS60175365U (en) | 1984-04-27 | 1984-04-27 | floppy disk device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6249584U JPS60175365U (en) | 1984-04-27 | 1984-04-27 | floppy disk device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60175365U true JPS60175365U (en) | 1985-11-20 |
Family
ID=30591762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6249584U Pending JPS60175365U (en) | 1984-04-27 | 1984-04-27 | floppy disk device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60175365U (en) |
-
1984
- 1984-04-27 JP JP6249584U patent/JPS60175365U/en active Pending
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