JPS6014544A - Receiving circuit of spread spectrum communication - Google Patents
Receiving circuit of spread spectrum communicationInfo
- Publication number
- JPS6014544A JPS6014544A JP58122581A JP12258183A JPS6014544A JP S6014544 A JPS6014544 A JP S6014544A JP 58122581 A JP58122581 A JP 58122581A JP 12258183 A JP12258183 A JP 12258183A JP S6014544 A JPS6014544 A JP S6014544A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- code
- signal
- correlation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J13/00—Code division multiplex systems
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
Abstract
Description
【発明の詳細な説明】
〈発明の技術分野〉
本発明は、4相P S K (Pbase 5hift
Keying )変調されたスペクトラム拡散信号(
以下SS信号という)を受信して情報データを復元する
スペクトラム拡散通信の受信回路に関する。[Detailed Description of the Invention] <Technical Field of the Invention> The present invention provides a 4-phase PSK (Pbase 5hift
Keying ) Modulated spread spectrum signal (
The present invention relates to a receiving circuit for spread spectrum communication that receives a SS signal (hereinafter referred to as an SS signal) and restores information data.
〈発明の背景〉
一般にこの種方式で変調されたSS信号は、情報データ
をd(【)、擬似雑音符号(Pseudo No1ce
Code ;以下PN符号という)をp(t)、p(t
−で)(但しては遅延時間)、搬送波角周波数をw(と
すると、次式で表わされる。<Background of the Invention> Generally, an SS signal modulated by this type of method uses information data as d([) and pseudo noise code (Pseudo No.1ce
Code; hereinafter referred to as PN code) as p(t), p(t
-) (however, the delay time), and the carrier wave angular frequency is w (the following equation).
5(t) = d(t) p(t) cos wct
+p (t−7)sinwct・・・・・・・・・■
第3図に示すSS信号の送信回路は、PN符号発生器3
1と、掛算器32と、搬送波発生器33、掛算器34.
35および、加算器36を含む4相PSK変調器37と
から成り、この送出信号を受信側で受け、情報データd
(【)を、復元する。第4図に示す受信回路は、搬送波
成分を除去する方式として遅延検波の方式を採用したも
のであり、遅延検波回路38と、相関回路39と、デー
タ復調回路4oとがら成り、また前記遅延検波回路38
は、遅延回路41と、SS信号S(【)と遅延出力5(
t−τ)とを混合する掛算器42と、混合出力5(()
・5(t−τ)より低周波成分x(1)を取り出すロー
パスフィルタ43とを含む。5(t) = d(t) p(t) cos wct
+p (t-7) sinwct...■ The SS signal transmission circuit shown in FIG.
1, a multiplier 32, a carrier wave generator 33, a multiplier 34.
35, and a 4-phase PSK modulator 37 including an adder 36, receives this transmission signal on the receiving side, and converts the information data d
Restore ([). The receiving circuit shown in FIG. 4 employs a delay detection method as a method for removing carrier components, and is composed of a delay detection circuit 38, a correlation circuit 39, and a data demodulation circuit 4o. 38
is the delay circuit 41, the SS signal S([) and the delay output 5(
a multiplier 42 for mixing t−τ), and a mixing output 5(()
・Includes a low-pass filter 43 that extracts a lower frequency component x(1) from 5(t-τ).
今週延時間イをPN符号の1ビツト時間幅とし、wcr
をwcτ=−(2n−1)(但しn=1.2゜・・・・
・・ )の関係に設定すると、cos wcτ=0 ・
・・・・・・・・■sinwcτ−(−1)n−1・・
・・・・・・・■となる。また混合出力S(【)・5(
t−τ)は0式を用いてつぎの0式で表わすことができ
、との0式に00式を代入して解くと、低周波成分x(
t)を表わすつぎの0式を得る。Let this week's extended time I be the 1-bit time width of the PN code, and wcr
wcτ=-(2n-1) (however, n=1.2゜...
), cos wcτ=0 ・
......■sinwcτ-(-1)n-1...
......■. Also, mixed output S([)・5(
t-τ) can be expressed by the following equation 0 using equation 0, and by substituting equation 00 into equation 0 and solving, the low frequency component x(
We obtain the following 0 expression representing t).
5(t)・S (t−τ) = (d(t)p(c)c
oswcc+ p(t−τ)sinwct)(d(t−
τ)p(t−τ)coswc(t−τ)+p(L−2Z
”)sinwc(1−?)]・・・・・・・・・・・・
■斯くて低周波成分x<1)とP(すP(t−2τ)を
重みとするPN符号とを相関回路39にて相関をとり、
データ復調回路4oにおいて相関出力をサンプル信号に
てサンプリングして情報データを復元する。ところがこ
の種データ復元方式は、前記0式の第1項に着目して情
報データを復元するものであり、データ成分を含む第2
項は情報データの復元に関与していない。従って復調効
率がその分半減し、これが受信回路の性能を低下させる
原因となっている。5(t)・S (t-τ) = (d(t)p(c)c
oswcc+ p(t-τ) sinwct)(d(t-
τ)p(t-τ)coswc(t-τ)+p(L-2Z
”) sinwc(1-?)]・・・・・・・・・・・・
■Thus, the correlation circuit 39 correlates the low frequency component x<1) with the PN code whose weight is P(p(t-2τ)),
In the data demodulation circuit 4o, the correlation output is sampled using a sample signal to restore information data. However, this type of data restoration method restores information data by focusing on the first term of the above equation 0, and the second term containing the data component is
section is not involved in restoring information data. Therefore, the demodulation efficiency is reduced by half, which causes the performance of the receiving circuit to deteriorate.
〈発明の目的〉
本発明は、前記0式の第1項および第2項を情報データ
の復元に用いることによって、復調効率が優れた高性能
なスペクトラム拡散通信の受信回路を提供することを目
的とする。<Object of the Invention> An object of the present invention is to provide a high-performance spread spectrum communication receiving circuit with excellent demodulation efficiency by using the first and second terms of the above equation 0 for restoring information data. shall be.
〈発明の構成および効果〉
上記目的を達成するため、本発明では、相関出力をPN
符号の1ビツト時間だけ遅らせた遅延回路の出力と、P
N符号の1フレームにつきSS信号の低周波成分を加算
する加算回路の出力とを合成し、この合成信号をサンプ
ル信号にてサンプリングして、情報データを復元するよ
うに構成した。<Configuration and Effects of the Invention> In order to achieve the above object, the present invention provides a correlation output as a PN
The output of the delay circuit delayed by one bit time of the code and P
The configuration is such that the output of an adder circuit that adds the low frequency components of the SS signal for each frame of the N code is combined, and the combined signal is sampled with a sample signal to restore information data.
本発明によれば、前記0式の第1項および第2項を情報
データの復元に関与させることができ、高性能なデータ
復調が可能となり、受信回路の性能を大幅に向上し得る
等、発明目的を達成した優れル効果を奏する。According to the present invention, the first and second terms of the equation 0 can be involved in restoring information data, enabling high-performance data demodulation, and greatly improving the performance of the receiving circuit. It achieves the excellent effect of achieving the purpose of the invention.
〈実施例の説明〉
第1図は本発明にかかる受信回路の構成例を示し、第2
図は回路動作のタイムチャートである。<Description of Embodiments> FIG. 1 shows a configuration example of a receiving circuit according to the present invention, and FIG.
The figure is a time chart of circuit operation.
第1図において、相関回路1は、前記0式の低周波成分
x(L)(第2図(3)に示す)を入力するシフト回路
2、シフト回路2の各タップ信号とp(t)p(t−z
τ)の重みをもつPN符号との積をとる掛算器3.3.
3、全掛算器3の出力を加算して相関出力φ1(t)を
出す加算器4を含む。相関出力φl(【)は、第2図(
4)に示す如く、情報データの内容に応じて正負の鋭い
ピークをもつ。前記低周波成分x(1)は加算回路5の
シフト回路6にも入力され、低周波成分X(【)をPN
符号の1フレームにつき加算器7により加算する。この
加算処理によって前記0式の第1項が雑音として打ち消
され、加算出力φ2(L)は、第2図(5)に示す如く
、ピーク位置がPN符号より1ビツトずれたのこぎり波
形となる。前記相関出力φl(【)はアナログシフト回
路8に入力され、1ビツト遅延させたシフト回路8の出
力と加算出力φ2(【)とを比較器9で合成して、合成
信号φ3(0を得る。In FIG. 1, a correlation circuit 1 includes a shift circuit 2 which inputs the low frequency component x(L) of the above equation 0 (shown in FIG. 2 (3)), and each tap signal of the shift circuit 2 and p(t). p(t-z
Multiplier 3.3.
3. It includes an adder 4 that adds the outputs of all the multipliers 3 to produce a correlation output φ1(t). The correlation output φl([) is shown in Fig. 2(
As shown in 4), there are sharp positive and negative peaks depending on the content of the information data. The low frequency component x(1) is also input to the shift circuit 6 of the adder circuit 5, and the low frequency component
Addition is performed by an adder 7 for each frame of the code. Through this addition process, the first term of the equation 0 is canceled out as noise, and the addition output φ2(L) becomes a sawtooth waveform with a peak position shifted by 1 bit from the PN code, as shown in FIG. 2(5). The correlation output φl([) is input to an analog shift circuit 8, and the output of the shift circuit 8 delayed by 1 bit and the addition output φ2([) are combined by a comparator 9 to obtain a composite signal φ3(0). .
この合成信号φ3(【)は、第2図(6)に示す如く、
加算出力φ2(t)ののこきり波形に相関出力φ1(【
)のピークが重畳された波形となる。This composite signal φ3([) is, as shown in FIG. 2 (6),
Correlation output φ1 ([
) peaks are superimposed on each other.
尚図中、シフトクロック発生器1oは、前記シフト回路
2,6やリングカウンタ11にシフトクロックを供給す
る。またこのリングカウンタ11はPN符号の1フレー
ムを周期とし、従ってその内容(第2図(9)に示・す
)は相関出力φ1(【)の位相を表わす。In the figure, a shift clock generator 1o supplies shift clocks to the shift circuits 2 and 6 and the ring counter 11. Further, this ring counter 11 has a period of one frame of the PN code, and therefore its contents (shown in FIG. 2 (9)) represent the phase of the correlation output φ1 ([).
今受信された最初のデータがrOJである場合、相関出
力φ1(【)には負のピークが現われる。If the first data just received is rOJ, a negative peak will appear in the correlation output φ1([).
この相関出力φ1(t)は比較器12にて負の基準レベ
ルTHと比較される。そして前記負のピーり値が基準レ
ベルTHより下回わると、比較器12はアンド回路13
を介して論理「1」の信号A(第2図(7)に示す)を
送出する。この信号Aはラッチ回路14に入力され、こ
のラッチ回路14は信号へのタイミングで前記リングカ
ウンタ11の内容、すなわち相関出力φl(【)におけ
る負のピー、り値の位相をラッチデータ(第2図(8)
に示す)として記憶する。また前記信号Aは、ノット回
路15を介して初期リセットされているフリップフロッ
プ16へ入力される。このフリップフロップ16は信号
Aの立下がりでセットされ、これによりQ出力が論理「
0」となって、アンド回路13を「ゲート閉」の状態と
なし、以後、信号Aは発生しない。This correlation output φ1(t) is compared with a negative reference level TH in a comparator 12. When the negative peak value falls below the reference level TH, the comparator 12 outputs the AND circuit 13.
A signal A of logic "1" (shown in FIG. 2 (7)) is sent out via. This signal A is input to the latch circuit 14, and this latch circuit 14 converts the contents of the ring counter 11, that is, the phase of the negative peak value in the correlation output φl([) into latch data (second Figure (8)
). Further, the signal A is inputted via the NOT circuit 15 to the flip-flop 16 which is initially reset. This flip-flop 16 is set at the falling edge of signal A, which causes the Q output to become a logic "
0'', and the AND circuit 13 is brought into the ``gate closed'' state, and the signal A is no longer generated.
斯くてリングカウンタ11の内容は、ラッチ回路17を
介してPN符号の1ビット遅れで一致回路18へ入力さ
れ、前記ラッチ回路14のラッチデータと比較される。The contents of the ring counter 11 are thus input to the coincidence circuit 18 via the latch circuit 17 with a 1-bit delay of the PN code, and compared with the latched data of the latch circuit 14.
従って一致回路1Bは、合成信号φ3(t)のピーク位
置に対応して一致出力を出し、この−散出力を出し、こ
の−散出力はサンプル信号B(第2図1101に示す)
としてフリップ70ツブ19へ送られる。このフリップ
フロップ19には比較器20にて正負判定された合成信
号φ3(t)が入力され、この合成信号φ3(L)がサ
ンプル信号すにてサンプリングされて、情報データd(
t)(第2図01)に示す)が復元される。Therefore, the coincidence circuit 1B outputs a coincidence output corresponding to the peak position of the composite signal φ3(t), and outputs this -spread output, which is the sample signal B (shown at 1101 in FIG. 2).
It is sent to the flip 70 tube 19 as a. The composite signal φ3(t) determined to be positive or negative by the comparator 20 is input to this flip-flop 19, and this composite signal φ3(L) is sampled by the sample signal d(
t) (shown in FIG. 2 01)) is restored.
第1図は本発明にかかる受信回路のブロック図、第2図
(1)〜(111は回路動作を示すタイミングチャート
、第3図は従来の送信回路を示すブロック図、第4図は
従来の受信回路を示すブロック図である。
1・・・・・・相関回路 5・・・・・・加算回路8・
・・・・・アナログシフト回路
9・・・・・・比較器 18・・・・・・一致回路19
・・・・・・フリップフロップ
2
分2 百ヨ
手続補正書く自発、0〉
昭和58年10月28日
1、事件の表示 昭和58年特許願 第122581号
2、発明の名称 スペクトラム拡散通信の受信回路3、
補正をする者 事件との関係 特許出願人住所〒616
京都市右京区花園土堂町10番地名称(294)立石電
機株式会社
代表者立石孝雄
5、補正の対象
図面の簡単な説明の欄
258−
「第2図は回路動作を示すタイミングチャート」に補正
。Fig. 1 is a block diagram of a receiving circuit according to the present invention, Fig. 2 (1) to (111) are timing charts showing circuit operations, Fig. 3 is a block diagram showing a conventional transmitting circuit, and Fig. 4 is a block diagram of a conventional transmitting circuit. It is a block diagram showing a receiving circuit. 1... Correlation circuit 5... Addition circuit 8.
... Analog shift circuit 9 ... Comparator 18 ... Match circuit 19
・・・・・・Flip-flop 2 minutes 2 Voluntary writing of 100 procedural amendments, 0> October 28, 1982 1. Indication of the incident 1988 Patent Application No. 122581 2. Title of the invention Receiving spread spectrum communication circuit 3,
Person making the amendment Relationship to the case Patent applicant address 〒616
10 Hanazono Tsuchido-cho, Ukyo-ku, Kyoto City Name (294) Tateishi Electric Co., Ltd. Representative Takao Tateishi 5 Column 258 for a brief explanation of the drawing to be corrected - Correction to "Figure 2 is a timing chart showing circuit operation."
Claims (1)
関回路と、相関出力を擬似雑音符号の1ビット時間だけ
遅らせるシフト回路と、擬似雑音符号Ω1フレームにつ
き前記スペクトラム拡散信号を加算する加算回路と、シ
フト回路の出力と加算回路の出力とを合成した信号をサ
ンプル信号によりサンプリングして情報データを復元す
るサンプル回路と、相関出力に基づきサンプル信号を発
生させるサンプル信号発生回路とから成るスペクトラム
拡散通信の受信回路。a correlation circuit that correlates the spread spectrum signal and the pseudo-noise code; a shift circuit that delays the correlation output by one bit time of the pseudo-noise code; an adder circuit that adds the spread-spectrum signal for each frame of the pseudo-noise code Ω; Receiving spread spectrum communication consisting of a sample circuit that restores information data by sampling a signal obtained by combining the output of the circuit and the output of the adder circuit with a sample signal, and a sample signal generation circuit that generates a sample signal based on the correlation output. circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58122581A JPS6014544A (en) | 1983-07-05 | 1983-07-05 | Receiving circuit of spread spectrum communication |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58122581A JPS6014544A (en) | 1983-07-05 | 1983-07-05 | Receiving circuit of spread spectrum communication |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6014544A true JPS6014544A (en) | 1985-01-25 |
Family
ID=14839452
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58122581A Pending JPS6014544A (en) | 1983-07-05 | 1983-07-05 | Receiving circuit of spread spectrum communication |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6014544A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8965758B2 (en) | 2009-03-31 | 2015-02-24 | Huawei Technologies Co., Ltd. | Audio signal de-noising utilizing inter-frame correlation to restore missing spectral coefficients |
-
1983
- 1983-07-05 JP JP58122581A patent/JPS6014544A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8965758B2 (en) | 2009-03-31 | 2015-02-24 | Huawei Technologies Co., Ltd. | Audio signal de-noising utilizing inter-frame correlation to restore missing spectral coefficients |
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