JPS57141099A - Sound recording and reproducing device - Google Patents
Sound recording and reproducing deviceInfo
- Publication number
- JPS57141099A JPS57141099A JP56024628A JP2462881A JPS57141099A JP S57141099 A JPS57141099 A JP S57141099A JP 56024628 A JP56024628 A JP 56024628A JP 2462881 A JP2462881 A JP 2462881A JP S57141099 A JPS57141099 A JP S57141099A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- address
- signal
- outputs
- sound recording
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/005—Arrangements for writing information into, or reading information out from, a digital store with combined beam-and individual cell access
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Abstract
PURPOSE:To reduce wow and flutter to prevent the degradation of the performance of the device, by reading and writing information from and to a storage device, which is provided between an A/D converting means and a D/A converting means, on a basis of an external command signal by the output signal of a microcomputer. CONSTITUTION:At a sound recording time, when a start switch 84 is turned on, a cpu circuit 7 outputs an upper address, a lower address, and a write instruction to an output port 73, an address bus 72, and a control line respectively to send them to a control circuit 6. The circuit 6 outputs an A/D trigger 61 to an A/D converter 2. Then, the output of an LPF1 is sampled and is subjected to A/D conversion and is sent to an RAM circuit 3. Next, an address signal 63 and a line pulse 62 are outputted to the circuit 3 in order. Thus, a digital sound recording signal 21 is stored in the memory of an address designated by the signal 63 of the circuit 3. At a reproducing time, the circuit 7 sets and outputs the same address as recording, and a read instruction is outputted through a control line 71 to the circit 3 to operate the circuit 6, and contents in a designated address of the circuit 3 are subjected to D/A conversion and have the waveform shaped by an LPF5 to take out an output signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56024628A JPS57141099A (en) | 1981-02-20 | 1981-02-20 | Sound recording and reproducing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56024628A JPS57141099A (en) | 1981-02-20 | 1981-02-20 | Sound recording and reproducing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57141099A true JPS57141099A (en) | 1982-09-01 |
Family
ID=12143398
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56024628A Pending JPS57141099A (en) | 1981-02-20 | 1981-02-20 | Sound recording and reproducing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57141099A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59189797U (en) * | 1983-05-30 | 1984-12-15 | 株式会社ケンウッド | Recording and playback device |
-
1981
- 1981-02-20 JP JP56024628A patent/JPS57141099A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59189797U (en) * | 1983-05-30 | 1984-12-15 | 株式会社ケンウッド | Recording and playback device |
JPS634320Y2 (en) * | 1983-05-30 | 1988-02-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4138597A (en) | PCM time slot exchange | |
JPS57141099A (en) | Sound recording and reproducing device | |
JPS591114U (en) | Pitch conversion device | |
JPS5542383A (en) | Pcm reproducer | |
JPS5779547A (en) | Digital converting circuit for more than one input analog data | |
JPS56169289A (en) | Controller of digital waveform recorder | |
JPS59189797U (en) | Recording and playback device | |
JPH042195B2 (en) | ||
JPS6033399U (en) | Recording and playback device | |
JPH0618400Y2 (en) | Voice processor | |
JPS60800U (en) | Recording and playback device | |
JPS6040171U (en) | video signal storage device | |
JPH0532860Y2 (en) | ||
JPS5885827U (en) | Channel selection device | |
JPS57189307A (en) | Recording and reproducing device | |
JPS5493940A (en) | Correcting unit of code word error | |
JPS55146529A (en) | Bus supervisory device | |
JPS5925599U (en) | automatic accompaniment device | |
JPS6242514B2 (en) | ||
SU429466A1 (en) | STORAGE DEVICE | |
JP2515149Y2 (en) | Recording equipment | |
JPS5832597U (en) | waveform storage device | |
JPS59108938U (en) | data acquisition circuit | |
JPS5522292A (en) | Acoustic reproducer | |
JPS578995A (en) | Voice storage device |