JPS5683141A - Data compression circuit - Google Patents

Data compression circuit

Info

Publication number
JPS5683141A
JPS5683141A JP16315179A JP16315179A JPS5683141A JP S5683141 A JPS5683141 A JP S5683141A JP 16315179 A JP16315179 A JP 16315179A JP 16315179 A JP16315179 A JP 16315179A JP S5683141 A JPS5683141 A JP S5683141A
Authority
JP
Japan
Prior art keywords
data
converter
fed
compressor
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16315179A
Other languages
Japanese (ja)
Inventor
Kenji Funo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16315179A priority Critical patent/JPS5683141A/en
Publication of JPS5683141A publication Critical patent/JPS5683141A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/66Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for reducing bandwidth of signals; for improving efficiency of transmission

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

PURPOSE:To reduce the number of bits to be handled after the A/D converter and to enable the compression with high accuracy, by performing digitization at the A/D converter having greater picked-up bit number and extracting and using the bit only corresponding to the required level among the digital data. CONSTITUTION:An analog signal from an input device 1 is digitized at an A/D converter 2, this digitized data is fed to a data compressor 6 and fed to the level detector 4. The level of data detected at the detector 4 is fed to a compressor 6 via a selector controller 5. The compressor 6 is provided with data selectors 7a- 7d so that the data signal from an input terminal (a) can be selected with the output of the controller 5 from a control signal input terminal (b), and the bit only corresponding to the required level among the data signal is fed to the data processor 3. Thus, the bits to be handled after the converter 2 are reduced in number, allowing to make compression with high accuracy.
JP16315179A 1979-12-11 1979-12-11 Data compression circuit Pending JPS5683141A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16315179A JPS5683141A (en) 1979-12-11 1979-12-11 Data compression circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16315179A JPS5683141A (en) 1979-12-11 1979-12-11 Data compression circuit

Publications (1)

Publication Number Publication Date
JPS5683141A true JPS5683141A (en) 1981-07-07

Family

ID=15768185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16315179A Pending JPS5683141A (en) 1979-12-11 1979-12-11 Data compression circuit

Country Status (1)

Country Link
JP (1) JPS5683141A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130936A (en) * 1983-12-19 1985-07-12 Nec Corp Data decoding circuit
JPS61147691A (en) * 1984-12-21 1986-07-05 Sony Corp Highly efficiency tv signal encoding device
JPS6271390A (en) * 1985-05-10 1987-04-02 Matsushita Electric Ind Co Ltd Intermediate-level setting circuit for video

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130936A (en) * 1983-12-19 1985-07-12 Nec Corp Data decoding circuit
JPS61147691A (en) * 1984-12-21 1986-07-05 Sony Corp Highly efficiency tv signal encoding device
JPS6271390A (en) * 1985-05-10 1987-04-02 Matsushita Electric Ind Co Ltd Intermediate-level setting circuit for video

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