JPS5633847A - Package molding for semiconductor - Google Patents
Package molding for semiconductorInfo
- Publication number
- JPS5633847A JPS5633847A JP10996579A JP10996579A JPS5633847A JP S5633847 A JPS5633847 A JP S5633847A JP 10996579 A JP10996579 A JP 10996579A JP 10996579 A JP10996579 A JP 10996579A JP S5633847 A JPS5633847 A JP S5633847A
- Authority
- JP
- Japan
- Prior art keywords
- cavities
- thermoplastic resin
- plate shaped
- resin plate
- shaped substances
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 6
- 238000000465 moulding Methods 0.000 title 1
- 239000000126 substance Substances 0.000 abstract 7
- 229920005992 thermoplastic resin Polymers 0.000 abstract 6
- 239000002184 metal Substances 0.000 abstract 3
- 229920005989 resin Polymers 0.000 abstract 3
- 239000011347 resin Substances 0.000 abstract 3
- 230000008018 melting Effects 0.000 abstract 2
- 238000002844 melting Methods 0.000 abstract 2
- 238000010438 heat treatment Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lining Or Joining Of Plastics Or The Like (AREA)
Abstract
PURPOSE:To eliminate the damage to connection between semiconductors and lead wires and to improve the reliability of a semiconductor function by using thermoplastic resin plate shaped substances having cavities to accommodate the semiconductors. CONSTITUTION:Two thermoplastic resin plate shaped substances 17, 17' with cavities for storing melting resin are provided in metal molds 14, 14' with cavities and a lead frame 5 equipped with a semiconductor is provided in the metal mold 14'. Wherein, the thermoplastic resin plate shaped substances 17, 17' are provided with cavities 11, 11' having thin side wall sections 15, 15' and thick side wall sections 16, 16' for accommodating a previously molded semiconductor and cavities 18, 18' for storing melting resin to store extra resin generated when the thermoplastic resin plate shaped substances are melted and united to the thick side wall sections. The thermoplastic resin plate shaped substances 17, 17' are melted and united by pressurizing by a presser after heating the substances 17, 17' at a predetermined temperature. Furthermore, the metal molds 14, 14' with cavities are provided with cavities 19, 19' for installing the thermoplastic resin plate shaped substances.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10996579A JPS5633847A (en) | 1979-08-28 | 1979-08-28 | Package molding for semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10996579A JPS5633847A (en) | 1979-08-28 | 1979-08-28 | Package molding for semiconductor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5633847A true JPS5633847A (en) | 1981-04-04 |
JPS6122467B2 JPS6122467B2 (en) | 1986-05-31 |
Family
ID=14523633
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10996579A Granted JPS5633847A (en) | 1979-08-28 | 1979-08-28 | Package molding for semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5633847A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0212994A2 (en) * | 1985-08-28 | 1987-03-04 | Seiei Kohsan Co.,Ltd. | Method and apparatus for packaging semiconductor device and the like |
JPS6313352A (en) * | 1986-07-04 | 1988-01-20 | Sumitomo Bakelite Co Ltd | Sealing method of semiconductor and the like |
-
1979
- 1979-08-28 JP JP10996579A patent/JPS5633847A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0212994A2 (en) * | 1985-08-28 | 1987-03-04 | Seiei Kohsan Co.,Ltd. | Method and apparatus for packaging semiconductor device and the like |
JPS6313352A (en) * | 1986-07-04 | 1988-01-20 | Sumitomo Bakelite Co Ltd | Sealing method of semiconductor and the like |
Also Published As
Publication number | Publication date |
---|---|
JPS6122467B2 (en) | 1986-05-31 |
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