JPS5461849A - Electronic computer - Google Patents
Electronic computerInfo
- Publication number
- JPS5461849A JPS5461849A JP12811077A JP12811077A JPS5461849A JP S5461849 A JPS5461849 A JP S5461849A JP 12811077 A JP12811077 A JP 12811077A JP 12811077 A JP12811077 A JP 12811077A JP S5461849 A JPS5461849 A JP S5461849A
- Authority
- JP
- Japan
- Prior art keywords
- register
- reg
- return address
- circuit
- contents
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Debugging And Monitoring (AREA)
- Executing Machine-Instructions (AREA)
Abstract
PURPOSE: To make access to a subroutine by returning to an abnormal return address forcibly when the access to the subroutine is made assigning a normal return address, maximum required time and abnormal return address and a return instruction is not executed even after the maximum required time passes.
CONSTITUTION: To execute a prescribed routine, 1st register Tregstored with its required time and 2nd register ARreg stored with a return address in case of abnormality are provided, and further, subtracter DMT which subtracts "1" from the contents of register Treg at every constant time, merging circuit ZD which outputs logic "1" when the contents of register Treg are negative, and FF which operates subtracter DMT by the output of circuit ZD. Then, circuit ZD output logic "1" by control circuit A, and when FF is "1", the contents of register ARreg are transferred to location counter LOC, so that FF will be made "0" under the control.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12811077A JPS5461849A (en) | 1977-10-27 | 1977-10-27 | Electronic computer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12811077A JPS5461849A (en) | 1977-10-27 | 1977-10-27 | Electronic computer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5461849A true JPS5461849A (en) | 1979-05-18 |
JPS5640380B2 JPS5640380B2 (en) | 1981-09-19 |
Family
ID=14976624
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12811077A Granted JPS5461849A (en) | 1977-10-27 | 1977-10-27 | Electronic computer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5461849A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0240747A (en) * | 1988-07-29 | 1990-02-09 | Noritz Corp | Data input/output method for microcomputer |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5949097U (en) * | 1982-09-24 | 1984-03-31 | 三洋電機株式会社 | Electric compressor mounting device |
-
1977
- 1977-10-27 JP JP12811077A patent/JPS5461849A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0240747A (en) * | 1988-07-29 | 1990-02-09 | Noritz Corp | Data input/output method for microcomputer |
Also Published As
Publication number | Publication date |
---|---|
JPS5640380B2 (en) | 1981-09-19 |
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