JPH0563306A - Semiconductor laser element and manufacture thereof - Google Patents
Semiconductor laser element and manufacture thereofInfo
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- JPH0563306A JPH0563306A JP22062591A JP22062591A JPH0563306A JP H0563306 A JPH0563306 A JP H0563306A JP 22062591 A JP22062591 A JP 22062591A JP 22062591 A JP22062591 A JP 22062591A JP H0563306 A JPH0563306 A JP H0563306A
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- substrate temperature
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は分子線エピタキシャル成
長法を用いて半導体レーザ素子を製造する方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor laser device using a molecular beam epitaxial growth method.
【０００２】[0002]
【従来の技術】一般に，分子線エピタキシャル成長法(M
BE法)を用いて，AlGaAs/GaAs系の半導体レーザ素子を製
造する場合，AlGaAs成長層の表面ホモロジーおよび光学
結晶性は基板温度に強く依存することが知られている。
また，高い基板温度でAlGaAs層を成長させると，Gaが再
蒸発するので，成長層の厚さおよび混晶比を精度よく制
御するのが困難であることも知られている。2. Description of the Related Art Generally, a molecular beam epitaxial growth method (M
When manufacturing AlGaAs / GaAs semiconductor laser devices using the BE method), it is known that the surface homology and optical crystallinity of the AlGaAs growth layer strongly depend on the substrate temperature.
It is also known that when the AlGaAs layer is grown at a high substrate temperature, Ga is re-evaporated, which makes it difficult to accurately control the thickness of the grown layer and the mixed crystal ratio.
【０００３】図４に従来の代表的なAlGaAs/GaAs系の半
導体レーザ素子を示す。この半導体レーザ素子は，MBE
法を用いて，n-GaAs基板上20に，Siドープn-GaAsバッフ
ァ層21，Siドープn-AlxGa1-xAs第１クラッド層22，ノン
ドープAlyGa1-yAs活性層24，Beドープp-AlxGa1-xAs第２
クラッド層26，およびBeドープp-GaAsキャップ層27を連
続的に成長させることにより作製される。このとき，基
板温度は結晶成長工程を通じて一定に保持される。（な
お，基板20の裏面に形成されたn側電極と，キャップ層2
7の表面に形成されたp側電極とについては，これらの図
示が省略されている）。FIG. 4 shows a typical conventional AlGaAs / GaAs semiconductor laser device. This semiconductor laser device is MBE
On the n-GaAs substrate 20, Si-doped n-GaAs buffer layer 21, Si-doped n-Al x Ga 1-x As first cladding layer 22, non-doped Al y Ga 1-y As active layer 24 , Be-doped p-Al x Ga 1-x As 2nd
It is produced by continuously growing the cladding layer 26 and the Be-doped p-GaAs cap layer 27. At this time, the substrate temperature is kept constant throughout the crystal growth process. (Note that the n-side electrode formed on the back surface of the substrate 20 and the cap layer 2
Regarding the p-side electrode formed on the surface of 7, these figures are omitted).
【０００４】[0004]
【発明が解決しようとする課題】比較的低い基板温度で
成長を行った場合には，各半導体層の厚さおよび混晶比
を制御することは容易である。しかし，光学的結晶性の
良好なクラッド層および活性層が得られないので，半導
体レーザ素子の光学的および電気的特性が劣化する。When the growth is performed at a relatively low substrate temperature, it is easy to control the thickness and mixed crystal ratio of each semiconductor layer. However, since a clad layer and an active layer having good optical crystallinity cannot be obtained, the optical and electrical characteristics of the semiconductor laser device deteriorate.
【０００５】これに対し，Gaの再蒸発が生じるほどの高
い基板温度で成長を行った場合には，クラッド層と活性
層との界面は平坦になり，光学的結晶性に優れたクラッ
ド層および活性層が得られる。しかし，活性層における
Gaの再蒸発速度はクラッド層におけるGaの再蒸発速度よ
り非常に大きいので，活性層の厚さおよび混晶比を制御
するのが極めて困難である。On the other hand, when the growth is carried out at a substrate temperature high enough to cause re-evaporation of Ga, the interface between the clad layer and the active layer becomes flat, and the clad layer excellent in optical crystallinity and An active layer is obtained. However, in the active layer
Since the re-evaporation rate of Ga is much higher than that of Ga in the clad layer, it is extremely difficult to control the thickness and mixed crystal ratio of the active layer.
【０００６】本発明は，上記従来の問題点を解決するも
のであり，その目的とするところは，活性層の厚さおよ
び混晶比を容易に制御し，しかも界面が平坦で，かつ光
学的結晶性に優れたクラッド層および活性層を得ること
により，光学的および電気的特性に優れた半導体レーザ
素子を製造する方法を提供することにある。The present invention is intended to solve the above-mentioned conventional problems, and an object thereof is to easily control the thickness and mixed crystal ratio of the active layer, and to make the interface flat and optically. An object of the present invention is to provide a method for manufacturing a semiconductor laser device having excellent optical and electrical characteristics by obtaining a clad layer and an active layer having excellent crystallinity.
【０００７】[0007]
【課題を解決するための手段】本発明の製造方法は，分
子線エピタキシャル成長法を用いて半導体レーザ素子を
製造する方法であって，比較的高い基板温度でGaAs基板
上方にAlxGa1-xAs下部第１クラッド層を成長させる工程
と，基板温度を低下させながら，AlxGa1-xAs下部第１ク
ラッド層上にGaAs薄層を成長させる工程と，比較的低い
基板温度でGaAs薄層上にAlxGa1-xAs上部第１クラッド
層，AlyGa1-yAs活性層およびAlxGa1-xAs下部第２クラッ
ド層を順次成長させる工程と，基板温度を上昇させなが
ら，AlxGa1 -xAs下部第２クラッド層上にGaAs薄層を成長
させる工程と，比較的高い基板温度でGaAs薄層上にAlxG
a1-xAs上部第２クラッド層を成長させる工程とを包含す
ることにより，上記目的が達成される。The manufacturing method of the present invention is a method for manufacturing a semiconductor laser device by using a molecular beam epitaxial growth method, in which Al x Ga 1-x is formed above a GaAs substrate at a relatively high substrate temperature. A step of growing the As lower first cladding layer, a step of growing a GaAs thin layer on the Al x Ga 1-x As lower first cladding layer while lowering the substrate temperature, and a step of growing the GaAs thin layer at a relatively low substrate temperature. A step of sequentially growing an Al x Ga 1-x As upper first cladding layer, an Al y Ga 1-y As active layer and an Al x Ga 1-x As lower second cladding layer on the layer, and increasing the substrate temperature. However, the step of growing a GaAs thin layer on the Al x Ga 1 -x As lower second cladding layer and the Al x G on the GaAs thin layer at a relatively high substrate temperature.
The above object is achieved by including a step of growing a 1-x As upper second cladding layer.
【０００８】このように，本発明の製造方法は，第１お
よび第２のAlxGa1-xAsクラッド層中に挿入されたGaAs薄
層を成長させる際に，基板温度を上下させることによ
り，AlyGa1-yAs活性層を比較的低い基板温度で成長させ
ることを特徴としている。As described above, the manufacturing method of the present invention is performed by raising or lowering the substrate temperature when growing the GaAs thin layer inserted in the first and second Al x Ga 1-x As cladding layers. , Al y Ga 1-y As active layer is grown at a relatively low substrate temperature.
【０００９】本発明において，「比較的高い基板温度」
とは，好ましくは，Gaの再蒸発が多い約740〜760℃の範
囲内の温度を意味し，また，「比較的低い基板温度」と
は，好ましくは，Gaの再蒸発が少ない約700〜720℃の範
囲内の温度を意味する。ただし，例えば活性層の厚さが
薄い場合には，比較的低温で成長させても成長層の表面
ホモロジーおよび光学的結晶性は良好であるので，「比
較的低い基板温度」は，上記の温度範囲に限定されるこ
とはない。In the present invention, "relatively high substrate temperature"
Preferably means a temperature in the range of about 740 to 760 ° C. with high Ga re-evaporation, and “relatively low substrate temperature” preferably means about 700 to low Ga re-evaporation. It means a temperature within the range of 720 ° C. However, for example, when the thickness of the active layer is thin, the surface homology and optical crystallinity of the growth layer are good even when grown at a relatively low temperature. It is not limited to the range.
【００１０】なお，ダブルヘテロ構造において，光導波
路を構成して光を効率よく活性層内に閉じ込めるには，
屈折率はクラッド層より活性層の方が大きくなければな
らないので，活性層の禁制帯幅はクラッド層のそれより
小さい必要がある。それゆえ，クラッド層のAl混晶比x
と，活性層のAl混晶比yとは，x＞yの条件を満足しなけ
ればならない。しかし，これらAl混晶比の具体的な数値
は，所望のレーザ発振波長を考慮して適宜選択され得
る。In the double hetero structure, in order to construct an optical waveguide and efficiently confine light in the active layer,
Since the refractive index of the active layer must be larger than that of the cladding layer, the band gap of the active layer must be smaller than that of the cladding layer. Therefore, the Al mixed crystal ratio of the cladding layer x
And the Al mixed crystal ratio y of the active layer must satisfy the condition of x> y. However, specific numerical values of these Al mixed crystal ratios can be appropriately selected in consideration of the desired laser oscillation wavelength.
【００１１】[0011]
【作用】本発明の製造方法では，AlxGa1-xAsクラッド層
にGaAs薄層を挿入して基板温度を上下させながら成長さ
せるので，Gaの再蒸発を抑制しながら，AlyGa1-yAs活性
層を比較的低温で成長させることができる。それゆえ，
AlyGa1-yAs活性層の厚さおよび混晶比を精度よく設定し
得るので，レーザ発振波長の制御が容易になる。また，
AlyGa1-yAs活性層とAlxGa1-xAsクラッド層との界面が平
坦であると同時に，光学的結晶性が良好になるので，得
られた半導体レーザ素子の光学的および電気的特性が向
上する。In the manufacturing method of the present invention, since a GaAs thin layer is inserted into the Al x Ga 1-x As clad layer to grow while raising and lowering the substrate temperature, Al y Ga 1 -y As The active layer can be grown at a relatively low temperature. therefore,
Since the thickness of the Al y Ga 1-y As active layer and the mixed crystal ratio can be set accurately, the laser oscillation wavelength can be controlled easily. Also,
Since the interface between the Al y Ga 1-y As active layer and the Al x Ga 1-x As clad layer is flat and the optical crystallinity is good, the optical and electrical properties of the obtained semiconductor laser device are improved. Characteristics are improved.
【００１２】[0012]
【実施例】以下に，本発明の実施例について説明する。EXAMPLES Examples of the present invention will be described below.
【００１３】図１に本実施例のAlGaAs/GaAs系半導体レ
ーザ素子の概略構造を示す。この半導体レーザ素子は以
下のようにして作製される。なお，MBE法による各半導
体層の成長には，III族蒸発源としてのGaセルおよびAl
セル，V族蒸発源としてのAsセル，n型不純物としてのSn
セルまたはSiセル，p型不純物としてのBeセルが収納さ
れたMBE装置を用いる。FIG. 1 shows a schematic structure of the AlGaAs / GaAs semiconductor laser device of this embodiment. This semiconductor laser device is manufactured as follows. In addition, the growth of each semiconductor layer by the MBE method was performed using Ga cell and Al as a group III evaporation source.
Cell, As cell as group V evaporation source, Sn as n-type impurity
An MBE device containing a cell or Si cell and a Be cell as a p-type impurity is used.
【００１４】まず，図２に示すように，Gaセル，Asセル
およびSiセルのシャッターを開けて，基板温度600℃に
て，n-GaAs基板10上に，Siドープn-GaAsバッファ層11を
適当な厚さまで成長させる。次いで，基板温度をGaの再
蒸発量が多い740〜760℃の比較的高温にした後，Alセル
のシャッターを開けて，バッファ層11上に，Siドープn-
AlxGa1-xAs下部第１クラッド層121（厚さ700〜800nm）
を成長させる。First, as shown in FIG. 2, the shutters for the Ga cell, As cell and Si cell are opened, and the Si-doped n-GaAs buffer layer 11 is formed on the n-GaAs substrate 10 at a substrate temperature of 600 ° C. Grow to a suitable thickness. Next, after the substrate temperature was set to a relatively high temperature of 740 to 760 ° C. at which the amount of Ga re-evaporated was large, the shutter of the Al cell was opened, and Si-doped n- was formed on the buffer layer 11.
Al x Ga 1-x As Lower first clad layer 121 (thickness 700 to 800 nm)
Grow.
【００１５】引き続いて，Alセルのシャッターを閉じ
て，基板温度をGaの再蒸発量が少ない700〜720℃の比較
的低温に低下させながら，下部第１クラッド層121上
に，Siドープn-GaAs薄層13を成長させる。Siドープn-Ga
As薄層13の厚さは量子効果を示すほど充分に薄く設定さ
れる。また，Siドープn-GaAs薄層13の禁制帯幅は，以下
に述べる活性層14と同じかまたはそれ以上の禁制帯幅と
なるように設定される。Subsequently, the shutter of the Al cell is closed to lower the substrate temperature to a relatively low temperature of 700 to 720 ° C. at which the amount of re-evaporation of Ga is small, and the Si-doped n- A thin GaAs layer 13 is grown. Si-doped n-Ga
The thickness of the As thin layer 13 is set thin enough to exhibit the quantum effect. The forbidden band width of the Si-doped n-GaAs thin layer 13 is set to be the same as or more than the forbidden band width of the active layer 14 described below.
【００１６】そして，Alセルの温度を700〜720℃の範囲
内で調整し，Siドープn-AlxGa1-xAs下部第１クラッド層
121と同じAl混晶比のAlGaAs層が得られるようにした
後，図３に示すように，Alセルのシャッターを開けて，
基板温度700〜720℃にて，薄層13上に，Siドープn-AlxG
a1-xAs上部第１クラッド層122（厚さ200〜300nm）を成
長させる。さらに，Siセルのシャッターを閉じて，上部
第１クラッド層122上に，ノンドープAlyGa1-yAs活性層1
4（厚さ80〜100nm）を成長させた後，Beセルのシャッタ
ーを開けて，活性層14上に，Beドープp-AlxGa1-xAs下部
第２クラッド層161（厚さ200〜300nm）を成長させる。Then, the temperature of the Al cell was adjusted within the range of 700 to 720 ° C., and the Si-doped n-Al x Ga 1-x As lower first clad layer was formed.
After the AlGaAs layer with the same Al mixed crystal ratio as 121 was obtained, the shutter of the Al cell was opened, as shown in FIG.
Si-doped n-Al x G on thin layer 13 at substrate temperature 700-720 ℃
a 1-x As upper first cladding layer 122 (thickness 200 to 300 nm) is grown. Further, the shutter of the Si cell is closed, and the non-doped Al y Ga 1-y As active layer 1 is formed on the upper first cladding layer 122.
After growing 4 (thickness: 80 to 100 nm), the Be cell shutter is opened, and the Be-doped p-Al x Ga 1-x As lower second cladding layer 161 (thickness: 200 to 300nm) to grow.
【００１７】引き続いて，図１に示すように，Alセルの
シャッターを閉じ，基板温度をGaの再蒸発量が多い740
〜760℃の比較的高温に上昇させながら，下部第２クラ
ッド層161上に，Beドープp-GaAs薄層15を成長させる。B
eドープp-GaAs薄層15の厚さは量子効果を示すほど充分
に薄く設定される。また，Beドープp-GaAs薄層15の禁制
帯幅は，上記の活性層14と同じかまたはそれ以上の禁制
帯幅となるように設定される。Subsequently, as shown in FIG. 1, the shutter of the Al cell was closed and the substrate temperature was adjusted so that the amount of re-evaporation of Ga was high.
The Be-doped p-GaAs thin layer 15 is grown on the lower second cladding layer 161 while being raised to a relatively high temperature of ˜760 ° C. B
The thickness of the e-doped p-GaAs thin layer 15 is set to be thin enough to exhibit the quantum effect. The forbidden band width of the Be-doped p-GaAs thin layer 15 is set to be the same as or larger than the forbidden band width of the active layer 14.
【００１８】さらに，Alセルの温度を740〜760℃の範囲
内で調整し，Beドープp-AlxGa1-xAs下部第２クラッド層
161と同じAl混晶比のAlGaAs層が得られるようにした
後，Alセルのシャッターを開けて，基板温度740〜760℃
にて，薄層15上に，Beドープp-AlxGa1-xAs上部第２クラ
ッド層162（厚さ700〜800nm）を成長させる。次いで，A
lセルのシャッターを閉じて，基板温度600℃にて，上部
第２クラッド層162上に，Beドープp-GaAsキャップ層17
（厚さ１〜1.5μm）を成長させる。Further, the temperature of the Al cell was adjusted within the range of 740 to 760 ° C., and the Be-doped p-Al x Ga 1-x As lower second cladding layer was formed.
After the AlGaAs layer with the same Al mixed crystal ratio as that of 161, was obtained, the shutter of the Al cell was opened and the substrate temperature was 740 to 760 ℃.
Then, a Be-doped p-Al x Ga 1-x As upper second cladding layer 162 (thickness 700 to 800 nm) is grown on the thin layer 15. Then A
l Close the shutter of the cell and set the Be-doped p-GaAs cap layer 17 on the second upper cladding layer 162 at a substrate temperature of 600 ° C.
Grow (thickness 1-1.5 μm).
【００１９】最後に，基板10の裏面にはn側電極（図示
せず）を形成し，キャップ層17の表面にはp側電極（図
示せず）を形成することにより，図１に示すような半導
体レーザ素子が得られる。Finally, by forming an n-side electrode (not shown) on the back surface of the substrate 10 and a p-side electrode (not shown) on the surface of the cap layer 17, as shown in FIG. It is possible to obtain an excellent semiconductor laser device.
【００２０】なお，上記実施例では，下部第１クラッド
層121および上部第２クラッド層162は比較的高温（740
〜760℃）で形成されるのに対し，上部第１クラッド層1
22，活性層14および下部第２クラッド層161は比較的低
温（700〜720℃）で形成されている。しかし，上部第１
クラッド層122，活性層14および下部第２クラッド層161
の厚さが薄い（例えば，200〜300nm）場合には，成長温
度が比較的低温であっても成長層の表面ホモロジーおよ
び光学的結晶性は良好であるので，活性層14を上記の成
長温度より高い温度で成長させても，得られた半導体レ
ーザ素子の光学的および電気的特性を損なうことはな
い。In the above embodiment, the lower first cladding layer 121 and the upper second cladding layer 162 have a relatively high temperature (740
~ 760 ℃), the upper first cladding layer 1
22, the active layer 14 and the lower second cladding layer 161 are formed at a relatively low temperature (700 to 720 ° C). However, the upper first
Cladding layer 122, active layer 14 and lower second cladding layer 161
If the thickness of the active layer 14 is small (for example, 200 to 300 nm), the surface homology and optical crystallinity of the growth layer are good even if the growth temperature is relatively low. Even if grown at a higher temperature, the optical and electrical characteristics of the obtained semiconductor laser device are not impaired.
【００２１】また，上記実施例では，ブロードエリア型
の半導体レーザ素子について説明したが，本発明の製造
方法は種々のストライプ構造およびレーザ構造を有する
半導体レーザ素子に適用することができる。Further, although the broad area type semiconductor laser device has been described in the above embodiment, the manufacturing method of the present invention can be applied to semiconductor laser devices having various stripe structures and laser structures.
【００２２】[0022]
【発明の効果】本発明の製造方法によれば，活性層の層
厚制御性が向上し，レーザ発振波長の制御が容易な半導
体レーザ素子が得られる。さらに，活性層とクラッド層
との界面が平坦であるだけでなく，両層の光学的結晶性
が良好であるので，光学的および電気的特性に優れた半
導体レーザ素子が得られる。According to the manufacturing method of the present invention, it is possible to obtain a semiconductor laser device in which the controllability of the thickness of the active layer is improved and the laser oscillation wavelength is easily controlled. Furthermore, not only is the interface between the active layer and the cladding layer flat, but the optical crystallinity of both layers is good, so that a semiconductor laser device with excellent optical and electrical characteristics can be obtained.
【図１】本発明の一実施例である半導体レーザ素子の概
略構造を示す断面図である。FIG. 1 is a sectional view showing a schematic structure of a semiconductor laser device according to an embodiment of the present invention.
【図２】図１の半導体レーザ素子の製造工程のうち第１
クラッド層に挿入されるGaAs薄層の成長段階までを示す
断面図である。FIG. 2 is the first of the manufacturing steps of the semiconductor laser device of FIG.
FIG. 3 is a cross-sectional view showing a growing stage of a GaAs thin layer inserted in a clad layer.
【図３】図１の半導体レーザ素子の製造工程のうち下部
第２クラッド層の成長段階までを示す断面図である。3 is a cross-sectional view showing a step of growing the lower second cladding layer in the manufacturing process of the semiconductor laser device of FIG.
【図４】従来の半導体レーザ素子の概略構造を示す断面
図である。FIG. 4 is a sectional view showing a schematic structure of a conventional semiconductor laser device.
10，20 n-GaAs基板 11，21 n-GaAsバッファ層 13 n-GaAs薄層 14，24 AlyGa1-yAs活性層 15 p-GaAs薄層 17，27 p-GaAsキャップ層 22 n-AlxGa1-xAs第１クラッド層 26 p-AlxGa1-xAs第２クラッド層 121 n-AlxGa1-xAs下部第１クラッド層 122 n-AlxGa1-xAs上部第１クラッド層 161 p-AlxGa1-xAs下部第２クラッド層 162 p-AlxGa1-xAs上部第２クラッド層10, 20 n-GaAs substrate 11, 21 n-GaAs buffer layer 13 n-GaAs thin layer 14, 24 Al y Ga 1-y As active layer 15 p-GaAs thin layer 17, 27 p-GaAs cap layer 22 n- Al x Ga 1-x As 1st clad layer 26 p-Al x Ga 1-x As 2nd clad layer 121 n-Al x Ga 1-x As Lower 1st clad layer 122 n-Al x Ga 1-x As Upper first cladding layer 161 p-Al x Ga 1-x As Lower second cladding layer 162 p-Al x Ga 1-x As Upper second cladding layer
───────────────────────────────────────────────────── フロントページの続き (72)発明者 近藤 雅文 大阪市阿倍野区長池町22番22号 シヤープ 株式会社内 (72)発明者 須山 尚宏 大阪市阿倍野区長池町22番22号 シヤープ 株式会社内 (72)発明者 松井 完益 大阪市阿倍野区長池町22番22号 シヤープ 株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masafumi Kondo, 22-22 Nagaike-cho, Abeno-ku, Osaka City, Sharp Corporation (72) Inventor Naohiro Suyama 22-22, Nagaike-cho, Abeno-ku, Osaka City, Sharp Corporation (72) Inventor Matsui Kansai, 22-22 Nagaike-cho, Abeno-ku, Osaka
Claims (1)
導体レーザ素子を製造する方法であって，比較的高い基
板温度でGaAs基板上方にAlxGa1-xAs下部第１クラッド層
を成長させる工程と，基板温度を低下させながら，AlxG
a1-xAs下部第１クラッド層上にGaAs薄層を成長させる工
程と，比較的低い基板温度でGaAs薄層上にAlxGa1-xAs上
部第１クラッド層，AlyGa1-yAs活性層およびAlxGa1-xAs
下部第２クラッド層を順次成長させる工程と，基板温度
を上昇させながら，AlxGa1-xAs下部第２クラッド層上に
GaAs薄層を成長させる工程と，比較的高い基板温度でGa
As薄層上にAlxGa1-xAs上部第２クラッド層を成長させる
工程とを包含する，半導体レーザ素子の製造方法。1. A method of manufacturing a semiconductor laser device using a molecular beam epitaxial growth method, comprising: growing an Al x Ga 1-x As lower first cladding layer above a GaAs substrate at a relatively high substrate temperature. ， Al x G while lowering the substrate temperature
a 1-x As step of growing a GaAs thin layer on the lower first clad layer, and Al x Ga 1-x As upper first clad layer, Al y Ga 1- on the GaAs thin layer at a relatively low substrate temperature y As active layer and Al x Ga 1-x As
A step of sequentially growing the lower second clad layer, and increasing the substrate temperature, on the Al x Ga 1-x As lower second clad layer.
The process of growing a thin GaAs layer and Ga at a relatively high substrate temperature
And a step of growing an Al x Ga 1-x As upper second cladding layer on the As thin layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3220625A JP3072155B2 (en) | 1991-08-30 | 1991-08-30 | Method for manufacturing semiconductor laser device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3220625A JP3072155B2 (en) | 1991-08-30 | 1991-08-30 | Method for manufacturing semiconductor laser device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0563306A true JPH0563306A (en) | 1993-03-12 |
| JP3072155B2 JP3072155B2 (en) | 2000-07-31 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3220625A Expired - Fee Related JP3072155B2 (en) | 1991-08-30 | 1991-08-30 | Method for manufacturing semiconductor laser device |
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| Country | Link |
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| JP (1) | JP3072155B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103500784A (en) * | 2013-09-26 | 2014-01-08 | 厦门乾照光电股份有限公司 | Epitaxial structure, growth process and chip process of near-infrared light emitting diode |
-
1991
- 1991-08-30 JP JP3220625A patent/JP3072155B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103500784A (en) * | 2013-09-26 | 2014-01-08 | 厦门乾照光电股份有限公司 | Epitaxial structure, growth process and chip process of near-infrared light emitting diode |
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| JP3072155B2 (en) | 2000-07-31 |
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