JPH0498894A - Manufacture of ceramic multilayer wiring board - Google Patents
Manufacture of ceramic multilayer wiring boardInfo
- Publication number
- JPH0498894A JPH0498894A JP21624590A JP21624590A JPH0498894A JP H0498894 A JPH0498894 A JP H0498894A JP 21624590 A JP21624590 A JP 21624590A JP 21624590 A JP21624590 A JP 21624590A JP H0498894 A JPH0498894 A JP H0498894A
- Authority
- JP
- Japan
- Prior art keywords
- laminate
- holes
- ceramic
- laminated
- filled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title abstract description 19
- 238000004519 manufacturing process Methods 0.000 title description 7
- 239000004020 conductor Substances 0.000 claims abstract description 14
- 238000010030 laminating Methods 0.000 claims description 5
- 238000003825 pressing Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 16
- 238000005429 filling process Methods 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007569 slipcasting Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はセラミック多層配線基板の製造方法に関し、特
にグリーンシート法により製造されるセラミック多層配
線基板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a ceramic multilayer wiring board, and particularly to a method for manufacturing a ceramic multilayer wiring board manufactured by a green sheet method.
従来のセラミック多層配線基板の製造方法は、特開昭6
2−134997等に示されるようにアルミナ、ガラス
等の粉体を溶剤と混合して泥漿とし、この泥漿をスリッ
プキャスティング法にて成膜してグリーンシートとし、
さらにグリーンシートを所定の形状に切断し、更にパン
チングにてグリーンシートの上下間を接続するためのス
ルーホールを形成し、このスルーホールに印刷法により
導体パターンペーストおよびビアフィルペーストを埋め
込み、このグリーンシートを所定数積層し、加圧/加湿
し熱圧着し、その後、脱バインダー/焼成を実施して基
板を製造する方法であった。The conventional manufacturing method for ceramic multilayer wiring boards is disclosed in Japanese Patent Application Laid-open No. 6
2-134997 etc., powders such as alumina and glass are mixed with a solvent to form a slurry, and this slurry is formed into a film by a slip casting method to form a green sheet,
Furthermore, the green sheet is cut into a predetermined shape, and through-holes are formed by punching to connect the upper and lower parts of the green sheet. Conductor pattern paste and via fill paste are filled into these through-holes by printing, and the green sheet is then cut into a predetermined shape. The method involved laminating a predetermined number of sheets, pressurizing/humidifying and thermocompression bonding, and then removing the binder/baking to produce a substrate.
上述した従来のセラミック多層配線基板の製造方法は、
スルーホール形成・ビアフィル後、積層、熱圧着を行う
工程をとっているため、(1)積層前に導体ペースト抜
けによるビアオープン、
(2)導体ペーストが柱の役割をしてしまうため、スル
ーホールビアが湾曲する、グリーンシート自体に圧力か
かからず、収縮率がばらつくなどの欠点がある。The conventional method for manufacturing the ceramic multilayer wiring board described above is as follows:
After through-hole formation and via filling, the process of laminating and thermocompression bonding is used, so (1) vias are opened due to the conductor paste coming off before lamination, and (2) through-holes are removed because the conductor paste acts as a pillar. There are disadvantages such as the vias are curved, no pressure is applied to the green sheet itself, and the shrinkage rate varies.
本発明のセラミック多層配線基板の製造方法は、導体配
線されたグリーンシートを積層、熱圧着して積層体を形
成し、前記積層体にドリルによりスルーホール形成を行
う第1の工程と、前記積層体に真空吸引機により引圧で
前記スルーホールに導体ペーストの充填を行う第2の工
程とを含んで構成される。The method for manufacturing a ceramic multilayer wiring board of the present invention includes a first step of forming a laminate by laminating green sheets with conductor wiring and thermocompression bonding, and forming a through hole in the laminate with a drill; and a second step of filling the through hole with conductive paste using a vacuum suction machine.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例のセラミック多層配線基板の
製造方法によるグリーンシート積層の一例を示す図、第
2図は本実施例によるセラミックのグリーンシートを積
層し熱圧着した積層体の一例を示す断面図、第3図は本
実施例による積層体のスルーホールに導体ペーストの充
填を行う工程を示す図である。Fig. 1 is a diagram showing an example of laminating green sheets according to the method for manufacturing a ceramic multilayer wiring board according to an embodiment of the present invention, and Fig. 2 is an example of a laminate in which ceramic green sheets according to the present embodiment are laminated and bonded by thermocompression. FIG. 3 is a cross-sectional view showing a process of filling conductive paste into the through-holes of the laminate according to this embodiment.
第1図において、セラミックのグリーンシート1は導体
配線2が施されたシートである。本実施例は、第1の工
程として、まずこのグリーンシート1を積層し、金型に
収納し、熱プレス機により熱圧着し第2図に示すセラミ
ックの積層体3を形成する。この時、ビアフィル工程が
ないためグリーンシート1自体にかかる圧力の安定化か
図れる。In FIG. 1, a ceramic green sheet 1 is a sheet on which conductor wiring 2 is provided. In this embodiment, as a first step, the green sheets 1 are first stacked, placed in a mold, and bonded under heat using a hot press machine to form a ceramic laminate 3 shown in FIG. 2. At this time, since there is no via fill process, the pressure applied to the green sheet 1 itself can be stabilized.
次に、第2図で示すドリル4によりセラミックの積層体
3にスルーホール5の形成を行う。Next, a through hole 5 is formed in the ceramic laminate 3 using a drill 4 shown in FIG.
次に、第3図に示すように、真空吸引機6を用い導体ペ
ースト7を、ドリル4によって形成されたスルーホール
5に充填する。真空吸引機6により減圧されたスルーホ
ール5部分に導体ペースト7がはいりビアフィルされる
。真空で吸引するため、スルーホール5に対する高精度
な位1決めの必要がなく、−度にビアフィルが行えられ
る。Next, as shown in FIG. 3, the through holes 5 formed by the drill 4 are filled with conductive paste 7 using the vacuum suction machine 6. The conductive paste 7 is injected into the through-hole 5 portion which has been depressurized by the vacuum suction device 6 to perform via filling. Since suction is performed using a vacuum, there is no need for highly accurate positioning of the through hole 5, and via filling can be performed in one step.
以上の工程の後、セラミックの積層体3を焼成してセラ
ミック多層配線基板の製造が行われる。After the above steps, the ceramic laminate 3 is fired to produce a ceramic multilayer wiring board.
以上説明したように本発明は、積層・熱ブレス後にスル
ーホール形成・ビアフィルを行う二とにより、ビア抜け
によるビアオープン、熱プレス圧力によるビアペースト
の湾曲、実際のプレス圧がグリーンシートにかからない
ための収縮率のばらつきという従来の欠点をなくすこと
ができる効果がある。As explained above, in the present invention, through-hole formation and via filling are performed after lamination and heat pressing, thereby preventing via opening due to via omission, bending of via paste due to heat press pressure, and preventing actual press pressure from being applied to the green sheet. This has the effect of eliminating the conventional drawback of variation in shrinkage rate.
第1図は本発明の一実施例のセラミック多層配トを積層
し熱圧着した積層体の一例を示す断面図、第3図は本実
施例による積層体のスルーホールの導体ペーストの充填
を行う工程を示す図である。
1・・・グリーンシート、2・・・導体配線、3・・・
積層体、4・・・ドリル、5・・・スルーホール、6・
・・真空吸引機、7・・・導体ペースト。Fig. 1 is a cross-sectional view showing an example of a laminate in which ceramic multi-layered structures according to an embodiment of the present invention are laminated and bonded by thermocompression, and Fig. 3 shows the filling of through-holes in the laminate according to this embodiment with conductive paste. It is a figure showing a process. 1... Green sheet, 2... Conductor wiring, 3...
Laminated body, 4... drill, 5... through hole, 6.
...Vacuum suction machine, 7...Conductor paste.
Claims (1)
層体を形成し、前記積層体にドリルによりスルーホール
形成を行う第1の工程と、前記積層体に真空吸引機によ
り引圧で前記スルーホールに導体ペーストの充填を行う
第2の工程とを含むことを特徴とするセラミック多層配
線基板の製造方法。A first step of forming a laminate by laminating green sheets with conductor wiring and bonding them under heat, forming a through hole in the laminate using a drill, and applying pressure using a vacuum suction machine to form the through hole in the laminate. and a second step of filling with conductor paste.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21624590A JPH0498894A (en) | 1990-08-16 | 1990-08-16 | Manufacture of ceramic multilayer wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21624590A JPH0498894A (en) | 1990-08-16 | 1990-08-16 | Manufacture of ceramic multilayer wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0498894A true JPH0498894A (en) | 1992-03-31 |
Family
ID=16685551
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21624590A Pending JPH0498894A (en) | 1990-08-16 | 1990-08-16 | Manufacture of ceramic multilayer wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0498894A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003229659A (en) * | 2002-02-05 | 2003-08-15 | Murata Mfg Co Ltd | Method for producing electronic component |
JP2006231909A (en) * | 2005-01-26 | 2006-09-07 | Seiko Epson Corp | Liquid jetting head and liquid jetting apparatus |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56147499A (en) * | 1980-04-18 | 1981-11-16 | Hitachi Ltd | Method of manufacturing multilayer ceramic board |
JPS62134997A (en) * | 1985-12-07 | 1987-06-18 | 株式会社村田製作所 | Manufacture of multilayer ceramic substrate |
-
1990
- 1990-08-16 JP JP21624590A patent/JPH0498894A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56147499A (en) * | 1980-04-18 | 1981-11-16 | Hitachi Ltd | Method of manufacturing multilayer ceramic board |
JPS62134997A (en) * | 1985-12-07 | 1987-06-18 | 株式会社村田製作所 | Manufacture of multilayer ceramic substrate |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003229659A (en) * | 2002-02-05 | 2003-08-15 | Murata Mfg Co Ltd | Method for producing electronic component |
JP2006231909A (en) * | 2005-01-26 | 2006-09-07 | Seiko Epson Corp | Liquid jetting head and liquid jetting apparatus |
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