JPH0220036B2 - - Google Patents
Info
- Publication number
- JPH0220036B2 JPH0220036B2 JP57038639A JP3863982A JPH0220036B2 JP H0220036 B2 JPH0220036 B2 JP H0220036B2 JP 57038639 A JP57038639 A JP 57038639A JP 3863982 A JP3863982 A JP 3863982A JP H0220036 B2 JPH0220036 B2 JP H0220036B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- photoconductor
- state imaging
- imaging device
- solid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000003384 imaging method Methods 0.000 claims description 20
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 10
- 239000012212 insulator Substances 0.000 claims description 7
- 230000003287 optical effect Effects 0.000 claims 2
- 238000001444 catalytic combustion detection Methods 0.000 description 10
- 239000011521 glass Substances 0.000 description 6
- 238000002844 melting Methods 0.000 description 6
- 230000008018 melting Effects 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 241000519995 Stachys sylvatica Species 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 206010034972 Photosensitivity reaction Diseases 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 230000036211 photosensitivity Effects 0.000 description 2
- 238000005381 potential energy Methods 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 210000003127 knee Anatomy 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
【発明の詳細な説明】
本発明は、信号走査機能を有する半導体基板と
光導電膜とを組み合わせた構造の固体撮像装置
（以下光導電膜積層型固体撮像装置と称す）に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device having a structure in which a semiconductor substrate having a signal scanning function and a photoconductive film are combined (hereinafter referred to as a photoconductive film stacked solid-state imaging device).
VTRの普及に伴ない、家庭VTR用カメラとし
て固体撮像装置が注目されているが、なかでも光
導電膜積層型固体撮像装置は、高感度で耐ブルー
ミング性を有するため、小型カメラ用として最適
であるといえる。 With the spread of VTRs, solid-state imaging devices are attracting attention as cameras for home VTRs. Among them, photoconductive film-stacked solid-state imaging devices have high sensitivity and blooming resistance, making them ideal for small cameras. It can be said that there is.
走査デイバイスとしては、Ｘ−Ｙアドレス機能
を有するMOS型と、CCD等の電荷転送素子を用
いたものとが主流である。MOS型は、ランダム
ノイズは大きいが、信号電荷量は多くとれる。一
方、CCDを用いたものは、ノイズは少ないが、
信号電荷量も少なく、MOS型とCCD型とは一長
一短であり、甲乙つけ難い。CCD型においては、
信号読み込み用の電極と転送電極とが同一である
共通ゲート型と、別個である独立ゲート型とがあ
り、共通ゲート型は、電極としてポリSi構造でよ
いことから素子としては作りやすいが、寄生容量
の増大や、転送パルス印加時のダイオードからの
リーク電流阻止のため、光導電膜側に必要以上の
電圧が印加されることになり、光導電膜の耐圧お
よびKnee電圧に対しての要求はきびしくなる。
一方、独立ゲート型の場合には、３層ポリSi構造
が必要であり、作製しにくいとともに、光導電膜
の下地としての段差も大きくなる傾向を示すが、
全体的な特性としては非常に良いものが得られ
る。 The mainstream scanning devices are MOS type devices having an X-Y address function and devices using charge transfer elements such as CCDs. The MOS type has large random noise, but can capture a large amount of signal charge. On the other hand, those using CCD have less noise, but
The amount of signal charge is also small, and the MOS type and CCD type have advantages and disadvantages, and it is difficult to choose between them. In the CCD type,
There is a common gate type in which the signal reading electrode and the transfer electrode are the same, and an independent gate type in which they are separate.The common gate type is easy to manufacture as an element because it can use a poly-Si structure as the electrode, but it is free from parasitics. In order to increase the capacitance and prevent leakage current from the diode when applying a transfer pulse, a voltage higher than necessary is applied to the photoconductive film side, and the requirements for the withstand voltage and knee voltage of the photoconductive film are It gets tough.
On the other hand, in the case of the independent gate type, a three-layer poly-Si structure is required, which is difficult to fabricate and also tends to increase the level difference as a base for the photoconductive film.
Very good overall characteristics can be obtained.
上記のような光導電膜積層型固体撮像装置は、
小型化する程、よりその有意性がでてくる。小型
化は集積密度の増加を伴なうが、配線抵抗のた
め、配線の厚みや酸化膜厚を減少させることは非
常に困難である。さらに、一絵素あたり使用可能
なスペースも狭くなる。この結果、小型化は急峻
な段差を生じ、積層すべき光導電膜の耐圧として
は、減少する方向となると共に、コンタクト不良
が多く、カメラとしては、特性劣化や歩留り低下
を生じ、また動作範囲の狭いものとなる。また半
導体基板中のダイオード部と光導電膜は、絵素ご
とに独立した電極によりコンタクトをとる必要が
あるが、ダイオード寸法のスケールダウンと急峻
な段差のために、直接コンタクトを取ることは困
難であり、まずダイオードとコンタクトをとる電
極（（以下コンタクト用電極と称す）を形成し、
この電極の平坦部でもう一度光導電膜の一方の電
極とのコンタクトを取るようにされる。前記独立
ゲート型CCDの場合、この平坦部の面積は狭く、
光導電体の電極とのコンタクトがとれたとして
も、急峻な段差は防ぎきれない。 The photoconductive film stacked solid-state imaging device as described above is
The smaller the size, the more significant it becomes. Although miniaturization is accompanied by an increase in integration density, it is very difficult to reduce interconnect thickness and oxide film thickness due to interconnect resistance. Furthermore, the usable space per picture element becomes narrower. As a result, miniaturization causes a steep step difference, and the withstand voltage of the photoconductive film to be laminated tends to decrease, and there are many contact failures, resulting in deterioration of camera characteristics and decrease in yield, and the operating range. It becomes narrow. In addition, it is necessary to make contact between the diode part in the semiconductor substrate and the photoconductive film using independent electrodes for each picture element, but it is difficult to make direct contact due to the downscaling of the diode dimensions and the steep step difference. First, an electrode (hereinafter referred to as a contact electrode) that makes contact with the diode is formed,
The flat part of this electrode is again brought into contact with one of the electrodes of the photoconductive film. In the case of the independent gate type CCD, the area of this flat part is small;
Even if contact can be made with the photoconductor electrode, steep steps cannot be prevented.
走査デイバイスとして独立ゲート型CCDを用
いた従来の光導電膜積層型固体撮像装置について
第１図及び第２図を用いてさらに説明する。第１
図は一絵素の断面図、第２図は複数の絵素の平面
図であり、第２図においては図面を理解し易くす
るための光導電膜およびその電極等は省略してい
る。第１図及び第２図において、１はＰ型半導体
基板であり、このＰ型半導体基板１には、ダイオ
ード部２を構成するn+型領域と、CCDのn-ウエ
ル３を構成するn-型領域とが形成されている。
このn-ウエル３には一部電位障壁を形成し、二
相駆動で転送動作を行なわせている。４は前記ダ
イオード部２からｎ−ウエル３に信号を読み込む
ためのゲート電極（以下リードゲートと称す）で
あり、５はCCDの転送電極である。これらの電
極４，５の下には、ゲート酸化膜６が形成されて
いる。７はLOCOSであり、その下にチヤネルス
トツプ領域としてP+層８が形成されている。９
はコンタクト電極１０とリードゲート４及び転送
電極５とを絶縁するための酸化膜である。コンタ
クト電極１０上には、一部を除いてPSG等の低
融点ガラス１１が形成され、メルトフローの後、
（Zn1-xCdxTe）1-y（In2Te3）y
０≦ｘ≦１、０≦ｙ≦0.3
から成る光導電体１２の電極１３とコンタクト電
極１０とは電気的に接続される。光導電体１２の
上には透明電極１４が形成され、透明電極１４側
より入射光イが入射する。なお第２図において、
３ａはＮ−ウエル３のポテンシヤルエネルギが高
いストレージ部で、ｎ−ウエル３の他の部分はポ
テンシヤルエネルギが低いバリヤ部となつてい
る。また１５はダイオード部２からｎ−ウエル３
に信号を読み込むためのMOS FETのチヤネル
である。またＸ−Ｙは水平方向を示し、Ｙ−Ｚは
垂直方向を示す。 A conventional photoconductive film stacked solid-state imaging device using an independent gate type CCD as a scanning device will be further explained with reference to FIGS. 1 and 2. 1st
The figure is a cross-sectional view of one picture element, and FIG. 2 is a plan view of a plurality of picture elements. In FIG. 2, the photoconductive film and its electrodes are omitted to make the drawing easier to understand. In FIGS. 1 and 2, 1 is a P-type semiconductor substrate, and this P-type semiconductor substrate 1 includes an n + type region constituting a diode section 2 and an n - type region constituting an n - well 3 of a CCD . A mold region is formed.
A potential barrier is partially formed in this n - well 3, and the transfer operation is performed by two-phase drive. 4 is a gate electrode (hereinafter referred to as a read gate) for reading a signal from the diode portion 2 to the n-well 3, and 5 is a transfer electrode of the CCD. A gate oxide film 6 is formed under these electrodes 4 and 5. 7 is a LOCOS, under which a P + layer 8 is formed as a channel stop region. 9
is an oxide film for insulating the contact electrode 10 from the read gate 4 and the transfer electrode 5. A low melting glass 11 such as PSG is formed on the contact electrode 10 except for a part, and after melt flow, (Zn 1-x Cd x Te) 1-y (In 2 Te 3 ) y 0≦x The electrode 13 of the photoconductor 12 and the contact electrode 10 are electrically connected so that ≦1, 0≦y≦0.3. A transparent electrode 14 is formed on the photoconductor 12, and incident light is incident from the transparent electrode 14 side. In addition, in Figure 2,
3a is a storage part of the N-well 3 with high potential energy, and the other part of the N-well 3 is a barrier part with low potential energy. In addition, 15 is from the diode section 2 to the n-well 3.
This is a MOS FET channel for reading signals into the MOS FET. Further, X-Y indicates the horizontal direction, and Y-Z indicates the vertical direction.
前記転送電極５、リードゲート電極４、コンタ
クト電極１０は、ポリSiで形成されるが、ポリSi
の比抵抗が大きいため、通常5000Å以上の厚みを
必要とする。第２図に示す従来例の場合、３層ポ
リSi構造となるため、1.5μｍ以上の段差が生じ
る。したがつて、直接ダイオード部２と光導電体
１２の電極１３とのコンタクトをとると、断線や
光導電体１２の耐圧劣化をまねく。この段差を緩
和するために、低融点ガラス１１で段差緩和を行
なうと、ダイオード部２にコンタクトホールを形
成する必要が生じるが、ダイオード部２のまわり
の急峻な段差のため、精度良くコンタクトホール
を形成することは非常に困難である。コンタクト
電極１０を用いると、ダイオード部２でのコンタ
クトに関しては上記の欠点を防ぐことが可能であ
るが、コンタクト電極１０と光導電体１２の電極
１３とのコンタクトの場所は、平坦でかつ周辺部
に壁となる段差がないことが望ましいにもかかわ
らず、第１図から明らかなように、独立ゲート型
CCDの場合、信号読み込み用の電極４と転送電
極５の重なり部分のため、平坦部が狭く、コンタ
クトホールがとりにくいと共に、低融点ガラス１
１のメルトフロー後も急峻な段差を緩和しきれな
い。この結果、コンタクト不良や、光導電体１２
の耐圧不良が発生しやすいという問題があつた。 The transfer electrode 5, read gate electrode 4, and contact electrode 10 are formed of poly-Si.
Because of its high resistivity, it usually requires a thickness of 5000 Å or more. In the case of the conventional example shown in FIG. 2, since it has a three-layer poly-Si structure, a step difference of 1.5 μm or more occurs. Therefore, if contact is made directly between the diode section 2 and the electrode 13 of the photoconductor 12, this may lead to disconnection or deterioration of the breakdown voltage of the photoconductor 12. In order to alleviate this level difference, if the level difference is alleviated using low melting point glass 11, it will be necessary to form a contact hole in the diode part 2. However, because of the steep level difference around the diode part 2, the contact hole cannot be formed accurately. It is very difficult to form. When the contact electrode 10 is used, it is possible to prevent the above-mentioned drawbacks regarding the contact in the diode part 2, but the location of the contact between the contact electrode 10 and the electrode 13 of the photoconductor 12 is flat and near the periphery. Although it is desirable that there be no steps to form walls, as is clear from Figure 1, independent gate type
In the case of a CCD, since the signal reading electrode 4 and the transfer electrode 5 overlap, the flat part is narrow and it is difficult to make a contact hole.
Even after the melt flow in step 1, the steep level difference cannot be alleviated completely. As a result, contact failure and photoconductor 12
There was a problem that breakdown voltage problems were likely to occur.
本発明は上記の点に鑑み、走査デイバイスとし
て独立ゲート型の電荷転送素子を用いた光導電膜
積層型固体撮像装置であつて、半導体基板の段差
を軽減できる固体撮像装置を得ることを目的とす
る。 In view of the above-mentioned points, an object of the present invention is to provide a photoconductive film stacked solid-state imaging device using an independent gate charge transfer element as a scanning device, which can reduce the level difference of a semiconductor substrate. do.
すなわち本発明は、列方向に並んだ復数個のダ
イオード領域と、前記ダイオード領域をソースと
し電荷転送素子の転送部をドレインとする複数個
のMOSFETと、前記ダイオード領域と電気的に
接続されかつ各絵素毎に独立した第一電極と、前
記第一電極の周囲に一部を除いて形成された絶縁
体と、この絶縁体上に各絵素毎に独立しかつ一部
分が前記第一電極に電気的に接続された第二電極
と、前記絶縁体と前記第二電極上の光導電体と、
この光導電体上の透明電極とからなる一次元光セ
ンサ列を行方向に複数個並べた固体撮像装置であ
つて、前記第二電極は、隣接する光センサ列の電
荷転送素子の転送電極の上方位置にて前記第一電
極と接触するものであり、従来のようにゲート電
極と転送電極との重なり合い部分のさらに上方に
第１電極を位置させる必要がないので、半導体基
板の段差を軽減でき、したがつてコンタクト不良
を大幅に低減できると共に、光導電体の耐圧を向
上できるのである。 That is, the present invention includes a plurality of diode regions arranged in a column direction, a plurality of MOSFETs whose sources are the diode regions and whose drains are the transfer portions of charge transfer elements, and which are electrically connected to the diode regions. a first electrode independent for each picture element; an insulator formed around the first electrode except for a part; a second electrode electrically connected to the insulator and a photoconductor on the second electrode;
A solid-state imaging device has a plurality of one-dimensional photosensor columns arranged in the row direction, each consisting of a transparent electrode on a photoconductor, and the second electrode is connected to a transfer electrode of a charge transfer element in an adjacent photosensor column. The first electrode contacts the first electrode at an upper position, and there is no need to position the first electrode further above the overlapping part of the gate electrode and the transfer electrode as in the conventional case, so it is possible to reduce the level difference in the semiconductor substrate. Therefore, contact failures can be significantly reduced, and the withstand voltage of the photoconductor can be improved.
以下本発明の実施例を図面に基づいて説明す
る。第３図は本発明の一実施例における固体撮像
装置の一絵素部分の断面図であり、第１図に示す
構成要素と同一の構成要素には同一の符号を付し
てその説明を省略する。本実施例は、列方向に並
んだ複数個のダイオード部２と、ダイオード部２
をソースとし電荷転送素子の転送部のn-ウエル
３をドレインとする複数個のMOS FETと、ダ
イオード部２と電気的に接続されかつ各絵素毎に
独立した第一電極であるコンタクト電極１０と、
コンタクト電極１０の周囲に一部を除いて形成さ
れた絶縁体である低融点ガラス１１と、この低融
点ガラス１１上に各絵素毎に独立しかつ一部分が
コンタクト電極１０に電気的に接続された第二電
極である光導電体１２の電極１３と、光導電体１
２上の透明電極１４とからなる一次元光センサ列
を行方向に複数個並べた固体撮像装置であつて、
第１図に示す従来例では、コンタクト電極１０と
光導電体１２の電極１３とのコンタクトはダイオ
ード部２に対応するｎ−ウエル（以下電荷転送段
と称す）３上でとられていたが、本実施例では、
隣接する光センサ列の電荷転送段３上でコンタク
トをとつている。この結果を2/3インチサイズの
固体撮像装置で比較すると、従来の場合、コンタ
クト電極１０上の平坦部は19μm2であつたもの
が、本実施例においては30μm2に増加すると共
に、周辺部に全く段差のない構造が得られる。こ
のことはコンタクトホール形成時の写真蝕刻の精
度において、大幅な余裕度をもたらし、コンタク
ト不良の大幅な低減を意味する。さらに、前記コ
ンタクトホール周辺の段差が一絵素内でもつとも
急峻であり、その段差角度は積層される光導電体
１２の耐圧に影響を及ぼすと共に、白点や白線等
の生じる度合を決定する。2/3インチサイズで光
導電体１２として1μｍ厚みの（Zu1-xCdxTe）1-y
（Iu2Te3）yを用いた場合を再び比較すると、従来
構成の場合、段差角度は60゜以上であり、光導電
体１２の耐圧は5V以下、白線は平均５本、白点
は多数あつたのに対し、本実施例では、段差角度
30度であり、光導電体１２の耐圧は15V、白線は
平均0.2本、白点は数個以下となる。 Embodiments of the present invention will be described below based on the drawings. FIG. 3 is a cross-sectional view of one pixel part of a solid-state imaging device according to an embodiment of the present invention, and the same components as those shown in FIG. do. This embodiment includes a plurality of diode sections 2 arranged in a column direction, and a diode section 2.
a plurality of MOS FETs whose source is the n - well 3 of the transfer section of the charge transfer element, and a contact electrode 10 that is electrically connected to the diode section 2 and is an independent first electrode for each picture element. and,
A low melting point glass 11 which is an insulator is formed around the contact electrode 10 except for a part, and on this low melting point glass 11, a part is electrically connected to the contact electrode 10 independently for each picture element. The second electrode 13 of the photoconductor 12 and the second electrode of the photoconductor 1
A solid-state imaging device in which a plurality of one-dimensional photosensor arrays each consisting of a transparent electrode 14 on a top surface of a transparent electrode 14 arranged in a row direction,
In the conventional example shown in FIG. 1, contact between the contact electrode 10 and the electrode 13 of the photoconductor 12 is made on the n-well (hereinafter referred to as charge transfer stage) 3 corresponding to the diode section 2. In this example,
Contact is made on the charge transfer stages 3 of adjacent photosensor rows. Comparing this result with a 2/3-inch solid-state imaging device, the flat area on the contact electrode 10 was 19 μm 2 in the conventional case, but it increased to 30 μm 2 in this embodiment, and the peripheral area A structure with absolutely no steps can be obtained. This provides a large degree of latitude in the accuracy of photolithography when forming contact holes, and means a significant reduction in contact defects. Further, the level difference around the contact hole is steep even within one pixel, and the angle of the level difference affects the withstand voltage of the laminated photoconductor 12 and determines the degree to which white spots, white lines, etc. occur. (Zu 1-x Cd x Te) 1-y with 2/3 inch size and 1 μm thickness as photoconductor 12
Comparing the case using (Iu 2 Te 3 ) y again, in the case of the conventional configuration, the step angle is 60° or more, the withstand voltage of the photoconductor 12 is 5 V or less, the average number of white lines is 5, and there are many white spots. In contrast, in this example, the step angle is
30 degrees, the withstand voltage of the photoconductor 12 is 15V, the average number of white lines is 0.2, and the number of white spots is less than a few.
次に第４図により第２の実施例について説明す
る。第１の実施例の場合、光導電体１２の電極１
３の間隙から半導体基板１へ入射する光を遮光す
るために、透明電極１４上に光導電体１２の電極
１３とは逆パターンの光遮蔽用格子（図示せず）
が設けられる。しかし、光導電体１２の電極間隙
で光生成した電荷は、ほぼ100％信号電荷となる
ため、第１の実施例の構成では光感度の低下をも
たらす。したがつて遮光用の格子は低融点ガラス
１１の中に形成するのが望ましい。そこで第２の
実施例においては、垂直転送段に沿つて、第１の
実施例では緩和できなかつたダイオード部２上の
段差部に遮光体１６を形成している。この遮光体
１６は、厚さ約5000ÅのMo、Ｗ、Taのうちの一
種の金属により形成されるか、あるいは厚さ1000
ÅのMo、Ｗ、Taとその他の材料、例えば厚さ
4000ÅのポリSiとから形成される。また水平方向
に関しては厚さ1000ÅのMo、Ｗ、あるいはTaに
より遮光体（図示せず）が形成されている。第２
の実施例の場合、光導電体１２の耐圧および平均
白線数は、第１の実施例の場合よりもやや良化す
る程度であるが、固体撮像装置としては、開口率
がほぼ100％となるため、第５図に示す照度特性
から明らかなように、光感度は1.5倍以上増大す
る。また遮光用格子パターンとして第１の実施例
に比べて充分大きくとれるため、スメアリングの
防止に関しても安全性が高い。なお第５図におい
て、実線ハが第１の実施例の場合、実線ロが第２
の実施例の場合を示している。 Next, a second embodiment will be explained with reference to FIG. In the case of the first embodiment, the electrode 1 of the photoconductor 12
In order to block the light that enters the semiconductor substrate 1 through the gaps 3, a light-blocking grating (not shown) with a pattern opposite to that of the electrode 13 of the photoconductor 12 is provided on the transparent electrode 14.
is provided. However, since the charges photogenerated in the gap between the electrodes of the photoconductor 12 become almost 100% signal charges, the configuration of the first embodiment results in a decrease in photosensitivity. Therefore, it is desirable to form the light-shielding grating in the low-melting glass 11. Therefore, in the second embodiment, a light shield 16 is formed along the vertical transfer stage at the stepped portion on the diode section 2, which could not be relaxed in the first embodiment. This light shielding body 16 is formed of a metal selected from Mo, W, and Ta with a thickness of about 5000 Å, or is made of a metal of about 1000 Å thick.
Å Mo, W, Ta and other materials, e.g. thickness
It is formed from poly-Si with a thickness of 4000 Å. Further, in the horizontal direction, a light shield (not shown) is formed of Mo, W, or Ta with a thickness of 1000 Å. Second
In the case of the second embodiment, the withstand voltage and average number of white lines of the photoconductor 12 are only slightly improved compared to the first embodiment, but as a solid-state imaging device, the aperture ratio is almost 100%. Therefore, as is clear from the illuminance characteristics shown in FIG. 5, the photosensitivity increases by more than 1.5 times. Furthermore, since the light-shielding grid pattern can be made sufficiently larger than in the first embodiment, safety is high in terms of preventing smearing. In FIG. 5, solid line C indicates the first embodiment, and solid line B indicates the second embodiment.
The case of the embodiment is shown.
なお上記実施例においては、走査デイバイスと
してCCDを用いたが、他の電荷転送素子、例え
ばBBDを用いても同様な効果が得られる。また
光導電体１２としても、（Zn1-xCdxTe）1-y
（In2Te3）yに限られることはなく、他の材料、例
えばアモルフアスSiなどを用いてもよい。 In the above embodiments, a CCD was used as the scanning device, but similar effects can be obtained by using other charge transfer devices, such as BBDs. Also, as the photoconductor 12, (Zn 1-x Cd x Te) 1-y
The material is not limited to (In 2 Te 3 ) y , and other materials such as amorphous Si may also be used.
以上説明したように、本発明にかかる固体撮像
装置によれば、半導体基板の段差を軽減でき、し
たがつてコンタクト不良の大幅な低減、並びに光
導電膜の耐圧向上、キズの大幅な低減を実現し
得、この結果カメラとしての歩留り及び特性の大
幅な改善を図ることができる。 As explained above, according to the solid-state imaging device according to the present invention, it is possible to reduce the level difference in the semiconductor substrate, thereby achieving a significant reduction in contact failures, an improvement in the breakdown voltage of the photoconductive film, and a significant reduction in scratches. As a result, the yield and characteristics of the camera can be greatly improved.
第１図は従来の独立ゲート構造を有する光導電
膜積層型固体撮像装置の一絵素部分の断面図、第
２図は同撮像装置の複数絵素部分の平面図、第３
図及び第４図はそれぞれ本発明の異なる実施例に
おける固体撮像装置の一絵素部分の断面図、第５
図は第３図及び第４図に示す固体撮像装置の照度
特性の説明図である。
１……半導体基板、２……ダイオード部、３…
…Ｎ−ウエル（電荷転送素子）、４……ゲート電
極、５……転送電極、１０……コンタクト電極
（第一電極）、１１……低融点ガラス（絶縁体）、
１２……光導電体、１３……電極（第二電極）、
１４……透明電極、１６……遮光体。
FIG. 1 is a cross-sectional view of one pixel portion of a conventional photoconductive film stacked solid-state imaging device having an independent gate structure, FIG. 2 is a plan view of a multiple pixel portion of the same imaging device, and FIG.
4 and 4 are cross-sectional views of one pixel part of a solid-state imaging device in different embodiments of the present invention, and FIG.
The figure is an explanatory diagram of the illuminance characteristics of the solid-state imaging device shown in FIGS. 3 and 4. 1... Semiconductor substrate, 2... Diode section, 3...
... N-well (charge transfer element), 4 ... gate electrode, 5 ... transfer electrode, 10 ... contact electrode (first electrode), 11 ... low melting point glass (insulator),
12... Photoconductor, 13... Electrode (second electrode),
14...transparent electrode, 16...light shielding body.
Claims (1)
前記ダイオード領域をソースとし電荷転送素子の
転送部をドレインとする複数個のMOSFETと、
前記ダイオード領域と電気的に接続されかつ各絵
素毎に独立した第一電極と、前記第一電極の周囲
に一部を除いて形成された絶縁体と、この絶縁体
上に各絵素毎に独立しかつ一部分が前記第一電極
に電気的に接続された第二電極と、前記絶縁体と
前記第二電極上の光導電体と、この光導電体上の
透明電極とからなる一次元光センサ列を行方向に
複数個並べた固体撮像装置であつて、前記第二電
極は、隣接する光センサ列の電荷転送素子の転送
電極の上方位置にて前記第一電極と接触する固体
撮像装置。 ２ 絶縁体中には、第二電極の間〓から半導体基
板に入射する光を遮光する遮光体が垂直方向及び
水平方向に形成されている特許請求の範囲第１項
記載の固体撮像装置。 ３ 遮光体は、垂直方向と水平方向とで厚みを異
ならせた特許請求の範囲第２項記載の固体撮像装
置。[Claims] A plurality of diode regions arranged in one column,
a plurality of MOSFETs whose sources are the diode regions and whose drains are the transfer portions of the charge transfer elements;
a first electrode electrically connected to the diode region and independent for each picture element; an insulator formed around the first electrode except for a part; a second electrode independent of and partially electrically connected to the first electrode; a photoconductor on the insulator and the second electrode; and a transparent electrode on the photoconductor. A solid-state imaging device in which a plurality of optical sensor columns are arranged in a row direction, wherein the second electrode is in contact with the first electrode at a position above a transfer electrode of a charge transfer element of an adjacent optical sensor column. Device. 2. The solid-state imaging device according to claim 1, wherein a light shielding body is formed in the insulator in the vertical and horizontal directions to shield light from entering the semiconductor substrate from between the second electrodes. 3. The solid-state imaging device according to claim 2, wherein the light shield has different thicknesses in the vertical direction and the horizontal direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57038639A JPS58154977A (en) | 1982-03-10 | 1982-03-10 | Solid-state image pickup element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57038639A JPS58154977A (en) | 1982-03-10 | 1982-03-10 | Solid-state image pickup element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58154977A JPS58154977A (en) | 1983-09-14 |
| JPH0220036B2 true JPH0220036B2 (en) | 1990-05-07 |
Family
ID=12530806
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57038639A Granted JPS58154977A (en) | 1982-03-10 | 1982-03-10 | Solid-state image pickup element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58154977A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60245166A (en) * | 1984-05-18 | 1985-12-04 | Matsushita Electric Ind Co Ltd | Solid state image pick-up device |
| JP2514941B2 (en) * | 1986-12-26 | 1996-07-10 | 株式会社東芝 | Method of manufacturing solid-state imaging device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55104176A (en) * | 1979-02-06 | 1980-08-09 | Matsushita Electric Ind Co Ltd | Solidstate pick up unit |
| JPS56115575A (en) * | 1980-02-15 | 1981-09-10 | Matsushita Electric Ind Co Ltd | Solid state image pickup device |
| JPS5732183A (en) * | 1980-08-04 | 1982-02-20 | Matsushita Electric Ind Co Ltd | Solid state image pickup device |
-
1982
- 1982-03-10 JP JP57038639A patent/JPS58154977A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55104176A (en) * | 1979-02-06 | 1980-08-09 | Matsushita Electric Ind Co Ltd | Solidstate pick up unit |
| JPS56115575A (en) * | 1980-02-15 | 1981-09-10 | Matsushita Electric Ind Co Ltd | Solid state image pickup device |
| JPS5732183A (en) * | 1980-08-04 | 1982-02-20 | Matsushita Electric Ind Co Ltd | Solid state image pickup device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58154977A (en) | 1983-09-14 |
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