JPH01150877A - Measuring instrument for transmission line length - Google Patents
Measuring instrument for transmission line lengthInfo
- Publication number
- JPH01150877A JPH01150877A JP62309326A JP30932687A JPH01150877A JP H01150877 A JPH01150877 A JP H01150877A JP 62309326 A JP62309326 A JP 62309326A JP 30932687 A JP30932687 A JP 30932687A JP H01150877 A JPH01150877 A JP H01150877A
- Authority
- JP
- Japan
- Prior art keywords
- phase difference
- signal
- timing
- transmission line
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 230000005540 biological transmission Effects 0.000 title claims description 32
- 238000012360 testing method Methods 0.000 claims description 28
- 238000001514 detection method Methods 0.000 claims description 20
- 238000005259 measurement Methods 0.000 abstract description 13
- 230000010363 phase shift Effects 0.000 abstract description 5
- 230000003111 delayed effect Effects 0.000 abstract description 2
- 230000000630 rising effect Effects 0.000 description 34
- 238000000034 method Methods 0.000 description 4
- 230000003321 amplification Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 208000018583 New-onset refractory status epilepticus Diseases 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000012030 stroop test Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
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- Locating Faults (AREA)
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- Monitoring And Testing Of Transmission In General (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、遠端開放の伝送線路にノ４ルスを送出して得
られる反射波形から伝送線路長を測定する伝送線路長測
定装置に関し、特に複数の試験ピンを有する集積回路試
験装置等において、該試験ピンに対応して設置された試
験バタン出力／試験結果判定回路から、被試験回路の入
出力ビンに至る伝送線路長の高精度測定等に適した伝送
線路長測定装置に関する。Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a transmission line length measuring device that measures the length of a transmission line from a reflected waveform obtained by sending a signal to a transmission line with an open far end. Especially in integrated circuit testing equipment that has multiple test pins, high-precision measurement of the transmission line length from the test slam output/test result judgment circuit installed corresponding to the test pin to the input/output bin of the circuit under test. The present invention relates to a transmission line length measuring device suitable for use in applications such as transmission line length measurement.
（従来の技術）
集積回路試験装置の試験タイミング精度を維持するため
に必要なタイミング補正においては、集積回路試験装置
の試験ピンに対応して設置された試験１４タン出力／試
験結果判定回路から被試験回路の入出力ビンに至る伝送
線路長の、試験ピン間ばらつきによって生ずるタイミン
グ誤差を補正することが主要な処理項目の１つとなって
いる。従来においてはこのような伝送線路長の測定にお
いて、第４図に示す従来技術の−例の如く、出力タイミ
ングを高精度、高時間分解能で遅延制御できる基準タイ
ミング発生回路ＲＴＧを用意し、前記被試験回路１の入
出力ピン２を未接続として該伝送線路３の端点を開放し
た状態で、試験ノＪ？ルス発生回路ＤＲから試験パルス
を送出することによって得られる反射波形の第１の立上
りエツジｉの中間レベルを試験結果判定回路ＳＤのしき
い値レベル入力ＲＶに設定し、該立上シエッジａの立上
シ予測タイミングの近傍で基準タイミングを２分法等に
従って移動させ、移動の都度基準タイミングノヤルスと
反射パルスの第１の立上シエッジａとの位相差を試験結
果判定回路ＳＤで検出し、位相差ゼロとなったときの基
準タイミング発生回路ＲＴＧの遅延設定値から該第１の
立上りエツジ急のタイミングＴａを求め、続いて前記反
射波形の第２の立上シエツジｂの中間レベルを試験結果
判定回路ＳＤのしきい値レベル人力ＲＶに設定し、上述
したのと同様の操作で該第２の立上シエッジｂのタイミ
ングＴｂを求め、（Ｔｂ−Ｔａ）／２を計算して該伝送
線路長の伝搬遅延時間を計測していた。(Prior Art) In the timing correction necessary to maintain the test timing accuracy of integrated circuit testing equipment, the output signal from the test 14 output/test result judgment circuit installed corresponding to the test pin of the integrated circuit testing equipment is used. One of the main processing items is to correct timing errors caused by variations between test pins in the length of the transmission line leading to the input/output bins of the test circuit. Conventionally, in the measurement of such a transmission line length, a reference timing generation circuit RTG capable of delay-controlling the output timing with high accuracy and high time resolution is prepared, as in the example of the prior art shown in FIG. With the input/output pin 2 of the test circuit 1 unconnected and the end point of the transmission line 3 open, test J? The intermediate level of the first rising edge i of the reflected waveform obtained by sending out the test pulse from the pulse generation circuit DR is set to the threshold level input RV of the test result determination circuit SD, and the The reference timing is moved according to the bisection method or the like in the vicinity of the upper predicted timing, and each time the reference timing is moved, the phase difference between the reference timing noyals and the first rising edge a of the reflected pulse is detected by the test result judgment circuit SD. The first rising edge sudden timing Ta is determined from the delay setting value of the reference timing generation circuit RTG when the phase difference becomes zero, and then the intermediate level of the second rising edge b of the reflected waveform is determined as a test result. The threshold level of the judgment circuit SD is set to manual RV, the timing Tb of the second rising edge b is determined by the same operation as described above, and (Tb-Ta)/2 is calculated to determine the timing of the transmission line. The long propagation delay time was measured.
（発明が解決しようとする問題点）
前述の如〈従来技術では、高精度な測定には、高精度、
高時間分解能で遅延制御ができる基準タイミング発生回
路が必要となシ測定器が高価になること、２分法等での
タイミング測定ゆえ一度の測定に複数回の基準タイミン
グ設定・スキニー検出動作が必要となシ測定に時間がか
かる、などの問題を有していた。(Problems to be solved by the invention) As mentioned above, in the prior art, high precision,
A reference timing generation circuit that can perform delay control with high time resolution is required.Measuring equipment becomes expensive.Due to timing measurement using a bisection method, multiple reference timing settings and skinny detection operations are required for one measurement. There were problems such as it took a long time to measure.
（問題点を解決するための手段）
本発明は従来の問題点を解決し、短時間でかつ高精度、
高時間分解能の測定が可能で、しかも回路構成の単純な
伝送線路長測定装置を実現するもので、遠端開放の伝送
線路にパルスを送出して得られる反射波形から伝送線路
長を測定する伝送線路長測定装置において、一定の繰り
返し周期を有する反射波、及び該反射波とは操シ返し周
期がわずかに異なるタイミング比較パルス信号を共通の
被測定入力信号とし、該被測定入力信号しきい値の制御
が可能で、かつ該被測定入力信号間の位相極性に応じて
論理レベルが変化する位相差情報信号を出力する、独立
した２つの位相差検出回路と、該２つの位相差検出回路
の位相差・け雑信号が一致していない間のみ、前記タイ
ミング比較ノクルス信号の分岐信号を通過させるゲート
回路と、該ゲート回路の出力信号パルス数を計数するカ
ウンタとを備えてなることを特徴とする伝送線路長測定
装置を要旨とする。(Means for Solving the Problems) The present invention solves the problems of the prior art, and achieves high accuracy in a short time.
This is a transmission line length measuring device that is capable of high time resolution measurement and has a simple circuit configuration.It is a transmission line length measurement device that measures the transmission line length from the reflected waveform obtained by sending a pulse to a transmission line with an open far end. In a line length measuring device, a reflected wave having a constant repetition period and a timing comparison pulse signal whose repetition period is slightly different from that of the reflected wave are used as a common input signal to be measured, and the threshold value of the input signal to be measured is set as a common input signal to be measured. two independent phase difference detection circuits that output a phase difference information signal whose logic level changes according to the phase polarity between the input signals to be measured; It is characterized by comprising a gate circuit that allows a branch signal of the timing comparison Noculus signal to pass through only while the phase difference and noise signals do not match, and a counter that counts the number of output signal pulses of the gate circuit. The gist of this paper is a transmission line length measuring device.
（作用）
本発明の伝送線路長測定装置は反射で生ずる階段状の立
上りエツジの、第１の立上９エツジのタイミングと第２
の立上シエツジのタイミングを個々に、該反射波とはわ
ずかに異なる繰り返しレートを有するタイミング比較パ
ルスの立上シエッジのタイミングと、位相差検出回路で
直接比較し、両者の比較結果（位相差情報）の簡単なデ
ィジタル処理によって伝送線路長（伝搬遅延時間）を高
精度に測定することができる。(Function) The transmission line length measuring device of the present invention is capable of adjusting the timing of the first rising edge and the second rising edge of the stepped rising edge caused by reflection.
A phase difference detection circuit directly compares the timing of the rising edge of each pulse with the timing of the rising edge of a timing comparison pulse having a repetition rate slightly different from that of the reflected wave. ) The transmission line length (propagation delay time) can be measured with high precision through simple digital processing.
測定精度は位相差検出回路の時間分解能とタイミング比
較のａｂ返しレートの安定度によってほとんど決まシ、
測定時間分解能は反射波とタイミング比較パルス信号の
繰り返しレート差で決まるため、容易に高精度、高時間
分解能化が実現でき、高精度、高時間分解能な基準タイ
ミング信号発生器や複雑な発振制御回路を必要としない
。The measurement accuracy is mostly determined by the time resolution of the phase difference detection circuit and the stability of the ab return rate of timing comparison.
Since the measurement time resolution is determined by the repetition rate difference between the reflected wave and the timing comparison pulse signal, high precision and high time resolution can be easily achieved, and high precision and high time resolution reference timing signal generators and complex oscillation control circuits can be easily achieved. does not require.
（実施例） 以下図面に基づき、本発明の実施例について説明する。(Example) Embodiments of the present invention will be described below based on the drawings.
なお、実施例は一つの例示であって、本発明の精神を逸
脱しない範囲で種々の変更あるいは改良を行いうろこと
は言うまでもない。It should be noted that the embodiments are merely illustrative, and it goes without saying that various changes and improvements may be made without departing from the spirit of the present invention.
第１図に本発明の基本回路構成の一実施例を示す。伝搬
遅延時間Ｔの線路長を有する伝送線路３の遠端を開放し
て得られる反射波ＲＦの階段状の立上シエッジにおいて
第１の立上シエッジ１ｍ、第２の立上りエツジ’６ｂと
する。前記第１及び第２の立上シエッジａ、ｂには２Ｔ
だけタイミングのずれがある。入力信号のしきい値制御
が可能な位相差検出回路Ｓｌ、Ｓ２が設置されており、
位相差検出回路Ｓ１は前記第１の立上シエッジａとタイ
ミング比較パルスＰＲの立上シエッジの位相差を比較す
べく、両信号が被測定入力信号として被測定信号入力端
子Ｔｌ４１’に加えられ、入力信号しきい値を決める基
準レベル入力ａｌｌ 、 Ｒ１２に各々第１の立上りエ
ツジａの中間レベル、タイミング比較ノ４ルスＰＲの中
間レベルを設定する。同様に位相差検出回路Ｓ２は前記
第２の立上シエツジｂとタイミング比較パルスＰＲの立
上りエツジの位相差を比較すべく、両信号が被測定入力
信号として被測定信号入力端子Ｔ ２ ＊ Ｔ ２’に
加えられ、入力信号しきい値を決める基準レベル人力Ｒ
２１、Ｒ２２に各々第２の立上シエッジｂの中間レベル
、タイミング比較パルスＰＲの中間レベルを設定する。FIG. 1 shows an embodiment of the basic circuit configuration of the present invention. In the stepped rising edge of the reflected wave RF obtained by opening the far end of the transmission line 3 having a line length of propagation delay time T, the first rising edge is 1 m and the second rising edge is '6b. 2T for the first and second rising edges a and b.
There is only a timing difference. Phase difference detection circuits Sl and S2 capable of threshold control of input signals are installed,
In order to compare the phase difference between the first rising edge a and the rising edge of the timing comparison pulse PR, the phase difference detection circuit S1 applies both signals as input signals to be measured to the signal-under-test input terminal Tl41', The intermediate level of the first rising edge a and the intermediate level of the timing comparison pulse PR are set to the reference level inputs all and R12, which determine the input signal threshold, respectively. Similarly, in order to compare the phase difference between the second rising edge b and the rising edge of the timing comparison pulse PR, the phase difference detection circuit S2 connects both signals to the signal-to-be-measured input terminal T2*T2 as the input signal to be measured. ' is added to the reference level human power R that determines the input signal threshold
21 and R22 are set to the intermediate level of the second rising edge b and the intermediate level of the timing comparison pulse PR, respectively.
位相差検出回路Ｓｌ、８２は、タイミング比較／”ルス
ＰＨのタイミングが他方のタイミングに比べて遅れてい
るときに、正の位相ずれ情報としてハイレベルを出力し
、逆の場合は負の位相ずれ情報としてローレベルを出力
するＮＲＺ（Ｎｏｎ−Ｒ＠ｔｕｒｎ ｔｏ Ｚｅｒｏ
）の位相差情報信号ＯＵＴ＋１．ＯＵＴ＋２’ｉそれぞ
れ出力する。位相差情報信号ＯＵＴ ＋ １とＯＵＴ
＋ ２はＥＸ−ＯＲゲート４によって排他論理和かとら
れ、更にタイミング比較／母Ａ／スＰＲとＥＸ−ＯＲゲ
ート４の出力信号ＦＯＲはＡＮＤゲート５によって論理
積がとられ、ＥＸ−ＯＲゲート４の出力ＥＯＲがハイの
ときのみタイミング比較パルスＰＲがＡＮＤゲート５か
ら出力される。ＡＮＤｆ−）５の出力信号ＡＮＤはカウ
ンタ６のクロック端子ＣＫに入力され、ノ々ルス数が計
数される。The phase difference detection circuit Sl, 82 outputs a high level as positive phase shift information when the timing of the timing comparison/"rus PH is delayed compared to the other timing, and in the opposite case, it outputs a high level as positive phase shift information. NRZ (Non-R@turn to Zero) outputs low level as information.
) phase difference information signal OUT+1. Output each of OUT+2'i. Phase difference information signal OUT + 1 and OUT
+2 is exclusive ORed by the EX-OR gate 4, and further, the timing comparison/mother A/S PR and the output signal FOR of the EX-OR gate 4 are ANDed by the AND gate 5, and the EX-OR gate 4 The timing comparison pulse PR is output from the AND gate 5 only when the output EOR of is high. The output signal AND of the ANDf-) 5 is input to the clock terminal CK of the counter 6, and the number of Norse pulses is counted.
第２図は本発明の動作原理を説明するタイムチャートで
ある。反射波ＲＦのｉｂ返しレートをｆ、 １周期をＴ
、とし、反射波ＲＦとわずかに異なる繰り返しレートｆ
、−Δｆと周期Ｔ、＋ΔＴにタイミング比較パルスＰＲ
ｆ：設定する。反射波ＲＦの第１の立上シエッジａとタ
イミング比較パルスＰＲの立上シエッジの位相差を、反
射波ＲＦの第１の立上シエッジａ毎に位相差検出回路Ｓ
１で、反射波ＲＦの第２の立上シエツジｂとタイミング
比較パルスＰＲの立上シの位相差を反射波ＲＦの第２の
立上りエツジｂ毎に位相差検出回路Ｓ２で各々検出し、
第１及び第２の立上υエツジａ、ｂがタイミング比較ノ
憂ルスＰＲの立上シエッジよシもタイミングが早いとき
のみ、位相差情報信号ＯＵＴ＋１ 、 ＯＵＴ＋２とし
て正の位相差を示すＮＲＺのノ・イレペルがそれぞれ連
続して出力される。例えば、タイミング比較パルスＰＲ
のデイニーティレシオが５０チであれば、位相差情報信
号ＯＵＴ ＋ １ 、及びＯＵＴ＋２としてＮＲＺのハ
イレベル信号が、Ｔ、・（Ｔ１＋ΔＴ）／２ΔＴｔ−満
す時間それぞれ連続して出力され、この時間内に出力さ
れるタイミング比較ノ平ルスＰＲの繰り返し回数Ｎｏは
Ｎｏ＝Ｔ、／２ΔＴ
となる。従ってＮｏを求めれば時間分解能ΔＴが次式の
ように求まる。FIG. 2 is a time chart illustrating the operating principle of the present invention. The ib return rate of the reflected wave RF is f, and one period is T.
, and the repetition rate f is slightly different from the reflected wave RF.
, -Δf and period T, timing comparison pulse PR at +ΔT
f: Set. A phase difference detection circuit S detects the phase difference between the first rising edge a of the reflected wave RF and the rising edge a of the timing comparison pulse PR for each first rising edge a of the reflected wave RF.
1, the phase difference between the second rising edge b of the reflected wave RF and the rising edge of the timing comparison pulse PR is detected by a phase difference detection circuit S2 for each second rising edge b of the reflected wave RF,
Only when the first and second rising edges a and b are earlier than the rising edge of the timing comparison signal PR, the NRZ signal that shows a positive phase difference as the phase difference information signals OUT+1 and OUT+2 is detected.・Each irregularity is output consecutively. For example, timing comparison pulse PR
If the daily ratio of The number of repetitions No of the timing comparison signal PR output within the time is No=T, /2ΔT. Therefore, by finding No, the time resolution ΔT can be found as shown in the following equation.
ΔＴ＝Ｔ、／２Ｎ。ΔT=T,/2N.
ｇ１図の基本回路構成において、第１及び第２の立上シ
エッジａ、ｂの入力しきい値を決める基準レベルＲ１１
、Ｒ２１のいずれかを反射波ＦｔＦのハイレベル以上に
設定することにより、その位相差情報出力を常にローレ
ベルに固定でき、従って他方の位相差情報出力がノ・イ
レペルの間、タイミング比較パルスＰＲをカウンタで計
数でき、繰り返し回数Ｎｏが求まる。次に改めて基準レ
ベルＲ１１、Ｒ２１を第１及び第２の立上りエツジａ、
ｂの中間レベルに等しく設定しなおすと、第１及び第２
の立上シエッジ＾、ｂのタイミングのずれに応じて位相
差情報信号ＯＵＴ ＋ １とＯＵＴ ＋ ２の出力タイ
ミングにずれができる。位相差情報信号ＯＵＴ ＋ １
とＯＵＴ ＋ ２のいずれか一方だけがハイレベルのと
きに、カウンタ６はタイミング比較パルスＰＲを計数し
、位相差情報信号ＯＵＴ＋１．ＯＵＴ＋２の１周期内の
タイミング比較パルスＰＲの繰り返し計数同数Ｎと上式
に示したΔＴから第１及び第２の立上りエツジａ。In the basic circuit configuration shown in Figure g1, the reference level R11 determines the input threshold values of the first and second rising edges a and b.
, R21 to a level higher than the high level of the reflected wave FtF, its phase difference information output can always be fixed at a low level. Therefore, while the other phase difference information output is in the range, the timing comparison pulse PR can be counted with a counter, and the number of repetitions No. can be determined. Next, the reference levels R11 and R21 are set again to the first and second rising edges a,
If you set it again equal to the intermediate level of b, the first and second
There is a difference in the output timing of the phase difference information signals OUT + 1 and OUT + 2 in accordance with the difference in the timing of the rising edges ^ and b. Phase difference information signal OUT + 1
When only one of the signals OUT+1 and OUT+2 is at high level, the counter 6 counts the timing comparison pulse PR and outputs the phase difference information signal OUT+1. The first and second rising edges a are calculated from the same number of repetitions N of the timing comparison pulse PR within one cycle of OUT+2 and ΔT shown in the above equation.
５間のタイミング差２Ｔは
２Ｔ＝Ｎ・ΔＴ／２
と計算でき、従って測定すべき伝送線路の伝搬遅延時間
Ｔは、
Ｔ＝Ｎ・ΔＴ／４
で求まる。5 can be calculated as 2T=N·ΔT/2, and therefore, the propagation delay time T of the transmission line to be measured can be found as T=N·ΔT/4.
ｉｂ返しレートは周期の逆数に等しいことから、反射波
ＲＦとタイミング比較ｔ４ルスＰＲの繰り返しレートの
差分Δｆは以下のように表せる。Since the ib return rate is equal to the reciprocal of the period, the difference Δf between the repetition rates of the reflected wave RF and the timing comparison t4 pulse PR can be expressed as follows.
Ｊ ｔ ＝ ＪＴ ＠ｔ 、 ２ ／＜ΔＴ−ｆ、＋１
）上式よシ、例えば被測定パルスの繰り返しレートが５
０ ＭＨｚであるとき、測定時間分解能ΔＴとして１
ｐｓ±０．０Ｏ１ｐｓを必要とする場合にはΔｆを２４
９９．８７５±２．５Ｈｚ程度に設定すればよい。J t = JT @t, 2 /<ΔT−f, +1
) According to the above formula, for example, if the repetition rate of the pulse to be measured is 5
0 MHz, the measurement time resolution ΔT is 1
If ps±0.0O1ps is required, set Δf to 24
It may be set to about 99.875±2.5Hz.
繰り返しレートは信号源としてシンセサイザを用いれば
容易にＩ Ｈｚ程度の分解能とｌＸｌ０−”／分程度の
短期安定度が得られることから、容易に高時間分解能化
が実現できる。As for the repetition rate, if a synthesizer is used as a signal source, a resolution on the order of I Hz and short-term stability on the order of 1X10-''/min can be easily obtained, so that high time resolution can be easily achieved.
測定精度を支配する要因としてはタイミング比較ノ４ル
スＰＲの繰り返しレートの安定度と位相差検出回路８１
．８２の検出分解能が考えられる。操り返しレートの安
定度は上述したようにシンセサイザを用いることにより
十分得られる。The factors governing measurement accuracy are the stability of the repetition rate of the timing comparison PR and the phase difference detection circuit 81.
．． A detection resolution of 82 is possible. Sufficient stability of the repetition rate can be obtained by using the synthesizer as described above.
位相差検出回路としては、第３図（ａ）に示すような回
路〔特許出願中〕を適用することによシ、高分解能化が
実現できる。また、第３図（ｂ）は第３図（ａ）に示し
た回路の動作原理を説明するタイムチャートである。こ
れは被測定パルスＰ１とタイミング比較パルスＰＲを別
個にレベル規格化回路ＬＶＩ 、 ＬＶ２で論理レベル
を規格化し、規格化された両信号の差分を差動増幅回路
Ｄ１で直接増幅し、増幅信号り士をデータ入力として、
被測定パルスＰ１の立上シエッジをもとにストロープノ
’？ルス生成回路ＳＢＧで°生成したストローラパルス
ＳＢでラッチ回路Ｌ１にデータを取シ込むものである。As the phase difference detection circuit, high resolution can be realized by applying a circuit (patent pending) as shown in FIG. 3(a). Further, FIG. 3(b) is a time chart illustrating the operating principle of the circuit shown in FIG. 3(a). This involves standardizing the logic levels of the pulse to be measured P1 and the timing comparison pulse PR separately using level standardization circuits LVI and LV2, and directly amplifying the difference between the two standardized signals using a differential amplifier circuit D1. As data input,
Based on the rising edge of the pulse P1 to be measured, the Stroopno'? Data is input into the latch circuit L1 using the stroker pulse SB generated by the pulse generating circuit SBG.
増幅信号り士は被測定パルスＰ１．タイミング比較パル
スＰＲのタイミングずれが生じている間だけ、論理レベ
ルがローもしくはハイに遷移し、それ以外は中間レベル
となるので、ラッチ回路Ｌ１に与えるデータ入力の極性
を適当に選べば、被測定パルスＰ１の立上りタイミング
がタイミング比較パルスＰＲのそれよシ早いとき、即ち
正の位相ずれのときだけ、ラッチ回路Ｌ１の出力Ｑにハ
イレベルを出力させることができる。検出分解能は差動
増幅回路の過渡応答時の増幅率と全回路を構成するトラ
ンジスタのスイッチング速度で決まり、高速Ｓｉバイポ
ーラプロセス技術を用いることにより数ｐ８の時間分解
能が容易に実現できる。従って、測定時間分解能と時間
精度がともにｐｓオーダの伝送線路長測定装置が本発明
によって実現できる。The amplified signal generator receives the measured pulse P1. The logic level changes to low or high only while the timing deviation of the timing comparison pulse PR occurs, and is at an intermediate level otherwise, so if the polarity of the data input to the latch circuit L1 is appropriately selected, the Only when the rising timing of the pulse P1 is earlier than that of the timing comparison pulse PR, that is, when there is a positive phase shift, can the output Q of the latch circuit L1 be outputted at a high level. The detection resolution is determined by the amplification factor during the transient response of the differential amplifier circuit and the switching speed of the transistors constituting the entire circuit, and by using high-speed Si bipolar process technology, a time resolution of several p8 can be easily achieved. Therefore, according to the present invention, a transmission line length measuring device with measurement time resolution and time accuracy both on the order of ps can be realized.
（発明の効果）
以上の説明から明らかな如く、本発明によれ ４ば、遠
端開放の伝送線路に・々ルスを送出して得られる反射波
形から伝送線路長を測定する伝送線路長測定装置におい
て、一定の繰り返し周期を有する反射波、及び該反射波
とは繰り返し周期がわずかに異なるタイミング比較ノク
ルス信号を共通の被測定入力信号とし、該被測定入力信
号しきい値の制御が可能で、かつ該被測定入力信号間の
位相極性に応じて論理レベルが変化する位相差情報信号
を出力する、独立した２つの位相差検出回路と、該２つ
の位相差検出回路の位相差情報信号が一致していない間
のみ、前記タイミング比較ｔ４ルス信号の分岐信号を通
過させるｆｆ−）回路と、該ゲート回路の出力信号パル
ス数を計数するカウンタとを備えることによシ、従来の
ように高精度、高時間分解能な基準タイミング信号発生
器や複雑な発振制御回路を必要とせず、短時間で高精度
かつ高時間分解能な伝送線路長（伝搬遅延時間）の測定
を実現することができる。(Effects of the Invention) As is clear from the above description, according to the present invention, there is provided a transmission line length measuring device that measures the transmission line length from the reflected waveform obtained by transmitting a signal to a transmission line with an open far end. In this method, a reflected wave having a constant repetition period and a timing comparison Noculus signal having a repetition period slightly different from that of the reflected wave are used as a common input signal to be measured, and the threshold value of the input signal to be measured can be controlled, and two independent phase difference detection circuits that output phase difference information signals whose logic level changes according to the phase polarity between the input signals under test, and a phase difference information signal of the two phase difference detection circuits. By providing an ff-) circuit that passes the branch signal of the timing comparison t4 pulse signal only while the timing comparison t4 pulse signal does not match, and a counter that counts the number of output signal pulses of the gate circuit, high precision as in the conventional method can be achieved. , it is possible to measure the transmission line length (propagation delay time) with high precision and high time resolution in a short time without requiring a high time resolution reference timing signal generator or a complicated oscillation control circuit.
第１図は本発明における伝送線路長測定装置の基本回路
構成の一実施例を示す機能ブロック図、第２図は本発明
における伝送線路長測定装置の動作原理を示すタイムチ
ャート、第３図（ａ）及び（ｂ）は本発明の一構成要素
である位相差検出回路に適用可能な回路構成の一実施例
を示す回路ブロック図及び同回路のタイムチャート、第
４図は従来技術の一実施例を示す機能ブロック図である
。
１・・・被試験回路、２・・・入出力ビン、３・・・伝
送線路、４・・・ＥＸ−ＯＲゲート、５・・・ＡＮＤゲ
ート、６・・・カウンタ、Ｔ・・・伝搬遅延時間、ＤＲ
・・・試験パルス発生回路、ＲＦ・・・反射波、ａ・・
・第１の立上シエッジ、ｂ・・・第２の立上シエッジ、
ＰＲ・・・タイミング比較ノ４ルス、８１．Ｓ２・・・
位相差検出回路、Ｒ１１、Ｒ１２、Ｒ２１、Ｒ２２・・
・入力信号基準レベル、ＯＵＴ＋１ 、 ＯＵＴ＋２・
・・位相差情報信号、ＦＯＲ・・・ＥＸ−ＯＲゲートの
出力、ＡＮＤ・・・ＡＮＤゲートの出力、ＣＫ・・・ク
ロック入力端子、ＬＶＩ 、 ＬＶ２・・・レベル規格
化回路、Ｄｌ・・・差動増幅回路、Ｄ±・・・差動増幅
信号、ＳＢＧ・・・ストロープノ臂ルス生成回路、ＳＢ
・・・ストローブパルス、Ｌｌ・・・ラッチ回路、Ｑ・
・・ラッチ回路出力信号、 ＲＴＧ・・・基準タイミン
グ信号発生回路、ＳＤ・・・試験結果判定回路、ＲＶ・
・・しきい値レベル入力。
第１閏
第３ 図
（Ｑ）
第４図FIG. 1 is a functional block diagram showing an embodiment of the basic circuit configuration of the transmission line length measuring device according to the present invention, FIG. 2 is a time chart showing the operating principle of the transmission line length measuring device according to the present invention, and FIG. a) and (b) are circuit block diagrams showing an example of a circuit configuration applicable to the phase difference detection circuit which is one component of the present invention, and a time chart of the same circuit, and FIG. 4 is an implementation of the prior art. FIG. 2 is a functional block diagram illustrating an example. 1... Circuit under test, 2... Input/output bin, 3... Transmission line, 4... EX-OR gate, 5... AND gate, 6... Counter, T... Propagation delay time, DR
...Test pulse generation circuit, RF...Reflected wave, a...
・First start-up sea edge, b... Second start-up sea edge,
PR...Timing comparison No. 4 Lus, 81. S2...
Phase difference detection circuit, R11, R12, R21, R22...
・Input signal reference level, OUT+1, OUT+2・
...Phase difference information signal, FOR...Output of EX-OR gate, AND...Output of AND gate, CK...Clock input terminal, LVI, LV2...Level standardization circuit, Dl... Differential amplification circuit, D±...Differential amplification signal, SBG...Stroop curve generation circuit, SB
...Strobe pulse, Ll...latch circuit, Q.
...Latch circuit output signal, RTG...Reference timing signal generation circuit, SD...Test result judgment circuit, RV...
...Threshold level input. 1st leap Figure 3 (Q) Figure 4
Claims (1)
形から伝送線路長を測定する伝送線路長測定装置におい
て、一定の繰り返し周期を有する反射波、及び該反射波
とは繰り返し周期がわずかに異なるタイミング比較パル
ス信号を共通の被測定入力信号とし、該被測定入力信号
しきい値の制御が可能で、かつ該被測定入力信号間の位
相極性に応じて論理レベルが変化する位相差情報信号を
出力する、独立した２つの位相差検出回路と、該２つの
位相差検出回路の位相差情報信号が一致していない間の
み、前記タイミング比較パルス信号の分岐信号を通過さ
せるゲート回路と、該ゲート回路の出力信号パルス数を
計数するカウントとを備えてなることを特徴とする伝送
線路長測定装置。In a transmission line length measuring device that measures the length of a transmission line from the reflected waveform obtained by sending a pulse to a transmission line with an open far end, the reflected wave has a constant repetition period, and the reflected wave has a slight repetition period. A phase difference information signal in which different timing comparison pulse signals are used as a common input signal under test, the threshold value of the input signal under test can be controlled, and the logic level changes according to the phase polarity between the input signals under test. two independent phase difference detection circuits that output a signal; a gate circuit that passes a branch signal of the timing comparison pulse signal only while the phase difference information signals of the two phase difference detection circuits do not match; 1. A transmission line length measuring device comprising: a counter for counting the number of output signal pulses of a gate circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30932687A JP2571082B2 (en) | 1987-12-07 | 1987-12-07 | Transmission line length measuring device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30932687A JP2571082B2 (en) | 1987-12-07 | 1987-12-07 | Transmission line length measuring device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01150877A true JPH01150877A (en) | 1989-06-13 |
| JP2571082B2 JP2571082B2 (en) | 1997-01-16 |
Family
ID=17991669
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30932687A Expired - Lifetime JP2571082B2 (en) | 1987-12-07 | 1987-12-07 | Transmission line length measuring device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2571082B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0501722A2 (en) * | 1991-02-26 | 1992-09-02 | Nippon Telegraph And Telephone Corporation | Transmission line length measurement method and apparatus |
| RU2485530C2 (en) * | 2008-12-03 | 2013-06-20 | Абб Рисерч Лтд | Method and system for measurement of power transmission lines length |
-
1987
- 1987-12-07 JP JP30932687A patent/JP2571082B2/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0501722A2 (en) * | 1991-02-26 | 1992-09-02 | Nippon Telegraph And Telephone Corporation | Transmission line length measurement method and apparatus |
| US5321632A (en) * | 1991-02-26 | 1994-06-14 | Nippon Telegraph And Telephone Corporation | Method and apparatus for measuring the length of a transmission line in accordance with a reflected waveform |
| EP0736773A2 (en) * | 1991-02-26 | 1996-10-09 | Nippon Telegraph And Telephone Corporation | Transmission line length measurement method and apparatus |
| EP0736773A3 (en) * | 1991-02-26 | 1996-10-16 | Nippon Telegraph And Telephone Corporation | Transmission line length measurement method and apparatus |
| RU2485530C2 (en) * | 2008-12-03 | 2013-06-20 | Абб Рисерч Лтд | Method and system for measurement of power transmission lines length |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2571082B2 (en) | 1997-01-16 |
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