JP7241879B2 - 電界抑制が向上させられた高電圧半導体装置 - Google Patents
電界抑制が向上させられた高電圧半導体装置 Download PDFInfo
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- JP7241879B2 JP7241879B2 JP2021533644A JP2021533644A JP7241879B2 JP 7241879 B2 JP7241879 B2 JP 7241879B2 JP 2021533644 A JP2021533644 A JP 2021533644A JP 2021533644 A JP2021533644 A JP 2021533644A JP 7241879 B2 JP7241879 B2 JP 7241879B2
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- 239000004065 semiconductor Substances 0.000 title claims description 141
- 230000001629 suppression Effects 0.000 title claims description 130
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 114
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 106
- 239000000463 material Substances 0.000 claims description 68
- 230000005684 electric field Effects 0.000 claims description 47
- 238000001465 metallisation Methods 0.000 claims description 37
- 238000002161 passivation Methods 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 29
- 229910052751 metal Inorganic materials 0.000 claims description 27
- 239000002184 metal Substances 0.000 claims description 27
- 238000002955 isolation Methods 0.000 claims description 24
- 239000004642 Polyimide Substances 0.000 claims description 21
- 229920001721 polyimide Polymers 0.000 claims description 21
- 229920002577 polybenzoxazole Polymers 0.000 claims description 15
- 229920000106 Liquid crystal polymer Polymers 0.000 claims description 14
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 claims description 14
- 230000000903 blocking effect Effects 0.000 claims description 14
- 229920001601 polyetherimide Polymers 0.000 claims description 14
- 230000005669 field effect Effects 0.000 claims description 13
- 239000004697 Polyetherimide Substances 0.000 claims description 12
- 239000004696 Poly ether ether ketone Substances 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 11
- 229920002530 polyetherether ketone Polymers 0.000 claims description 11
- 229910044991 metal oxide Inorganic materials 0.000 claims description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- 239000004593 Epoxy Substances 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 8
- -1 ether ketones Chemical class 0.000 claims description 8
- 229920004738 ULTEM® Polymers 0.000 claims description 7
- 229920002313 fluoropolymer Polymers 0.000 claims description 7
- 239000004811 fluoropolymer Substances 0.000 claims description 7
- 150000004706 metal oxides Chemical class 0.000 claims description 7
- 229920002492 poly(sulfone) Polymers 0.000 claims description 7
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 claims description 3
- JUPQTSLXMOCDHR-UHFFFAOYSA-N benzene-1,4-diol;bis(4-fluorophenyl)methanone Chemical compound OC1=CC=C(O)C=C1.C1=CC(F)=CC=C1C(=O)C1=CC=C(F)C=C1 JUPQTSLXMOCDHR-UHFFFAOYSA-N 0.000 claims 3
- RTZKZFJDLAIYFH-UHFFFAOYSA-N ether Substances CCOCC RTZKZFJDLAIYFH-UHFFFAOYSA-N 0.000 claims 3
- 150000002576 ketones Chemical class 0.000 claims 3
- 229920000412 polyarylene Polymers 0.000 claims 3
- 239000010410 layer Substances 0.000 description 218
- 238000012360 testing method Methods 0.000 description 37
- 235000012431 wafers Nutrition 0.000 description 34
- 238000004519 manufacturing process Methods 0.000 description 23
- 238000013461 design Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 9
- 230000008901 benefit Effects 0.000 description 8
- 229920001296 polysiloxane Polymers 0.000 description 8
- 238000004088 simulation Methods 0.000 description 7
- 238000000151 deposition Methods 0.000 description 6
- 239000003989 dielectric material Substances 0.000 description 6
- 238000007667 floating Methods 0.000 description 6
- 239000002245 particle Substances 0.000 description 6
- 238000011179 visual inspection Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000012795 verification Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 125000003700 epoxy group Chemical group 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 239000011149 active material Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000443 aerosol Substances 0.000 description 1
- 239000003570 air Substances 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000012512 characterization method Methods 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 239000012850 fabricated material Substances 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000007646 gravure printing Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000003607 modifier Substances 0.000 description 1
- 238000009659 non-destructive testing Methods 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/8213—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using SiC technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3192—Multilayer coating
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
- H01L2224/05572—Disposition the external layer being disposed in a recess of the surface the external layer extending out of an opening
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- H—ELECTRICITY
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
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- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05655—Nickel [Ni] as principal constituent
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- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/37124—Aluminium [Al] as principal constituent
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- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
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Description
前記E-field抑制層と、
前記E-field抑制層の上方に少なくとも一部形成されるメタライゼーション層と
を備える、任意の前項に記載の半導体装置。
前記MOSFET素子の表面にわたって形成される1つまたは複数の隔離層と、
前記1つまたは複数の隔離層にわたって形成されるパターン形成された電界(E-field)抑制層であって、前記半導体装置が最大電圧以下で動作しているとき、前記E-field抑制層の上方の電界強度が隣接する材料の誘電強度未満となるように、前記MOSFET素子によって生成される電界強度を抑制するように構成されるパターン形成された電界(E-field)抑制層と
を備える半導体装置。
前記SiC基板に形成される終端領域と、
前記SiC基板に形成される金属接触領域と、
終端領域にわたって形成される電界(E-field)抑制層であって、前記E-field抑制層は、金属接触領域にわたる開口でパターン形成され、前記E-field抑制層は、前記半導体装置が最大電圧以下で動作しているとき、前記E-field抑制層の上方の電界強度が隣接する材料の誘電強度未満となるような厚さを備える、電界(E-field)抑制層と
を備える半導体装置。
12 電力源
14 電気負荷
16 半導体装置
18 制御装置
20 nチャネル炭化ケイ素金属酸化膜半導体電界効果トランジスタ、SiC MOSFET装置、SiC MOSFETダイ
22 半導体基板層、SiC基板層
24 半導体ドリフト層
26 ブロッキング接合部
28 接合終端領域、JTE領域
30 不動態層
32 誘電層
34 製作後の材料または環境、素子
36 E-field抑制層
40 モデルの結果
42 y軸
44 x軸
46 曲線
48、50、52 点
60 試験ウェーハ
62 ウェーハ60の一部分
64 ゲート金属
66 ソース金属パッド
70 電界
72 接合要素
74 メタライゼーション、POLメタライゼーション層
Claims (18)
- 対応する動作最大電圧を有する半導体装置であって、
終端領域にわたって形成される電界(E-field)抑制層であって、前記E-field抑制層は、前記終端領域上の隔離層に結合された膜を含み、前記E-field抑制層は、金属接触領域にわたる開口でパターン形成され、前記E-field抑制層は、前記半導体装置が前記最大電圧で動作しているとき、前記E-field抑制層の上方の電界強度が隣接する材料の誘電強度未満となるような厚さを備え、
前記隔離層は、前記E-field抑制層の下方に形成される不動態層と、前記不動態層の上及び前記E-field抑制層の下において異なる材料で形成された誘電層とを含む、電界(E-field)抑制層と、
電力オーバーレイ(POL)構造を形成するために、前記E-field抑制層の上に少なくとも部分的に形成されたメタライゼーション層と、を備え、
前記POL構造は50μm~200μmの範囲で厚さを備える前記E-field抑制層を備え、
前記メタライゼーション層は前記開口へと延び、前記メタライゼーション層は、前記開口を通じて前記金属接触領域に電気的に結合される、半導体装置。 - トランジスタ、ダイオード、MOSFET、JFET、IGBT、またはサイリスタを更に備える、請求項1に記載の半導体装置。
- 基板と、
前記基板に形成される半導体ドリフト層と、
前記ドリフト層に形成されるブロッキング接合部と、
前記半導体ドリフト層に形成され、前記ブロッキング接合部に横で隣接する接合終端領域と
をさらに備える、請求項1に記載の半導体装置。 - 前記基板または前記ドリフト層の少なくとも一方は炭化ケイ素(SiC)を含む、請求項3に記載の半導体装置。
- 前記最大電圧は900ボルトから10KVまでである、請求項1に記載の半導体装置。
- 前記E-field抑制層は、ポリイミド、ポリベンゾオキサゾール(PBO)、エポキシ、ビスベンゾシクロブテン(BCB)、ポリエーテルイミド(Ultem)、ポリエーテルイミド、液体結晶ポリマー(LCP)、ポリスルホン、ポリエーテルエーテルケトン(PEEK)、ポリアリーレンエーテルケトン、フルオロポリマー、またはそれらの組み合わせを含む、請求項1に記載の半導体装置。
- 前記メタライゼーション層はニッケル-金(NiAu)を伴う銅(Cu)を備える、請求項1に記載の半導体装置。
- 前記E-field抑制層は、ロールまたはシートの形態で適用可能な材料を含む、請求項1に記載の半導体装置。
- 金属酸化膜半導体電界効果トランジスタ(MOSFET)素子と、
前記MOSFET素子の表面にわたって形成される1つまたは複数の隔離層と、
前記1つまたは複数の隔離層にわたって形成されるパターン形成され、且つ前記MOSFET素子の終端領域上の前記1つまたは複数の隔離層の一つの隔離層に結合された膜を含む電界(E-field)抑制層と、電力オーバーレイ(POL)構造を形成するために、前記E-field抑制層の上に少なくとも部分的に形成されたメタライゼーション層と、を備える、対応する動作最大電圧を有する半導体装置であって、
前記電界(E-field)抑制層は、前記半導体装置が前記最大電圧で動作しているとき、前記E-field抑制層の上方の電界強度が隣接する材料の誘電強度未満となるように、前記MOSFET素子によって生成される電界強度を抑制するように構成され、
前記POL構造は50μm~200μmの範囲で厚さを備える前記E-field抑制層を備え、
前記1つまたは複数の隔離層は、前記E-field抑制層の下方に形成される不動態層と、前記不動態層の上及び前記E-field抑制層の下において異なる材料で形成された誘電層とを含み、
前記メタライゼーション層は開口へと延び、前記メタライゼーション層は、前記開口を通じて金属接触領域に電気的に結合される、半導体装置。 - 前記E-field抑制層は、ポリイミド、ポリベンゾオキサゾール(PBO)、エポキシ、ビスベンゾシクロブテン(BCB)、ポリエーテルイミド(Ultem)、ポリエーテルイミド、液体結晶ポリマー(LCP)、ポリスルホン、ポリエーテルエーテルケトン(PEEK)、ポリアリーレンエーテルケトン、フルオロポリマー、またはそれらの組み合わせを含む、請求項9に記載の半導体装置。
- 前記E-field抑制層は前記MOSFET素子の終端領域を覆い、前記E-field抑制層は、前記E-field抑制層の下にある、SiC MOSFET素子のゲートパッド、ソースパッド、またはそれら両方を露出させるようにパターン形成される、請求項9に記載の半導体装置。
- 前記E-field抑制層の上方に少なくとも一部配置され、前記SiC MOSFET素子の前記ゲートパッド、前記ソースパッド、またはそれら両方に電気的に結合されるように、前記パターン形成されたE-field抑制層の開口へと延びるメタライゼーション層をさらに備える、請求項11に記載の半導体装置。
- 前記メタライゼーション層は、前記SiC MOSFET素子の前記ゲートパッド、前記ソースパッド、またはそれら両方の領域より大きい領域を備える、請求項12に記載の半導体装置。
- 前記MOSFET素子は炭化ケイ素(SiC)を含む、請求項9に記載の半導体装置。
- 炭化ケイ素(SiC)基板と、
前記SiC基板に形成される終端領域と、
前記SiC基板に形成される金属接触領域と、
前記終端領域にわたって形成され、且つ前記終端領域上の隔離層に結合された膜を含む、電界(E-field)抑制層と、
電力オーバーレイ(POL)構造を形成するために、前記E-field抑制層の上に少なくとも部分的に形成されたメタライゼーション層と、
を備え、対応する動作最大電圧を有する半導体装置であって、
前記E-field抑制層は、前記金属接触領域にわたる開口でパターン形成され、前記E-field抑制層は、前記半導体装置が前記最大電圧で動作しているとき、前記E-field抑制層の上方の電界強度が隣接する材料の誘電強度未満となるような厚さを備え、
前記隔離層は、前記E-field抑制層の下方に形成される不動態層と、前記不動態層の上及び前記E-field抑制層の下において異なる材料で形成された誘電層とを含み、
前記POL構造は50μm~200μmの範囲で厚さを備える前記E-field抑制層を備え、
前記メタライゼーション層は前記開口へと延び、前記メタライゼーション層は、前記開口を通じて前記金属接触領域に電気的に結合される、を備える半導体装置。 - 前記E-field抑制層はおおよそ80μm~100μmの範囲で厚さを備える、請求項15に記載の半導体装置。
- 前記メタライゼーション層は前記開口へと延び、前記メタライゼーション層は、前記開口を通じて前記金属接触領域に電気的に結合される、請求項15に記載の半導体装置。
- 前記E-field抑制層は、ポリイミド、ポリベンゾオキサゾール(PBO)、エポキシ、ビスベンゾシクロブテン(BCB)、ポリエーテルイミド(Ultem)、ポリエーテルイミド、液体結晶ポリマー(LCP)、ポリスルホン、ポリエーテルエーテルケトン(PEEK)、ポリアリーレンエーテルケトン、フルオロポリマー、またはそれらの組み合わせを含む、請求項15に記載の半導体装置。
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