JP5714026B2 - 半田拡散保護を伴う半導体チップデバイス - Google Patents
半田拡散保護を伴う半導体チップデバイス Download PDFInfo
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- JP5714026B2 JP5714026B2 JP2012546016A JP2012546016A JP5714026B2 JP 5714026 B2 JP5714026 B2 JP 5714026B2 JP 2012546016 A JP2012546016 A JP 2012546016A JP 2012546016 A JP2012546016 A JP 2012546016A JP 5714026 B2 JP5714026 B2 JP 5714026B2
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- semiconductor chip
- thermal interface
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Description
次に図4を参照すると、この図は図1に示される方位からひっくり返された半導体チップ20の断面図であり、材質除去のための種々の技術によって溝185が半導体チップ20内に形成されてよい。例示的な実施形態においては、エッチングマスク195が半導体チップ20の表面190に適用されてよく、エッチングマスク195は、溝185のための所望のフットプリントを有するように位置させられると共に形成される開口200を有するようにパターニングされてよい。マスク195は下層のアクティブデバイス領域40を保護する。この段階では、半導体チップ20には既に接着層120が設けられている。バリア135を確立するためのプロセスステップは、必要に応じてウエハレベル又はダイレベルの段階で半導体チップ上で行われてよいことが理解されるべきである。マスク195内での開口200のリソグラフィパターニングに次いで、半導体チップ20内に溝185を確立するために、深い溝エッチングが行われてよい。溝185は、上述したようにアクティブデバイス領域40の深さx2よりも有利に大きいx1の深さまで有利にエッチングされる。深い溝エッチングは、比較的異方性のエッチングプロファイルをもたらすように選択されるパラメータを伴うプラズマエッチングによって行われてよい。例示的なエッチング薬品は、CF4、SF6、NF3、H2/Cl2/SiCl4等を含む。随意的には、溝185を形成するために、保護マスクを伴う又は伴わないレーザ切除が用いられてよい。
Claims (20)
- 第1の主面(35)及び反対側の第2の主面(36)を有する基板と、前記基板内へ第1の距離だけ延びる第1のアクティブ回路部分(40)と、を含む第1の半導体チップ(20)を提供することと、
前記第1のアクティブ回路部分(40)を包囲するが前記第1のアクティブ回路部分(40)からは横方向に隔てられ且つ前記基板内へ前記第1の距離よりも大きい第2の距離だけ延びるバリア(135)を前記第1の半導体チップ(20)内に形成することと、
複数の相互接続構造(45)を用いて第2の半導体チップ(15)を前記第1の半導体チップ(20)に結合することであって、前記第2の半導体チップは、前記第1の半導体チップの前記第2の主面(36)に対向するが間隙(130)を介して隔てられた第3の主面を有することと、
前記第1の半導体チップの前記第1の主面と、前記相互接続構造から横方向に隔てられた前記第3の主面の一部とに半田型熱インタフェース材質(90)を位置させることと、
を備える製造の方法。 - 材質が前記間隙(130)に入ることを防止するために前記第1のアクティブ回路(40)部分を包囲するダイク(125)を前記第1及び第2の半導体チップの間に位置させることを備える請求項1の方法。
- 前記バリア(135)を形成することは、前記第1の半導体チップ(20)内に溝(185)を形成することと、前記溝内に絶縁性材質(210)を堆積させることと、を備える請求項1の方法。
- 前記バリア(135’)を形成することは、金属粒子移動を妨げるイオン(215)を前記基板の部分内に注入することを備える請求項1の方法。
- 第1及び第2の主面(35)(36)と第1の周囲壁(37)とを含む第1の半導体チップ(20)を第2の周囲壁(34)を含む第2の半導体チップ(15)に前記第1及び第2の半導体チップの間の間隙(130)を介して結合することと、
少なくとも前記第1の半導体チップの前記第1の周囲壁(37)、前記第1の半導体チップの前記第2の主面、前記第2の半導体チップの第1の主面の一部及び前記第2の周囲壁を覆うバリア層(265)を形成することと、
前記第1の周囲壁(37)の周囲に半田型熱インタフェース材質(90)を位置させることと、を備え、
前記バリア層(265)は前記第1の周囲壁内への前記半田型熱インタフェース材質の拡散を抑制する製造の方法。 - 前記第1の半導体チップ(20)は第1のアクティブ回路部分(40)を備え、前記方法は、材質が前記間隙(130)に入ることを防止するために前記第1のアクティブ回路部分を包囲するダイク(125)を前記第1及び第2の半導体チップの間に位置させることを備える請求項5の方法。
- 前記第1の半導体チップ(20)は第1及び第2の主面(35)(36)を含み、前記第2の半導体チップ(15)は第1及び第2の主面(32)(33)並びに第2の周囲壁(34)を含み、前記方法は、前記第1の半導体チップ(20)の前記第2の主面(36)、前記第2の半導体チップ(15)の前記第1の主面(32)の一部分、及び前記第2の周囲壁(34)を覆うように前記バリア層(265)を形成することを備える請求項5の方法。
- 第1及び第2の主面(35)(36)並びに第1の周囲壁(37)を含む第1の半導体チップ(20)を第1及び第2の主面を含む第2の半導体チップ(15)に前記第1及び第2の半導体チップの間の間隙(130)を介して結合することと、
前記第1の半導体チップの前記第2の主面(35)上に第1の半田型熱インタフェース材質部分(310)を位置させることと、
第2の熱インタフェース材質部分(305)を、前記第2の半導体チップ(15)の前記第1の主面(32)上であるが前記第1の半田型熱インタフェース材質部分(310)からは横方向に隔てられて空間を残すように位置させることと、を備える製造の方法。 - 前記空間内にポリマー熱インタフェース材質(345)を位置させることを備える請求項8の方法。
- 前記第1及び第2の半田型熱インタフェース材質部分と熱的に接触する熱拡散器(30)を置くことを備える請求項8の方法。
- 基板及び前記基板内へ第1の距離だけ延びる第1のアクティブ回路部分(40)を含む第1の半導体チップ(20)と、
前記第1の半導体チップ(20)内のバリア(135)であって前記第1のアクティブ回路部分(40)を包囲するが前記第1のアクティブ回路部分(40)からは横方向に隔てられ且つ前記基板内へ前記第1の距離よりも大きい第2の距離だけ延びるバリア(135)と、
前記第1の半導体チップ(20)に結合された第2の半導体チップ(15)であって、前記第1の半導体チップの第2の主面に対向するが間隙(130)を介して隔てられた第3の主面を有する第2の半導体チップと、
前記第2の主面を前記第3の主面に結合する複数の相互接続構造(45)と、
前記第1の半導体チップの第1の主面と、前記相互接続構造から横方向に隔てられた前記第2の半導体チップの前記第3の主面の一部とに位置する半田型熱インタフェース材質(90)と、
を備える装置。 - 前記第1及び第2の半導体チップの間に位置させられるダイク(125)であって材質が前記間隙(130)に入ることを防止するために前記第1のアクティブ回路部分を包囲するダイク(125)を備える請求項11の装置。
- 前記バリア(135)は前記第1の半導体チップ内の溝(185)と前記溝内の絶縁性材質(210)とを備える請求項11の装置。
- 前記バリア(135)は金属粒子移動を妨げる注入されたイオン(215)を含む前記基板の部分を備える請求項11の装置。
- 第1及び第2の主面(35)(36)と、前記第1の主面(35)及び前記第2の主面(36)間に延在する第1の周囲壁(37)とを含む第1の半導体チップ(20)と、
第1の主面(32)、第2の主面(33)及び第2の周囲壁(34)を含む第2の半導体チップ(15)であって前記第2の半導体チップ(15)の前記第1の主面(32)は前記第1及び第2の半導体チップの間の間隙(130)を介して前記第1の半導体チップ(20)の前記第1の主面(36)に結合される第2の半導体チップ(15)と、
前記第1の半導体チップの少なくとも前記第1の周囲壁を覆うバリア層(265)と、
前記第1の周囲壁を包囲する半田型熱インタフェース材質(90)と、を備え、
前記バリア層(265)は前記第1の周囲壁(37)内への前記半田型熱インタフェース材質(90)の拡散を抑制する装置。 - 前記第1の半導体チップ(20)は第1のアクティブ回路部分(40)を備え、前記装置は、前記第1及び第2の半導体チップの間に位置させられるダイク(125)であって材質が前記間隙(130)に入ることを防止するために前記第1のアクティブ回路部分を包囲するダイク(125)を備える請求項15の装置。
- 前記バリア層(265)は前記第1の半導体チップの前記第2の主面、前記第2の半導体チップの前記第1の主面の一部分、及び前記第2の周囲壁を覆う請求項15の装置。
- 第1及び第2の主面並びに第1の周囲壁を含む第1の半導体チップ(20)と、
第1の主面、第2の主面及び第2の周囲壁を含む第2の半導体チップ(15)であって前記第2の半導体チップ(15)の前記第1の主面は前記第1及び第2の半導体チップの間の間隙(130)を介して前記第1の半導体チップの前記第1の主面に結合される第2の半導体チップ(15)と、
前記第1の半導体チップの前記第2の主面上に位置させられる第1の半田型熱インタフェース材質部分(310)と、
前記第2の半導体チップ(15)の前記第1の主面上であるが前記第1の半田型熱インタフェース材質部分(310)からは横方向に隔てられて空間を残すように位置させられる第2の熱インタフェース材質部分(305)と、を備える装置。 - 前記空間内に位置させられるポリマー熱インタフェース材質(345)を備える請求項18の装置。
- 前記第1及び第2の半田型熱インタフェース材質部分と熱的に接触する熱拡散器(30)を備える請求項18の装置。
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JP2013515375A (ja) | 2013-05-02 |
CN102668075A (zh) | 2012-09-12 |
KR20120123303A (ko) | 2012-11-08 |
CN102668075B (zh) | 2015-11-25 |
WO2011084362A2 (en) | 2011-07-14 |
KR101636967B1 (ko) | 2016-07-20 |
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