JP2814869B2 - Circuit board inspection method and circuit board - Google Patents

Circuit board inspection method and circuit board

Info

Publication number
JP2814869B2
JP2814869B2 JP5075251A JP7525193A JP2814869B2 JP 2814869 B2 JP2814869 B2 JP 2814869B2 JP 5075251 A JP5075251 A JP 5075251A JP 7525193 A JP7525193 A JP 7525193A JP 2814869 B2 JP2814869 B2 JP 2814869B2
Authority
JP
Japan
Prior art keywords
circuit board
main surface
circuit
wiring pattern
inspection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP5075251A
Other languages
Japanese (ja)
Other versions
JPH06260799A (en
Inventor
裕貴 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Daifuku Co Ltd
Original Assignee
Daifuku Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daifuku Co Ltd filed Critical Daifuku Co Ltd
Priority to JP5075251A priority Critical patent/JP2814869B2/en
Publication of JPH06260799A publication Critical patent/JPH06260799A/en
Application granted granted Critical
Publication of JP2814869B2 publication Critical patent/JP2814869B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】この発明は、表面実装型回路部品
が実装された実装回路基板の検査を行う回路基板検査方
法、およびこの検査方法を実施するのに適した回路基板
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board inspection method for inspecting a mounted circuit board on which surface-mounted circuit components are mounted, and a circuit board suitable for performing the inspection method.

【０００２】[0002]

【従来の技術】回路部品が実装された実装回路基板にお
いて、回路部品、配線パターン、およびそれらの間の接
続の良否を検査する実装回路基板の検査は、インサーキ
ットテスタ（検査装置）に備わる検査ピン（探針）を回
路部品の端子部分に押し当てることにより従来行われて
いた。図５は、この従来の検査方法を説明する説明図で
ある。実装回路基板１０は、回路基板本体２の主面上に
所定の配線パターン３が配設されて成る回路基板１と、
この回路基板１に実装される回路部品４、５とを有して
いる。回路部品４、５に備わるピン４ｂ、５ｂが、配線
パターン３の所定の部分にハンダ付けされることによ
り、回路部品４、５が回路基板１の所定の位置に実装さ
れている。また、回路部品４、５は、それぞれの本体部
４ａ、５ａが回路基板本体２の表面、すなわち部品面
（第１の主面）２ａ側に位置するように実装されてい
る。2. Description of the Related Art In a mounted circuit board on which circuit components are mounted, the inspection of a mounted circuit board for inspecting the quality of circuit components, wiring patterns, and connections between them is performed by an inspection provided in an in-circuit tester (inspection apparatus). This has been conventionally performed by pressing a pin (probe) against a terminal portion of a circuit component. FIG. 5 is an explanatory diagram for explaining this conventional inspection method. The mounted circuit board 10 includes a circuit board 1 having a predetermined wiring pattern 3 disposed on a main surface of a circuit board body 2;
Circuit components 4 and 5 mounted on the circuit board 1 are provided. The pins 4b and 5b provided on the circuit components 4 and 5 are soldered to predetermined portions of the wiring pattern 3, so that the circuit components 4 and 5 are mounted at predetermined positions on the circuit board 1. The circuit components 4 and 5 are mounted such that the main bodies 4a and 5a are located on the surface of the circuit board main body 2, that is, on the component surface (first main surface) 2a.

【０００３】回路部品４、５の中のディスクリート部品
４は、回路基板本体２の裏面、すなわちハンダ面（第２
の主面）２ｂにピン４ｂの先端部分が露出する回路部品
である。ディスクリート部品４のみが実装された実装回
路基板１０においては、ピン４ｂのハンダ面２ｂに露出
する部分に、１対の検査ピン６ａ、６ｂのそれぞれを押
し当てて接触させることにより、検査が行なわれてい
た。一方、ピン５ｂがハンダ面２ｂに露出しない表面実
装部品（表面実装型回路部品）５が実装された実装回路
基板１０においては、表面実装部品５のピン５ｂに検査
ピン６ａ、６ｂを押し当てることによって表面実装部品
５の良否の検査が実行されていた。The discrete component 4 in the circuit components 4 and 5 is connected to the back surface of the circuit board main body 2, that is, the solder surface (the second surface).
This is a circuit component in which the tip of the pin 4b is exposed on the main surface 2b. In the mounted circuit board 10 on which only the discrete component 4 is mounted, the inspection is performed by pressing each of the pair of inspection pins 6a and 6b into contact with a portion of the pin 4b exposed on the solder surface 2b. I was On the other hand, in the mounted circuit board 10 on which the surface mount component (surface mount type circuit component) 5 in which the pin 5b is not exposed to the solder surface 2b, the inspection pins 6a and 6b are pressed against the pin 5b of the surface mount component 5. Inspection of the quality of the surface-mounted component 5 has been performed.

【０００４】[0004]

【発明が解決しようとする課題】表面実装部品５が実装
された実装回路基板１０の検査は、上述のような方法で
行われていたので、まず第１に検査ピン６ａ、６ｂを、
ハンダ面２ｂだけではなく部品面２ａにも押し当てる必
要があり、検査工程が複雑にならざるを得ないという問
題点があった。また、両面を検査すべく検査装置の治具
を構成する必要があるので、検査装置のコストが高くな
るという問題点があった。Since the inspection of the mounted circuit board 10 on which the surface mount components 5 are mounted has been performed by the above-described method, first, the inspection pins 6a and 6b are
It is necessary to press not only on the solder surface 2b but also on the component surface 2a, so that the inspection process has to be complicated. Further, since it is necessary to configure a jig of the inspection device to inspect both surfaces, there is a problem that the cost of the inspection device is increased.

【０００５】第２に、近年において表面実装部品５のフ
ァインピッチ化が進行するのに伴い、検査ピン６ａ、６
ｂを使った検査が精度良く行うことが困難になるという
問題点があった。このため、検査が行えない部分を残し
たまま出荷せざるを得ないという事態が生まれており、
表面実装部品と配線パターンの間の接触不良が多発しつ
つあるという問題点があった。[0005] Second, as the fine pitch of the surface mount component 5 has advanced in recent years, the inspection pins 6a, 6
There is a problem that it is difficult to perform the inspection using b with high accuracy. For this reason, a situation has arisen in which shipment has to be carried out while leaving parts that cannot be inspected.
There has been a problem that contact failure between the surface mount component and the wiring pattern is frequently occurring.

【０００６】第３に、図６に模式的に示すように、ハン
ダ不良によってピン５ｂと配線パターン３との間が良好
に接続されていない、いわゆる「リード浮き」の場合に
おいても、検査ピン６ａ、６ｂの圧力によって検査の時
点ではピン５ｂと配線パターン３との間が一時的に接続
されることがあった。このため、本来不良と判定すべき
回路部分を合格と誤判定するという問題点があった。Third, as schematically shown in FIG. 6, even when the connection between the pin 5b and the wiring pattern 3 is not satisfactorily connected due to a solder defect, that is, in the case of so-called "lead floating", the inspection pin 6a , 6b, the pin 5b and the wiring pattern 3 may be temporarily connected at the time of inspection. For this reason, there is a problem that a circuit portion that should be determined to be defective is erroneously determined to be acceptable.

【０００７】この発明は上記のような問題点を解消する
ためになされたもので、簡単な工程で、しかも判定精度
のよい実装回路基板の検査を行い得る回路基板検査方
法、およびこの検査方法を実施するのに適した回路基板
を提供することを目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and a circuit board inspection method capable of inspecting a mounted circuit board with a simple process and with high accuracy of determination, and an inspection method for the same. An object is to provide a circuit board suitable for implementation.

【０００８】[0008]

【課題を解決するための手段】この発明に係る回路基板
検査方法は、複数の表面実装型回路部品を含む複数の回
路部品が回路基板に実装されて成る実装回路基板を検査
する回路基板検査方法であって、（ａ）第１および第２
の主面を有する電気絶縁体の回路基板本体を準備する工
程と、（ｂ）１対の探針を備え、検査対象物に接触する
当該１対の探針の間の電気的特性を検出することによ
り、当該検査対象物の良否を検査する検査装置を準備す
る工程と、（ｃ）前記複数の回路部品の間を電気的に接
続すべき配線パターンを、少なくとも前記第１の主面に
配設する工程と、（ｄ）実質的に電気導電体のテストパ
ッドを、前記配線パターンの中の前記第１の主面にのみ
配設される部分であって、前記複数の表面実装型回路部
品の間のみを接続する部分に電気的に接続し、かつその
一部が前記第２の主面に露出するように、前記回路基板
本体に設置する工程と、（ｅ）前記複数の回路部品の各
１の本体部が前記回路基板本体の前記第１の主面側に位
置するように、当該複数の回路部品を前記回路基板本体
の所定の位置に実装することにより、実装回路基板を作
成する工程と、（ｆ）前記１対の探針の１を、前記実装
回路基板における前記テストパッドの前記第２の主面に
露出する部分に接触させ、他の１を当該実装回路基板に
おける他の前記テストパッドの前記第２の主面に露出す
る部分、または当該実装回路基板における前記回路部品
の前記第２の主面に露出する部分に接触させることによ
り、当該実装回路基板における前記表面実装型回路部品
または当該表面実装型回路部品に電気的に接続すべき部
分の良否を検査する工程と、を備えている。そして、前
記工程（ｄ）は、（ｄ−１）前記配線パターンの前記部
分と前記回路基板本体とを貫通する貫通孔を形成する工
程と、（ｄ−２）前記貫通孔の内側面に、当該内側面を
覆うように前記配線パターンと同一材料の部材を形成す
る工程と、（ｄ−３）前記部材と前記配線パターンの前
記部分とに接続され、しかもこれらと同一材料で構成さ
れ、前記貫通孔の前記第１の主面への開口部の周りを囲
む円環状に、第１の円形パターンを前記第１の主面に配
設する工程と、（ｄ−４）前記部材に接続され、しかも
当該部材と同一材料で構成され、前記貫通孔の前記第２
主面への開口部の周りを囲む円環状でしかも孤立した島
状に、第２の円 形パターンを前記第２の主面に配設する
工程と、を備える。A circuit board inspection method according to the present invention is a circuit board inspection method for inspecting a mounted circuit board in which a plurality of circuit components including a plurality of surface mount circuit components are mounted on the circuit board. (A) the first and second
(B) providing a pair of probes, and detecting an electrical characteristic between the pair of probes that come into contact with the inspection object. A step of preparing an inspection device for inspecting the quality of the inspection object; and (c) disposing a wiring pattern to be electrically connected between the plurality of circuit components on at least the first main surface. And (d) providing a test pad of an electrical conductor substantially only on the first main surface of the wiring pattern, wherein the plurality of surface-mounted circuit components are provided. (E) installing the circuit component on the circuit board main body so as to be electrically connected to a portion connecting only between the components and to expose a part of the circuit component on the second main surface; The main body of each one is located on the first main surface side of the circuit board main body. Mounting a number of circuit components at predetermined positions on the circuit board body to form a mounted circuit board; and (f) connecting one of the pair of probes 1 to the test pad of the mounted circuit board. The other one is exposed to the second main surface of the mounting circuit board, and the other one is exposed to the second main surface of the test pad on the mounting circuit board, or the circuit component of the circuit component on the mounting circuit board is contacted. Inspecting the quality of the surface-mounted circuit component or a portion to be electrically connected to the surface-mounted circuit component on the mounted circuit board by contacting the portion exposed on the second main surface; It has. And before
The step (d) includes: (d-1) the step of forming the wiring pattern;
Forming a through-hole penetrating through the circuit board body.
And (d-2) attaching the inner surface to the inner surface of the through hole.
Form a member of the same material as the wiring pattern so as to cover
(D-3) before the member and the wiring pattern
And are made of the same material
Surrounding the opening of the through hole to the first main surface.
A first circular pattern is arranged on the first main surface in an annular shape.
(D-4) connected to the member, and
The same material as the member is used, and the second
An annular and isolated island surrounding the opening to the main surface
To Jo, disposing the second circle-shaped pattern on the second main surface
And a step, Ru equipped with.

【０００９】この発明に係る回路基板は、複数の表面実
装型回路部品を含む複数の回路部品を実装すべき回路基
板であって、（ａ）前記複数の回路部品の各１の本体部
が位置すべき側である第１の主面と、第２の主面とを有
する電気絶縁体の回路基板本体と、（ｂ）前記複数の回
路部品の間を所定の要領で電気的に接続すべき配線パタ
ーンであって、少なくとも前記第１の主面に配設される
配線パターンと、（ｃ）前記配線パターンの中の前記第
１の主面にのみ配設される部分であって、前記複数の表
面実装型回路部品の間のみを接続する部分に電気的に接
続し、前記回路基板本体に設置されるテストパッドであ
って、かつその一部が前記第２の主面に露出する実質的
に電気導電体のテストパッドと、を備えている。そし
て、前記テストパッドが、（ｃ−１）前記配線パターン
の前記部分と前記回路基板本体とを貫通する貫通孔と、
（ｃ−２）前記貫通孔の内側面に、当該内側面を覆うよ
うに前記配線パターンと同一材料の部材で形成された部
材と、（ｃ−３）前記部材と前記配線パターンの前記部
分とに接続され、しかもこれらと同一材料で構成され、
前記貫通孔の前記第１の主面への開口部の周りを囲む円
環状に、前記第１の主面に配設された第１の円形パター
ンと、（ｃ−４）前記部材に接続され、しかも当該部材
と同一材料で構成され、前記貫通孔の前記第２の主面へ
の開口部の周りを囲む円環状でしかも孤立した島状に、
前記第２主面に配設された第２の円形パターンと、を備
える。A circuit board according to the present invention is a circuit board on which a plurality of circuit components including a plurality of surface mount type circuit components are to be mounted, wherein (a) a main body of each one of the plurality of circuit components is located at a position. (B) electrically connecting the plurality of circuit components in a predetermined manner with a circuit board body of an electrical insulator having a first main surface and a second main surface that are to be connected; A wiring pattern provided at least on the first main surface; and (c) a portion provided only on the first main surface of the wiring pattern, wherein A test pad electrically connected to a portion connecting only between the surface-mounted circuit components of the first embodiment, and a test pad installed on the circuit board body, and a part of which is exposed to the second main surface. And an electric conductor test pad . Soshi
And the test pad is (c-1) the wiring pattern
A through-hole passing through the portion and the circuit board body;
(C-2) The inner surface of the through hole is covered with the inner surface.
Parts formed of the same material as the wiring pattern
(C-3) the member and the portion of the wiring pattern
Connected to the minute, and made of the same material as these,
A circle surrounding the opening of the through hole to the first main surface.
A first circular putter annularly disposed on the first main surface;
(C-4) connected to the member, and the member
To the second main surface of the through hole
Into an annular and isolated island surrounding the opening
A second circular pattern disposed on the second main surface.
For example Ru.

【００１０】[0010]

【作用】この発明における回路基板検査方法では、表面
実装型回路部品を実装する実装回路基板において、この
実装回路基板に配設された配線パターンの中で、回路部
品の本体が位置する第１の主面にのみ配設される部分で
あって、表面実装型部品にのみ接続する部分に電気的に
接続するテストパッドを設ける。テストパッドは実質的
に導電性であって、かつその一部が実装回路基板の第２
の主面に露出する。実装回路基板の検査は、回路部品の
第２の主面に露出する部分とテストパッドの同じく第２
の主面に露出する部分の中の何れかに、検査装置の探針
を接触させることにより行う。このため、探針を常に第
２の主面側にのみ接触させればよいので、検査の工程が
単純となる。また、探針を表面実装部品に接触させる必
要がないので、ファインピッチを有する表面実装部品を
実装した実装回路基板の検査においても、精度の良い検
査が実行し得る。更に、探針によって表面実装部品に圧
力を付加することもないので、表面実装部品と配線パタ
ーンの間の接続不良部分を、見落とすことなく検出する
ことができる。According to the circuit board inspection method of the present invention, in a mounting circuit board on which a surface mounting type circuit component is mounted, a first pattern in which a main body of the circuit component is located in a wiring pattern disposed on the mounting circuit board. A test pad electrically connected to a portion provided only on the main surface and connected only to the surface mount component is provided. The test pad is substantially conductive, and a portion of the test pad is a second one of the mounted circuit board.
Exposed on the main surface of The inspection of the mounted circuit board is performed by inspecting the portion exposed on the second main surface of the circuit component and the second portion of the test pad.
Is performed by bringing the probe of the inspection device into contact with any of the portions exposed on the main surface of the inspection device. For this reason, since the probe need only be brought into contact with the second main surface only, the inspection process is simplified. Further, since it is not necessary to bring the probe into contact with the surface-mounted component, a high-precision inspection can be performed even in the inspection of the mounted circuit board on which the surface-mounted component having the fine pitch is mounted. Further, since no pressure is applied to the surface-mounted component by the probe, a defective connection between the surface-mounted component and the wiring pattern can be detected without overlooking.

【００１１】この発明における回路基板では、回路部品
の本体が位置すべき第１の主面にのみ配設される配線パ
ターンの部分であって、表面実装型部品にのみ接続する
部分に電気的に接続するテストパッドを有する。テスト
パッドは実質的に導電性であって、かつその一部が実装
回路基板の第２の主面に露出している。このため、この
回路基板に表面実装部品を含む回路部品を実装して成る
実装回路基板の検査が、回路部品の第２の主面に露出す
る部分とテストパッドの同じく第２の主面に露出する部
分の中の何れかに、検査装置の探針を接触させることに
よって実行し得る。このため、実装回路基板の検査が単
純な工程でかつ精度良く行い得る。In the circuit board according to the present invention, the portion of the wiring pattern provided only on the first main surface where the body of the circuit component is to be located, and electrically connected to the portion connected only to the surface mount type component It has a test pad to connect. The test pad is substantially conductive and a part thereof is exposed on the second main surface of the mounting circuit board. For this reason, the inspection of the mounted circuit board formed by mounting the circuit component including the surface mount component on the circuit board is performed by inspecting the portion exposed on the second main surface of the circuit component and the test pad exposed on the same second main surface. This can be performed by bringing the probe of the inspection apparatus into contact with any of the portions to be inspected. Therefore, the inspection of the mounted circuit board can be performed with a simple process and with high accuracy.

【００１２】[0012]

【実施例】＜実装回路基板の構成＞図２は、この発明の
実施例における回路基板に表面実装型回路部品が実装さ
れた実装回路基板の構造を示す正面断面図（図２
（ａ））および平面図（図２（ｂ））である。実装回路
基板２０は、回路基板本体１２の主面上に所定の配線パ
ターン１３が配設されて成る回路基板１１と、この回路
基板１１に実装される回路部品とを有している。図２に
は、回路基板１１に実装された２つの表面実装部品（表
面実装型回路部品）２１、２２が描かれている。表面実
装部品２１、２２にそれぞれ備わるピン２１ｂ、２２ｂ
が、配線パターン１３の所定の部分にハンダ付けされる
ことにより、表面実装部品２１、２２が回路基板１１の
所定の位置に実装されている。また、表面実装部品２
１、２２は、それぞれの本体部２１ａ、２２ａが回路基
板本体１２の表面、すなわち部品面（第１の主面）１２
ａ側に位置するように実装されている。表面実装部品２
１は例えば表面実装型の容量素子であり、表面実装部品
２２は例えば表面実装型の集積回路素子である。配線パ
ターン１３は例えば銅材で構成され、例えば良く知られ
るプリント配線技術を用いて形成される。FIG. 2 is a front sectional view showing the structure of a mounted circuit board in which surface-mounted circuit components are mounted on a circuit board according to an embodiment of the present invention (FIG. 2).
(A)) and a plan view (FIG. 2 (b)). The mounted circuit board 20 has a circuit board 11 in which a predetermined wiring pattern 13 is provided on a main surface of a circuit board body 12, and circuit components mounted on the circuit board 11. FIG. 2 illustrates two surface-mounted components (surface-mounted circuit components) 21 and 22 mounted on the circuit board 11. Pins 21b and 22b respectively provided on surface mount components 21 and 22
Are soldered to predetermined portions of the wiring pattern 13 so that the surface mount components 21 and 22 are mounted at predetermined positions on the circuit board 11. In addition, surface mount component 2
Reference numerals 1 and 22 denote that the main body portions 21a and 22a are formed on the surface of the circuit board main body 12, that is, the component surface (first main surface)
It is mounted so as to be located on the a side. Surface mount component 2
Reference numeral 1 denotes, for example, a surface mount type capacitance element, and the surface mount component 22 is, for example, a surface mount type integrated circuit element. The wiring pattern 13 is made of, for example, a copper material, and is formed using, for example, a well-known printed wiring technique.

【００１３】配線パターン１３を構成するひと続きの部
分配線パターンの中で、表面実装部品同士のみを接続
し、かつ部品面１２ａ上にのみ配置される部分配線パタ
ーンには、テストパッドが設けられている。図２の例で
は、表面実装部品２１および２２の間のみに接続する部
分配線パターン１３ａに、テストパッド１５が設けられ
ている。In a series of partial wiring patterns constituting the wiring pattern 13, test pads are provided on the partial wiring patterns which connect only surface mount components and are arranged only on the component surface 12a. I have. In the example of FIG. 2, the test pad 15 is provided on the partial wiring pattern 13a connected only between the surface mount components 21 and 22.

【００１４】図３はテストパッド１５の構造を示す部分
断面斜視図（図３（ａ）、図３（ｃ））および側面断面
図（図３（ｂ））である。回路基板１１には、部分配線
パターン１３ａおよび回路基板本体１２を貫通する貫通
孔１５ａが設けられている。貫通孔１５ａの内側面１５
ｂには配線パターン１３と同じ材質の鍍金１５ｃが施さ
れている。部品面１２ａおよび回路基板本体２の裏面、
すなわちハンダ面（第２の主面）１２ｂへの貫通孔１５
ａの開口部には、配線パターン１３と同じ材質であって
所定の径を有する円形パターン１５ｄ、１５ｅがそれぞ
れ設けられている。これらの鍍金１５ｃ、円形パターン
１５ｄ、１５ｅは、導電体であってしかも部分配線パタ
ーン１３ａと電気的に接続されている。FIG. 3 is a partial sectional perspective view (FIGS. 3A and 3C) and a side sectional view (FIG. 3B) showing the structure of the test pad 15. As shown in FIG. The circuit board 11 is provided with a through hole 15 a penetrating the partial wiring pattern 13 a and the circuit board body 12. Inner side surface 15 of through hole 15a
B is plated with the same material as the wiring pattern 13. The component surface 12a and the back surface of the circuit board body 2,
That is, the through hole 15 is formed in the solder surface (second main surface) 12b.
In the opening a, circular patterns 15d and 15e having the same material as the wiring pattern 13 and having a predetermined diameter are provided, respectively. The plating 15c and the circular patterns 15d and 15e are conductors and are electrically connected to the partial wiring pattern 13a.

【００１５】配線パターン１３をプリント配線技術を用
いて形成する際には、それに先だって回路基板本体１２
の主面上の全面に渡ってあらかじめ銅鍍金が施される。
回路基板本体１２の所定の位置にあらかじめ貫通孔１５
ａを設けることにより、この銅鍍金の際に鍍金１５ｃ、
および円形パターン１５ｄ、１５ｅを同時に形成するこ
とができる。When the wiring pattern 13 is formed by using the printed wiring technique, the circuit board body 12 is formed before the wiring pattern 13 is formed.
Copper plating is applied in advance over the entire surface of the main surface.
A through hole 15 is provided in a predetermined position of the circuit board body 12 in advance.
By providing a, plating 15c during this copper plating,
And the circular patterns 15d and 15e can be formed simultaneously.

【００１６】すなわち、テストパッド１５それ自体は、
従来知られるスルーホールあるいはバイアホールと同様
の構造を有し、かつ同様の方法で形成することができ
る。しかしながら、スルーホールはディスクリート部品
の接続を目的としたものであり、また、バイアホールは
回路基板本体１２における２つの主面に配設された配線
パターン１３の間を電気的に接続する目的で設けられる
ものである。この発明におけるテストパッド１５はそれ
らのいずれでもなく、表面実装部品のみを接続しかつ部
品面１２ａにのみ配設される、配線パターン１３の部分
配線パターン１３ａに設けられることを特徴としてい
る。テストパッド１５が設けられるこの位置には、スル
ーホール、バイアホールともに設けられていない。すな
わち、スルーホール、またはバイアホールによって、テ
ストパッド１５の代用とすることはできない点に注目さ
れたい。テストパッド１５によって、後述するように、
実装回路基板２０の検査を高い効率、精度をもって実行
することが可能となる。That is, the test pad 15 itself is
It has the same structure as a conventionally known through hole or via hole, and can be formed by the same method. However, the through holes are for the purpose of connecting discrete components, and the via holes are provided for the purpose of electrically connecting between the wiring patterns 13 provided on the two main surfaces of the circuit board body 12. It is something that can be done. The test pad 15 according to the present invention is not provided with any of them, but is provided on a partial wiring pattern 13a of the wiring pattern 13 which connects only surface mount components and is disposed only on the component surface 12a. At this position where the test pad 15 is provided, neither the through hole nor the via hole is provided. That is, it should be noted that the test pad 15 cannot be substituted for the through hole or the via hole. As described later, the test pad 15
The inspection of the mounted circuit board 20 can be executed with high efficiency and high accuracy.

【００１７】テストパッド１５の寸法、すなわち円形パ
ターン１５ｄ、１５ｅの外径Ａ、Ｃ、および内径Ｂに関
する２通りの代表例を表１に掲げる。比較的小径のもの
を、仮にミニバイヤと称し、それより大径のものをミド
ルバイヤと称している。Table 1 shows two typical examples of the dimensions of the test pad 15, that is, the outer diameters A, C and the inner diameter B of the circular patterns 15d, 15e. The one with a relatively small diameter is temporarily called a mini-buyer, and the one with a larger diameter is called a middle viar.

【００１８】[0018]

【表１】 [Table 1]

【００１９】なお言うまでもなく、実装回路基板２０に
は、表面実装部品だけではなく、それに加えてディスク
リート部品が実装されていてもよい。Needless to say, not only surface-mounted components but also discrete components may be mounted on the mounted circuit board 20.

【００２０】＜検査の方法＞上述の実装回路基板２０を
形成した後に行う、実装回路基板２０の検査方法につい
て述べる。図１および図４は、この検査方法を示す説明
図である。検査ピン６ａ、６ｂを備えるインサーキット
テスタ（検査装置）６は、装置本体６ｃにおいて、検査
ピン（探針）６ａ、６ｂの間の抵抗、容量、誘導、イン
ピーダンス、電圧等の電気的特性の検出を行う。<Method of Inspection> A method of inspecting the mounted circuit board 20 after forming the above-described mounted circuit board 20 will be described. 1 and 4 are explanatory diagrams showing this inspection method. The in-circuit tester (inspection device) 6 including the inspection pins 6a and 6b detects electrical characteristics such as resistance, capacitance, induction, impedance, and voltage between the inspection pins (probes) 6a and 6b in the device body 6c. I do.

【００２１】図１には、表面実装部品２２が有する１対
のピン２２ｂに接続する部分配線パターン１３ａがいず
れも、他の表面実装部品にのみ接続されており、かつ部
品面１２ａにのみ配設されている例を示している。従っ
て、これらの部分配線パターン１３ａには、テストパッ
ド１５が設けられている。実装回路基板２０上にある表
面実装部品２２の特性の良否、あるいは表面実装部品２
２と部分配線パターン１３ａとの接続の良否の検査は、
検査ピン６ａ、６ｂをハンダ面１２ｂの側から２つのテ
ストパッド１５にそれぞれ押し当てることによって実行
される。この検査において、表面実装部品２２が本来有
する所定の電気的特性が検出されるならば、表面実装部
品２２それ自体、表面実装部品２２と部分配線パターン
１３ａとの接続のいずれもが良好であると判定し得る。
逆に所定の電気的特性が得られなければ、それらの何れ
かが不良であると判定し得る。この場合には、不良原因
が何れであるかが目視等によって更に追求され、処分、
交換、修復などの所定の処置が構じられる。In FIG. 1, all of the partial wiring patterns 13a connected to a pair of pins 22b of the surface mount component 22 are connected only to the other surface mount components and are arranged only on the component surface 12a. An example is shown. Therefore, test pads 15 are provided on these partial wiring patterns 13a. Whether the characteristics of the surface mount component 22 on the mount circuit board 20 are good or not,
Inspection of the connection between the wiring pattern 2 and the partial wiring pattern 13a is performed as follows.
The test is performed by pressing the test pins 6a and 6b against the two test pads 15 from the side of the solder surface 12b. In this inspection, if predetermined electrical characteristics inherent to the surface mount component 22 are detected, it is determined that both the surface mount component 22 itself and the connection between the surface mount component 22 and the partial wiring pattern 13a are good. Can be determined.
Conversely, if the predetermined electrical characteristics are not obtained, it can be determined that any of them is defective. In this case, the cause of the defect is further pursued by visual inspection, etc.
Predetermined measures such as replacement and repair are established.

【００２２】図４は、実装回路基板２０上にあるディス
クリート部品２３の特性の良否を検査する方法を示して
いる。配線パターン１３に接続するスルーホール１６が
有する貫通孔にピン２３ｂを貫通させ、かつピン２３ｂ
をスルーホール１６にハンダ付けすることによって、デ
ィスクリート部品２３が回路基板１１の所定の位置に実
装されている。ディスクリート部品２３の検査は、ハン
ダ面１２ｂの側から検査ピン６ａ、６ｂを、ハンダ面１
２ｂに露出するピン２３ｂの先端部に押し当てることに
より実行される。FIG. 4 shows a method for inspecting the quality of the characteristics of the discrete component 23 on the mounting circuit board 20. The pin 23b is passed through a through hole of the through hole 16 connected to the wiring pattern 13, and the pin 23b
Are soldered to the through holes 16, so that the discrete components 23 are mounted at predetermined positions on the circuit board 11. Inspection of the discrete component 23 is performed by inserting the inspection pins 6a and 6b from the solder surface 12b side into the solder surface 1b.
This is executed by pressing against the tip of the pin 23b exposed to 2b.

【００２３】図４には、実装回路基板２０に実装されて
いる表面実装部品２２の検査方法をも同時に示してい
る。表面実装部品２２では、１対のピン２２ｂに接続す
る配線パターン１３の中で１つは他の表面実装部品２１
にのみ接続されており、他の１つはディスクリート部品
２３に接続されている。検査ピン６ａ、６ｂを、表面実
装部品２２の１つのピン２２ｂと、他方のピン２２ｂに
配線パターン１３で接続されるディスクリート部品２３
の１つのピン２３ｂとに、ハンダ面１２ｂの側からそれ
ぞれ押し当てることにより、表面実装部品２２の特性の
良否、および表面実装部品２２と配線パターン１３との
間の接続の良否の検査が実行される。FIG. 4 also shows a method of inspecting the surface mounted components 22 mounted on the mounted circuit board 20. In the surface mount component 22, one of the wiring patterns 13 connected to the pair of pins 22b is the other surface mount component 21.
And the other one is connected to a discrete component 23. The inspection pins 6a and 6b are connected to one pin 22b of the surface mount component 22 and the discrete component 23 connected to the other pin 22b by the wiring pattern 13.
By pressing the soldering surface 12b against one of the pins 23b from the side of the solder surface 12b, the inspection of the quality of the characteristics of the surface mounting component 22 and the inspection of the quality of the connection between the surface mounting component 22 and the wiring pattern 13 are executed. You.

【００２４】以上の例に示したように、この実施例の検
査方法では、検査ピン６ａ、６ｂを、テストパッド１
５、またはディスクリート部品のハンダ面１２ｂに露出
するピンに、ハンダ面１２ｂの側から押し当てることに
よって、実装回路基板２０上にある表面実装部品２１、
２２等、およびそれらと配線パターン１３との接続状態
に関する検査が実行される。検査ピン６ａ、６ｂを部品
面１２ａの側には押し当てる必要がなく、ハンダ面１２
ｂの側にのみ押し当てれば良いので、検査工程が従来の
方法よりも単純で効率がよい。また、従来の方法と異な
り、表面実装部品２１等のピン２１ｂに検査ピン６ａ、
６ｂで押し当てる必要がないので、ファインピッチを有
する表面実装部品２１等の検査が容易に行い得る他、検
査ピン６ａ、６ｂの圧力によって、ピン２１ｂ等と配線
パターン１３との間の接続不良を見落とす恐れもない。As shown in the above example, in the inspection method of this embodiment, the inspection pins 6a and 6b are
5 or a pin exposed on the solder surface 12b of the discrete component from the side of the solder surface 12b, so that the surface mount component 21 on the mount circuit board 20;
Inspection is performed on 22 and the like and the connection state between them and the wiring pattern 13. There is no need to press the inspection pins 6a and 6b against the component surface 12a,
The inspection process is simpler and more efficient than the conventional method because it is only necessary to press against the side b. Also, unlike the conventional method, the inspection pins 6a,
6b, it is not necessary to press it, so that the inspection of the surface-mounted component 21 having a fine pitch can be easily performed. In addition, due to the pressure of the inspection pins 6a, 6b, the connection failure between the pin 21b and the wiring pattern 13 can be reduced. There is no fear of overlooking.

【００２５】[0025]

【発明の効果】この発明の回路基板検査方法では、回路
基板にあらかじめテストパッドを設け、このテストパッ
ドを用いて、検査装置の探針を回路基板の第２の主面側
に接触させることにより、表面実装型回路部品を実装す
る実装回路基板の検査を実行する。このため、探針を第
１および第２の主面側の双方に接触させる必要がないの
で、単純な工程で検査を実行し得る効果がある。また、
探針を表面実装型回路部品に接触させる必要がないの
で、ファインピッチを有する表面実装部品を実装した実
装回路基板の検査においても、精度の良い検査を実行し
得る効果がある。更に、探針が表面実装部品に圧力を付
加することがないので、表面実装部品と配線パターンの
間の接続不良部分を検出し損なうことなく、精度のよい
検査を実行し得る効果がある。According to the circuit board inspection method of the present invention, a test pad is provided on the circuit board in advance, and the probe of the inspection apparatus is brought into contact with the second main surface of the circuit board using the test pad. Then, an inspection of the mounted circuit board on which the surface mount type circuit component is mounted is executed. For this reason, it is not necessary to bring the probe into contact with both the first and second main surfaces, so that there is an effect that the inspection can be executed by a simple process. Also,
Since the probe does not need to be brought into contact with the surface-mounted circuit component, there is an effect that a high-precision inspection can be performed even in the inspection of a mounted circuit board on which a surface-mounted component having a fine pitch is mounted. Further, since the probe does not apply pressure to the surface mount component, there is an effect that a highly accurate inspection can be performed without failing to detect a defective connection between the surface mount component and the wiring pattern.

【００２６】この発明における回路基板では、表面実装
型部品にのみ接続し、第１の主面にのみ配設される配線
パターンの部分にテストパッドが設けられている。この
ため、この回路基板に表面実装部品を含む回路部品を実
装して成る実装回路基板の検査が、単純な工程でかつ精
度良く行い得る効果がある。In the circuit board according to the present invention, the test pads are provided only in the wiring pattern portions connected only to the surface mount type components and provided only on the first main surface. Therefore, there is an effect that the inspection of the mounted circuit board formed by mounting the circuit component including the surface mounted component on the circuit board can be performed with a simple process and with high accuracy.

【図面の簡単な説明】[Brief description of the drawings]

【図１】この発明の実施例における検査方法を示す説明
図である。FIG. 1 is an explanatory diagram illustrating an inspection method according to an embodiment of the present invention.

【図２】この発明の実施例における実装回路基板の構造
を示す構造図である。FIG. 2 is a structural diagram showing a structure of a mounted circuit board according to the embodiment of the present invention.

【図３】この発明の実施例におけるテストパッドの構造
を示す構造図である。FIG. 3 is a structural diagram showing a structure of a test pad in the embodiment of the present invention.

【図４】この発明の実施例における検査方法を示す説明
図である。FIG. 4 is an explanatory diagram showing an inspection method according to the embodiment of the present invention.

【図５】従来の検査方法を説明する説明図である。FIG. 5 is an explanatory diagram illustrating a conventional inspection method.

【図６】従来の検査方法を説明する説明図である。FIG. 6 is an explanatory diagram illustrating a conventional inspection method.

【符号の説明】[Explanation of symbols]

６ インサーキットテスタ ６ａ、６ｂ 検査ピン（探針） １１ 回路基板 １２ 回路基板本体 １２ａ 部品面（第１の主面） １２ｂ ハンダ面（第２の主面） １３ 配線パターン １５ テストパッド ２０ 実装回路基板 ２１、２２ 表面実装部品（表面実装型回路部品） ２３ ディスクリート部品 ２１ａ、２２ａ、２３ａ 本体部 Reference Signs List 6 In-circuit tester 6a, 6b Inspection pin (probe) 11 Circuit board 12 Circuit board body 12a Component surface (first main surface) 12b Solder surface (second main surface) 13 Wiring pattern 15 Test pad 20 Mounting circuit board 21, 22 surface mount components (surface mount circuit components) 23 discrete components 21a, 22a, 23a main body

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 複数の表面実装型回路部品を含む複数の
回路部品が回路基板に実装されて成る実装回路基板を検
査する回路基板検査方法であって、 （ａ）第１および第２の主面を有する電気絶縁体の回路
基板本体を準備する工程と、 （ｂ）１対の探針を備え、検査対象物に接触する当該１
対の探針の間の電気的特性を検出することにより、当該
検査対象物の良否を検査する検査装置を準備する工程
と、 （ｃ）前記複数の回路部品の間を電気的に接続すべき配
線パターンを、少なくとも前記第１の主面に配設する工
程と、 （ｄ）実質的に電気導電体のテストパッドを、前記配線
パターンの中の前記第１の主面にのみ配設される部分で
あって、前記複数の表面実装型回路部品の間のみを接続
する部分に電気的に接続し、かつその一部が前記第２の
主面に露出するように、前記回路基板本体に設置する工
程と、 （ｅ）前記複数の回路部品の各１の本体部が前記回路基
板本体の前記第１の主面側に位置するように、当該複数
の回路部品を前記回路基板本体の所定の位置に実装する
ことにより、実装回路基板を作成する工程と、 （ｆ）前記１対の探針の１を、前記実装回路基板におけ
る前記テストパッドの前記第２の主面に露出する部分に
接触させ、他の１を当該実装回路基板における他の前記
テストパッドの前記第２の主面に露出する部分、または
当該実装回路基板における前記回路部品の前記第２の主
面に露出する部分に接触させることにより、当該実装回
路基板における前記表面実装型回路部品または当該表面
実装型回路部品に電気的に接続すべき部分の良否を検査
する工程と、 を備え、 前記工程（ｄ）は、 （ｄ−１） 前記配線パターンの前記部分と前記回路基
板本体とを貫通する貫通孔を形成する工程と、 （ｄ−２） 前記貫通孔の内側面に、当該内側面を覆う
ように前記配線パターンと同一材料の部材を形成する工
程と、 （ｄ−３） 前記部材と前記配線パターンの前記部分と
に接続され、しかもこ れらと同一材料で構成され、前記
貫通孔の前記第１の主面への開口部の周りを囲む円環状
に、第１の円形パターンを前記第１の主面に配設する工
程と、 （ｄ−４） 前記部材に接続され、しかも当該部材と同
一材料で構成され、前記貫通孔の前記第２主面への開口
部の周りを囲む円環状でしかも孤立した島状に、第２の
円形パターンを前記第２の主面に配設する工程と、を備
え る回路基板検査方法。1. A circuit board inspection method for inspecting a mounted circuit board in which a plurality of circuit components including a plurality of surface-mounted circuit components are mounted on a circuit board, comprising: (a) first and second main components; Preparing a circuit board body of an electrical insulator having a surface; and (b) providing a pair of probes and contacting the object to be inspected.
A step of preparing an inspection device for inspecting the quality of the inspection object by detecting electrical characteristics between the pair of probes; and (c) electrically connecting the plurality of circuit components. Disposing a wiring pattern on at least the first main surface; and (d) disposing a test pad of an electric conductor substantially only on the first main surface in the wiring pattern. A part that is electrically connected to a part that connects only the plurality of surface-mounted circuit components, and that is mounted on the circuit board body such that a part of the part is exposed on the second main surface. (E) arranging the plurality of circuit components in a predetermined position on the circuit board main body such that each main body of the plurality of circuit components is positioned on the first main surface side of the circuit board main body. (C) forming a mounting circuit board by mounting at a position; The probe 1 of the pair is brought into contact with a portion of the test pad on the mounted circuit board exposed to the second main surface, and the other 1 is connected to the test pad of the other test pad on the mounted circuit board. 2 by contacting the portion of the circuit component on the mounting circuit board or the portion of the circuit component on the mounting circuit board that is exposed on the second main surface. Inspecting the quality of a portion to be electrically connected to the mold circuit component , wherein the step (d) comprises: (d-1) the portion of the wiring pattern and the circuit board;
Forming a through hole penetrating through the plate body; and (d-2) covering the inner surface on the inner surface of the through hole.
To form a member of the same material as the wiring pattern.
And extent, and said portion of said wiring pattern (d-3) the member
Is connected to, is made of the same material as Shikamoko these, the
An annular shape surrounding the opening of the through hole to the first main surface
Arranging a first circular pattern on the first main surface;
And degree, is connected to the (d-4) the member, yet the same as the member
An opening to the second main surface of the through hole, which is made of one material
To form an annular and isolated island surrounding the part
Disposing a circular pattern on the second main surface.
Circuit board inspection method Ru example. 【請求項２】 複数の表面実装型回路部品を含む複数の
回路部品を実装すべき回路基板であって、 （ａ）前記複数の回路部品の各１の本体部が位置すべき
側である第１の主面と、第２の主面とを有する電気絶縁
体の回路基板本体と、 （ｂ）前記複数の回路部品の間を所定の要領で電気的に
接続すべき配線パターンであって、少なくとも前記第１
の主面に配設される配線パターンと、 （ｃ）前記配線パターンの中の前記第１の主面にのみ配
設される部分であって、前記複数の表面実装型回路部品
の間のみを接続する部分に電気的に接続し、前記回路基
板本体に設置されるテストパッドであって、かつその一
部が前記第２の主面に露出する実質的に電気導電体のテ
ストパッドと、 を備え、前記テストパッドが、 （ｃ−１） 前記配線パターンの前記部分と前記回路基
板本体とを貫通する貫通孔と、 （ｃ−２） 前記貫通孔の内側面に、当該内側面を覆う
ように前記配線パターンと同一材料の部材で形成された
部材と、 （ｃ−３） 前記部材と前記配線パターンの前記部分と
に接続され、しかもこれらと同一材料で構成され、前記
貫通孔の前記第１の主面への開口部の周りを囲む円環状
に、前記第１の主面に配設された第１の円形パターン
と、 （ｃ−４） 前記部材に接続され、しかも当該部材と同
一材料で構成され、前記貫通孔の前記第２の主面への開
口部の周りを囲む円環状でしかも孤立した島状に、前記
第２主面に配設された第２の円形パターンと、を備え る
回路基板。2. A circuit board on which a plurality of circuit components including a plurality of surface mount circuit components are to be mounted, wherein: (a) a circuit board on which one main body of each of the plurality of circuit components is to be located; (B) a wiring pattern for electrically connecting the plurality of circuit components in a predetermined manner, the circuit pattern body including: a first main surface and a second main surface; At least the first
(C) a portion of the wiring pattern, which is provided only on the first main surface, and is provided only between the plurality of surface mount circuit components. A test pad electrically connected to a portion to be connected and installed on the circuit board main body, and a test pad substantially made of an electric conductor, a part of which is exposed on the second main surface; wherein the test pad, the circuit group and said portion of (c-1) the wiring pattern
A through hole penetrating through the plate body; and (c-2) an inner surface of the through hole covers the inner surface.
As described above, the wiring pattern is formed of the same material as that of the wiring pattern.
A member, and said portion of said wiring pattern (c-3) the member
And are made of the same material as those described above,
An annular shape surrounding the opening of the through hole to the first main surface
A first circular pattern disposed on the first main surface;
When connected to the (c-4) wherein member, yet the same as the member
The through-hole is opened to the second main surface.
In the shape of a circular and isolated island surrounding the mouth,
A second circuit board Ru with a circular pattern, a disposed on the second main surface.
JP5075251A 1993-03-08 1993-03-08 Circuit board inspection method and circuit board Expired - Fee Related JP2814869B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5075251A JP2814869B2 (en) 1993-03-08 1993-03-08 Circuit board inspection method and circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5075251A JP2814869B2 (en) 1993-03-08 1993-03-08 Circuit board inspection method and circuit board

Publications (2)

Publication Number Publication Date
JPH06260799A JPH06260799A (en) 1994-09-16
JP2814869B2 true JP2814869B2 (en) 1998-10-27

Family

ID=13570821

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2814869B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200028209A (en) * 2018-09-06 2020-03-16 주식회사 지로이아이 single-sided Printed-Circuit-Board of through-hole type with Photo-Solder-Resist, and manufacturing method for the same
KR20200031816A (en) * 2018-09-17 2020-03-25 주식회사 지로이아이 single-sided Printed-Circuit-Board of through-hole type, and manufacturing method for the same

Families Citing this family (2)

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Publication number Priority date Publication date Assignee Title
JP4328349B2 (en) 2006-11-29 2009-09-09 株式会社日立製作所 Residual stress measurement method and apparatus
KR101633373B1 (en) 2012-01-09 2016-06-24 삼성전자 주식회사 COF package and semiconductor comprising the same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63153571U (en) * 1987-03-30 1988-10-07
JPH0425775A (en) * 1990-05-21 1992-01-29 Hitachi Chem Co Ltd Method and device for inspecting wiring board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200028209A (en) * 2018-09-06 2020-03-16 주식회사 지로이아이 single-sided Printed-Circuit-Board of through-hole type with Photo-Solder-Resist, and manufacturing method for the same
KR102151989B1 (en) 2018-09-06 2020-09-04 주식회사 지로이아이 single-sided Printed-Circuit-Board of through-hole type with Photo-Solder-Resist
KR20200031816A (en) * 2018-09-17 2020-03-25 주식회사 지로이아이 single-sided Printed-Circuit-Board of through-hole type, and manufacturing method for the same
KR102187538B1 (en) 2018-09-17 2020-12-07 주식회사 지로이아이 single-sided Printed-Circuit-Board of through-hole type

Also Published As

Publication number Publication date
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