JP2023060154A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2023060154A JP2023060154A JP2023033014A JP2023033014A JP2023060154A JP 2023060154 A JP2023060154 A JP 2023060154A JP 2023033014 A JP2023033014 A JP 2023033014A JP 2023033014 A JP2023033014 A JP 2023033014A JP 2023060154 A JP2023060154 A JP 2023060154A
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Abstract
Description
本発明にかかる半導体装置は、シリコンよりもバンドギャップが広い半導体(以下、ワイドバンドギャップ半導体とする)を用いて構成される。ここでは、ワイドバンドギャップ半導体として例えば炭化珪素(SiC)を用いた半導体装置(炭化珪素半導体装置)の構造を例に説明する。
次に、実施の形態にかかる半導体装置の製造方法について説明する。図2~図15は、実施の形態にかかる炭化珪素半導体装置の製造途中の状態を示す断面図である。まず、図2に示すように、n+型ドレイン領域となるn+型炭化珪素基板2を用意する。次に、n+型炭化珪素基板2のおもて面に、上述したn-型ドリフト層1をエピタキシャル成長させる。例えば、1200V耐圧クラスの場合、n-型ドリフト層1を形成するためのエピタキシャル成長の条件を、n-型ドリフト層1の不純物濃度が5×1015/cm3~1×1016/cm3とし、形成する厚さ(深さ)が8~12μm程度となるように設定してもよい。
2 n+型炭化珪素基板
3 第1p+型領域
4 第2p+型領域
15 n型領域
15a 下側n型領域
15b 上側n型領域
16 p型ベース層
17 n+型ソース領域
18 p+型領域
19 ゲート絶縁膜
20 ゲート電極
21 層間絶縁膜
22 ソース電極
25 酸化膜
31 トレンチゲート
32 トレンチSBD
33 金属膜
33a オーミック電極
35 金属膜
Claims (15)
- 半導体基体を含む半導体装置であって、
前記半導体基体に設けられた第1導電型のドリフト層と、
前記ドリフト層よりも上方の前記半導体基体に設けられる第2導電型のベース層と、
前記半導体基体のおもて面側から前記ベース層よりも深い位置まで設けられる第1トレンチおよび第2トレンチと、
前記第1トレンチの内部にゲート絶縁膜を介して設けられたゲート電極と、
前記第2トレンチの内部に設けられた金属膜と、
前記半導体基体のおもて面の上方に設けられる上面電極と、
前記半導体基体に設けられ前記ベース層の上方で前記第1トレンチの側部に接する、前記ドリフト層よりも高不純物濃度の第1導電型の第1高濃度領域と、
前記半導体基体に設けられ前記第2トレンチの側部に接する、前記ベース層よりも高不純物濃度の第2導電型の第2高濃度領域と、
を備え、
前記上面電極は、前記第2トレンチの内部に埋め込まれ、少なくとも一部が前記金属膜に接していることを特徴とする半導体装置。 - 前記第2トレンチに埋め込まれた前記上面電極は、前記金属膜に挟まれていることを特徴とする請求項1に記載の半導体装置。
- 前記第2高濃度領域は、前記第2トレンチの幅方向の断面において、上面が前記第1高濃度領域と接していることを特徴とする請求項1または2に記載の半導体装置。
- 半導体基体を含む半導体装置であって、
前記半導体基体に設けられた第1導電型のドリフト層と、
前記ドリフト層よりも上方の前記半導体基体に設けられる第2導電型のベース層と、
前記半導体基体のおもて面側から前記ベース層よりも深い位置まで設けられる第1トレンチおよび第2トレンチと、
前記第1トレンチの内部にゲート絶縁膜を介して設けられたゲート電極と、
前記第2トレンチの内部に設けられた金属膜と、
前記半導体基体のおもて面の上方に設けられる上面電極と、
前記半導体基体に設けられ前記ベース層の上方で前記第1トレンチの側部に接する、前記ドリフト層よりも高不純物濃度の第1導電型の第1高濃度領域と、
前記半導体基体に設けられ前記第2トレンチの側部に接する、前記ベース層よりも高不純物濃度の第2導電型の第2高濃度領域と、
を備え、
前記第2高濃度領域は、前記第2トレンチの幅方向の断面において、上面が前記第1高濃度領域と接していることを特徴とする半導体装置。 - 前記第2高濃度領域は、前記幅方向の断面において、側面が前記ベース領域と接していることを特徴とする請求項3または4に記載の半導体装置。
- 前記第1トレンチおよび前記第2トレンチは、上面視で所定方向に延在していて、
前記第1トレンチは、前記半導体基体のおもて面側から第1の深さまで設けられ、
前記第2トレンチは、前記半導体基体のおもて面側から第2の深さまで設けられていることを特徴とする請求項1から5のいずれか1項に記載の半導体装置。 - 前記第1の深さは、前記第2の深さよりも浅いことを特徴とする請求項6に記載の半導体装置。
- 前記第2高濃度領域は、前記所定方向に間欠的に設けられていることを特徴とする請求項6または7に記載の半導体装置。
- 前記半導体基体に設けられ前記第1トレンチの底面に接する、前記ベース層よりも高不純物濃度の第2導電型の第1底面領域を備えることを特徴とする請求項6から8のいずれか1項に記載の半導体装置。
- 前記半導体基体に設けられ前記所定方向に間欠的に前記第1底面領域を前記ベース層に接続する、前記ベース層よりも高不純物濃度の第2導電型の第1接続領域を備えることを特徴とすることを特徴とする請求項9に記載の半導体装置。
- 前記半導体基体に設けられ前記第2トレンチの底面に接する、前記ベース層よりも高不純物濃度の第2導電型の第2底面領域を備えることを特徴とする請求項6から10のいずれか1項に記載の半導体装置。
- 前記半導体基体に設けられ前記所定方向に間欠的に前記第2底面領域を前記ベース層に接続する、前記ベース層よりも高不純物濃度の第2導電型の第2接続領域を備えることを特徴とする請求項11に記載の半導体装置。
- 前記第1高濃度領域は、前記第1トレンチの両側部に接していることを特徴とする請求項1から12のいずれか1項に記載の半導体装置。
- 前記金属膜は、チタン(Ti)、タングステン(W)、ニッケル(Ni)、またはモリブデン(Mo)のいずれかを含むことを特徴とする請求項1から13のいずれか1項に記載の半導体装置。
- 前記上面電極は、アルミニウムを含むことを特徴とする請求項1から14のいずれか1項に記載の半導体装置。
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