JP2007287712A - 半導体装置、半導体装置の実装構造、及びそれらの製造方法 - Google Patents
半導体装置、半導体装置の実装構造、及びそれらの製造方法 Download PDFInfo
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- JP2007287712A JP2007287712A JP2006109595A JP2006109595A JP2007287712A JP 2007287712 A JP2007287712 A JP 2007287712A JP 2006109595 A JP2006109595 A JP 2006109595A JP 2006109595 A JP2006109595 A JP 2006109595A JP 2007287712 A JP2007287712 A JP 2007287712A
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Abstract
【解決手段】外部部品との接合に用いるための金属ボール21を、第1半田層19を介して第1端子パッド17上に設ける。そして、熱ストレスが集中する箇所、すなわち、第1半田層19のクラックが伸展する箇所に、金属ボール21が存在するように第1半田層19の層厚を設定する。
【選択図】図1
Description
第1の実施の形態では、第1端子パッド、金属ボール、及びこの金属ボールとは別に設けられた第1半田層であって、第1端子パッドと金属ボールとを接合する第1半田層を有する半導体装置の製造方法について説明する。この製造方法は、第1工程から第4工程までを含んでいる。以下、第1工程から順に各工程につき説明する。
第2の実施の形態では、上述の第1の実施の形態によって製造された半導体装置と、回路基板とを接合することで製造される、半導体装置の実装構造の製造方法について説明する。ただし、この第2の実施の形態において用いられる半導体装置は、第1の実施の形態において製造されたものと同様のものであるので、共通する構成要素や同様な構成要素については、同一の符号を付し、それらの重複する説明を省略する。
13:チップ
15:樹脂層
17:第1端子パッド
19:第1半田層
21:金属ボール
21a:第3の表面
22:半導体装置
23:回路基板
25:第2端子パッド
27:第2半田層
111:チップ
113:樹脂層
115、129:端子パッド
117:フラックス
119:半田ボール
121:金属ボール
123:半田
125:半導体装置
127:回路基板
W1、W2:層厚
Claims (5)
- 第1端子パッドを有する下地と、
第2端子パッドを有する回路基板と、
前記下地と前記回路基板間に配置され、前記下地に対向する第1の表面、前記回路基板に対向する第2の表面、及び前記第1、第2の表面を除く第3の表面を有する金属ボールと、
前記第1端子パッドと前記金属ボールの前記第1の表面との間に形成され、前記第1端子パッドと前記金属ボールとを接合するとともに、前記第1端子パッドと前記金属ボール間における層厚が10μm以下である第1半田層と、
前記第2端子パッドと前記金属ボールの前記第2の表面との間に形成され、前記第2端子パッドと前記金属ボールとを接合するとともに、前記第2端子パッドと前記金属ボール間における層厚が10μm以下である第2半田層とを具え、
前記金属ボールの前記第1、第2の表面はそれぞれ前記第1、第2半田層に覆われるとともに、前記第3の表面は前記第1、第2半田層から露出していることを特徴とする半導体装置の実装構造。 - 上側表面に露出して作り込まれた第1端子パッドを有する下地を用意する第1工程と、
前記第1端子パッドの上側表面に第1半田層を形成する第2工程と、
該第1半田層に、前記金属ボールを、前記第1半田層の上側表面と、前記金属ボールの下地側表面とが接するように、搭載する第3工程と、
加熱処理によってリフローされた前記第1半田層を利用して、前記金属ボールと前記第1端子パッドとを接合する第4工程と
を含むことを特徴とする半導体装置の製造方法。 - 請求項2に記載の半導体装置の製造方法において、
前記第2工程が、前記第1端子パッドの上側表面と前記金属ボールとの間の距離が最小となる箇所における前記第1半田層の層厚が、最大でも10μmとなるように、前記第1半田層の層厚を調節して、前記第1端子パッドの上側表面に前記第1半田層を形成する工程であることを特徴とする半導体装置の製造方法。 - 上側表面に露出して作り込まれた第1端子パッドを有する下地を用意する第1工程と、
前記第1端子パッドの上側表面に第1半田層を形成する第2工程と、
該第1半田層に、前記金属ボールを、前記第1半田層の上側表面と、前記金属ボールの下地側表面とが接するように、搭載する第3工程と、
加熱処理によってリフローされた前記第1半田層を利用して、前記金属ボールと前記第1端子パッドとを接合する第4工程と、
上側表面に第2端子パッドを有する回路基板を用意する第5工程と、
前記第2端子パッドの上側表面に第2半田層を形成する第6工程と、
該第2半田層に、前記第1工程から前記第4工程により製造された半導体装置の前記金属ボールを、前記第2半田層の上側表面と、前記金属ボールの回路基板側表面とが接するように、搭載する第7工程と、
加熱処理によってリフローされた前記第2半田層を利用して、前記金属ボールと前記第2端子パッドとを接合する第8工程と
を含むことを特徴とする半導体装置の実装構造の製造方法。 - 請求項4に記載の半導体装置の実装構造の製造方法において、
前記第2工程が、前記第1端子パッドの上側表面と前記金属ボールとの間の距離が最小となる箇所における前記第1半田層の層厚が、最大でも10μmとなるように、前記第1半田層の層厚を調節して、前記第1端子パッドの上側表面に前記第1半田層を形成する工程であり、
前記第6工程が、前記第2端子パッドの上側表面と前記金属ボールとの間の距離が最小となる箇所における前記第2半田層の層厚が、最大でも10μmとなるように、前記第2半田層の層厚を調節して、前記第2端子パッドの上側表面に前記第2半田層を形成する工程であることを特徴とする半導体装置の実装構造の製造方法。
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US11/723,395 US20080012131A1 (en) | 2006-04-12 | 2007-03-19 | Semiconductor device, mounting construction of a semiconductor device, and method of manufacturing the semiconductor device with the mounting construction |
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JP5456545B2 (ja) * | 2009-04-28 | 2014-04-02 | 昭和電工株式会社 | 回路基板の製造方法 |
US20120161312A1 (en) * | 2010-12-23 | 2012-06-28 | Hossain Md Altaf | Non-solder metal bumps to reduce package height |
US20150047463A1 (en) * | 2012-06-26 | 2015-02-19 | California Institute Of Technology | Systems and methods for implementing bulk metallic glass-based macroscale gears |
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US9355980B2 (en) * | 2013-09-03 | 2016-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Three-dimensional chip stack and method of forming the same |
WO2015040714A1 (ja) | 2013-09-19 | 2015-03-26 | 千住金属工業株式会社 | Niボール、Ni核ボール、はんだ継手、フォームはんだ、はんだペースト |
CN103531559A (zh) * | 2013-10-18 | 2014-01-22 | 上海纪元微科电子有限公司 | 倒装芯片键合结构及其形成方法 |
KR101691345B1 (ko) * | 2014-02-04 | 2016-12-29 | 센주긴조쿠고교 가부시키가이샤 | Ni 볼, Ni 핵 볼, 납땜 조인트, 땜납 페이스트 및 폼 땜납 |
CN105980087B (zh) * | 2014-02-04 | 2018-05-25 | 千住金属工业株式会社 | 金属球的制造方法、接合材料以及金属球 |
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JP6332566B2 (ja) | 2015-09-15 | 2018-05-30 | 株式会社村田製作所 | 接合用部材、接合用部材の製造方法、および、接合方法 |
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