JP2005311371A - 半導体チップパッケージ - Google Patents
半導体チップパッケージ Download PDFInfo
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- JP2005311371A JP2005311371A JP2005121336A JP2005121336A JP2005311371A JP 2005311371 A JP2005311371 A JP 2005311371A JP 2005121336 A JP2005121336 A JP 2005121336A JP 2005121336 A JP2005121336 A JP 2005121336A JP 2005311371 A JP2005311371 A JP 2005311371A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 125
- 239000000758 substrate Substances 0.000 claims abstract description 148
- 229910000679 solder Inorganic materials 0.000 claims abstract description 27
- 239000002184 metal Substances 0.000 claims description 32
- 229910052751 metal Inorganic materials 0.000 claims description 32
- 239000000463 material Substances 0.000 claims description 27
- 230000001070 adhesive effect Effects 0.000 claims description 25
- 230000008878 coupling Effects 0.000 claims description 18
- 238000010168 coupling process Methods 0.000 claims description 18
- 238000005859 coupling reaction Methods 0.000 claims description 18
- 239000003989 dielectric material Substances 0.000 claims description 16
- 230000008054 signal transmission Effects 0.000 claims description 8
- 230000005540 biological transmission Effects 0.000 claims description 6
- 230000011664 signaling Effects 0.000 abstract 1
- 239000000853 adhesive Substances 0.000 description 21
- 239000003990 capacitor Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229920006336 epoxy molding compound Polymers 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- -1 tape Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
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Abstract
【解決手段】半導体チップパッケージは、ボンディングパッドが形成されている基板を含むことができる。基板上に実装された半導体チップは、チップパッドと半導体チップパッドとを基板のボンディングパッドと連結するための電気的手段を含むことができる。半導体チップと基板上の電気的接続手段は封じられることができ、基板の表面の一部に連結されたボードは封じられないこともできる。これにより、パッケージ内のソルダボールを通じず、高速信号用電子装置又は他のパッケージとの電気的連結が可能であり、半導体チップの高速動作により安定的なパワーを供給することができ、パッケージ内に設計された差動信号線のペア間クロストークを最小化することができる。
【選択図】図1
Description
115 回路配線
120 半導体チップ
121 チップパッド
160 ボード
161 メタル配線
Claims (31)
- 複数のボンディングパッドが形成されている基板と、
前記基板上に実装され、複数のチップパッドが形成された半導体チップと、
前記半導体チップのチップパッドと前記基板のボンディングパッドを電気的に連結する接続手段と、
前記基板の一部分に結合されたボードと、
を含み、
前記半導体チップと前記電気的接続手段は、封じられており、前記ボードが結合されている前記基板の一部分は封じられていないことを特徴とする半導体チップパッケージ。 - 前記ボード上に形成されたメタル配線と前記基板上に形成された回路配線が電気的に連結されたことを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記ボード上に形成された前記メタル配線と前記基板上に形成された前記回路配線がキャパシティブカップリング構造で連結されたことを特徴とする請求項2に記載の半導体チップパッケージ。
- 前記ボードと前記基板との物質は、キャパシティブカップリング構造で連結されて信号伝送が成されることができる程高い誘電定数を有する誘電性物質であることを特徴とする請求項2に記載の半導体チップパッケージ。
- 前記誘電性物質は、前記基板の上部に覆われている感光膜物質を含むことを特徴とする請求項4に記載の半導体チップパッケージ。
- 前記誘電性物質は、前記ボードと前記基板がボンディング可能なように接着特性を有すること
を特徴とする請求項4に記載の半導体チップパッケージ。 - 前記ボード上に形成された前記メタル配線と前記基板上に形成された回路配線がコンダクティブボンディング構造で連結されたことを特徴とする請求項2に記載の半導体チップパッケージ。
- 前記ボードと前記基板は、異方性導電フィルムによりボンディングされたことを特徴とする請求項7に記載の半導体チップパッケージ。
- 前記電気的接続手段は、ボンディングワイヤーであることを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記電気的接続手段は、ソルダバンプで、前記半導体チップは、前記基板にフリップチップボンディングされたことを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記回路配線は、少なくとも一つの前記基板の封じられた部分と前記基板の封じられない部分に形成されることを特徴とする請求項2に記載の半導体チップパッケージ。
- 前記ボードは、外部電子装置の入出力信号と前記半導体チップの入出力信号とを伝送するための伝送チャネルを含むことを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記基板は、多数のビアホールを有することを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記基板は、多層構造で形成されたことを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記ボードは、メタル配線がパターニングされていることを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記メタル配線は、差動信号伝送用配線ペアであることを特徴とする請求項15に記載の半導体チップパッケージ。
- 前記ボード上に形成されたメタル配線と前記基板上に形成された回路配線がキャパシティブカップリング構造で連結されたことを特徴とする請求項15に記載の半導体チップパッケージ。
- 前記ボードと前記基板との間の物質は、キャパシティブカップリング構造で連結されて信号伝送が成されることができる程高い誘電定数を有する誘電性物質であることを特徴とする請求項12に記載の半導体チップパッケージ。
- 前記誘電性物質は、前記基板の上部に覆われている感光膜物質を含むことを特徴とする請求項18に記載の半導体チップパッケージ。
- 前記誘電性物質は、前記ボードと前記基板がボンディング可能なように接着特性を有することを特徴とする請求項18に記載の半導体チップパッケージ。
- 前記ボード上に形成された前記メタル配線と前記基板上に形成された回路配線がコンダクティブボンディング構造で連結されたことを特徴とする請求項15に記載の半導体チップパッケージ。
- 前記ボードと前記基板は、異方性導電フィルムによりボンディングされたことを特徴とする請求項12に記載の半導体チップパッケージ。
- 少なくとも二つの半導体チップパッケージを含み、
少なくとも一つの前記半導体チップパッケージは、
複数の基板ボンディングパッドが形成されている基板と、
前記基板上に実装され、複数のチップパッドが形成された半導体チップと、
前記半導体チップのチップパッドと前記基板ボンディングパッドとを電気的に連結する接続手段と、
前記基板表面の一部に結合されたボードと、
を含み、
前記半導体チップと前記電気的接続手段は、封じられており、前記ボードが結合されている部分は、封じられていなく、前記ボードは少なくとも二つのパッケージを連結することを特徴とする半導体チップパッケージ。 - 前記ボード上に形成されたメタル配線は、封じられない部分に沿って前記二つのパッケージのうち少なくとも一つの前記基板上に形成された回路配線と連結されることを特徴とする請求項23に記載の半導体チップパッケージ。
- 前記ボード上に形成されたメタル配線と前記基板上に形成された回路配線がキャパシティブカップリング構造で連結されたことを特徴とする請求項23に記載の半導体チップパッケージ。
- 前記ボードと前記基板との間の物質は、キャパシティブカップリング構造で連結されて信号伝送が成されることができる程高い誘電定数を有する誘電性物質であることを特徴とする請求項23に記載の半導体チップパッケージ。
- 前記誘電性物質は、前記基板の上部に覆われている感光膜物質を含むことを特徴とする請求項26に記載の半導体チップパッケージ。
- 前記誘電性物質は、前記ボードと前記基板がボンディング可能なように接着特性を有することを特徴とする請求項26に記載の半導体チップパッケージ。
- 前記ボード上に形成された前記回路配線と前記基板上に形成された前記回路配線がコンダクティブボンディング構造で連結されたことを特徴とする請求項24に記載の半導体チップパッケージ。
- 前記ボードと前記基板は、異方性導電フィルムによりボンディングされたことを特徴とする請求項23に記載の半導体チップパッケージ。
- 少なくとも二つの半導体チップパッケージを含み、少なくとも二つの前記半導体チップパッケージは、請求項1に記載の半導体チップパッケージであることを特徴とする半導体チップパッケージ。
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DE212019000090U1 (de) * | 2018-07-13 | 2019-12-16 | Murata Manufacturing Co., Ltd. | Drahtloskommunikationsvorrichtung |
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WO2023108538A1 (en) * | 2021-12-16 | 2023-06-22 | Intel Corporation | Enhanced i/o semiconductor chip package and cooling assembly having side i/os |
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CN100501983C (zh) | 2009-06-17 |
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