GB2093291A - Gain Control Circuit for High Frequency and Intermediate Frequency Stages in Radio or Television Receivers - Google Patents
Gain Control Circuit for High Frequency and Intermediate Frequency Stages in Radio or Television Receivers Download PDFInfo
- Publication number
- GB2093291A GB2093291A GB8204617A GB8204617A GB2093291A GB 2093291 A GB2093291 A GB 2093291A GB 8204617 A GB8204617 A GB 8204617A GB 8204617 A GB8204617 A GB 8204617A GB 2093291 A GB2093291 A GB 2093291A
- Authority
- GB
- United Kingdom
- Prior art keywords
- stage
- regulating
- gain control
- circuit
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001105 regulatory effect Effects 0.000 claims abstract description 14
- 230000001276 controlling effect Effects 0.000 claims abstract description 5
- 230000003321 amplification Effects 0.000 claims description 14
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 14
- 230000005669 field effect Effects 0.000 abstract description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3052—Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
- H03G3/3068—Circuits generating control signals for both R.F. and I.F. stages
Landscapes
- Control Of Amplification And Gain Control (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
- Circuits Of Receivers In General (AREA)
- Superheterodyne Receivers (AREA)
- Noise Elimination (AREA)
Abstract
In a superheterodyne circuit for a radio or television receiver comprising a radio frequency stage (3), a mixer stage (4) and a gain regulating stage (7) for controlling the signal supplied to an intermediate frequency stage (6), the control signal for the regulating stage (7) is derived from an automatic gain control circuit (9) likewise connected to the mixer (4) and a regulating signal for the radio frequency stage (3) is provided from the automatic gain control circuit (9) by way of a threshold value circuit (10). The arrangement is such that the control of the radio frequency stage (3) by way of the threshold value circuit (10) only commences after a predetermined range of regulation, for example about 10 db, has already been effected by the regulating stage (7). The regulating stage 7 may comprise PIN diodes or a field effect transistor. <IMAGE>
Description
SPECIFICATION
A Circuit Arrangement for Controlling the
Amplification of High Frequency and
Intermediate Frequency Stages in Radio or
Television Receivers
In radio and television receiving apparatus the amplifier stages are generally so controlled as to prevent overloading. Thus, non-linear distortion of the output signals of the amplifier stages is prevented.
It is known to derive an automatic gain control voltage, for example from the intermediate frequency amplifier, which is utilised to reduce the amplification of the consecutive individual intermediate frequency stages, as well as the initial amplification stage in the tuner, with an increased signal from the antenna. The possibility also now exists of controlling the stages at smaller input voltages, and the point at which such control commences can also be shifted at higher values of the input voltage (delayed regulation). In the first case there are few problems regarding non-linear distortion, intermodulation or the like. The signal/noise ratio is, however, very small. It is known that at a given input voltage this is inversely proportional to the value at which automatic gain control is set to commence.The maximum possible signal to noise ratio can in this case only be achieved at high input voltages.
As a result of new official-regulations, renewed problems have arisen concerning the construction of receiver systems, for example of television and radio receivers, as regards the suppresion of large signals. The new regulations make it necessary that the control of amplification be introduced essentially sooner in order to prevent the overloading of individual stages. This is effected, however, at the cost of the signal to noise ratio, which becomes the worse, the earlier is the point at which regulation commences. As a result of the non-linear frequency response of the amplifier stages the amplification is not constant over the frequency band to be received, so that a given frequency f, the amplifier system commences to be regulated at a correspondingly defined starting point.At a frequency f2, at which the amplification is for example lower, the regulation is commenced at a later point at which the danger of overloading would again occur, while at a further frequency f3 at which the amplification is greater, the regulation would be commenced essentially earlier. This has the result, however, that the signal to noise ratio is only sufficiently large when such regulation is relatively late, that is to say at larger input voltages from the antenna.
It is an object of the present invention to satisfy the new official requirements, in the case of which the control of amplification is commenced at a very low signal level, without causing a corresponding deterioration in the signal to noise ratio.
The present invention accordingly provides a circuit arrangement for controlling the amplification of high frequency and intermediate frequency stages in radio or television receivers, said arrangement comprising a regulating stage connected after the mixer stage of the receiver and arranged to derive its control signal from an automatic gain control circuit likewise connected to the mixer stage, and a threshold value stage by way of which the regulation of the initial high frequency stage is effected, the arrangement being such that the said regulating stage first becomes controlled by way of the automatic gain control circuit by a predetermined amount, preferably 10 db, whereupon the regulation of the initial high frequency stage commences by way of said threshold value stage.
The arrangement in accordance with the invention has the advantage that the overall variations in the amplification of the system are reduced. The manner in which the gain control is applied works more precisely, which is very important in order that the maximum possible signal to noise ration should be achieved at an early stage. The invention is based on the realisation that that section of the circuit, here, for example, the intermediate freuqency amplifier, which is vulnerable to overloading must first be protected from such overloading, before commencing to apply gain control to the tuner, of which the amplification response is also nonlinear at greater input signal voltages.With this arrangement, the signal to noise ratio increases very quickly, so that over the whole amplifier including the R F and the I F stages the maximum possible signal to noise ratio is achieved depending upon the noise figure for the amplifier, which may be up to a half to a third of the input signal. By means of the invention, the point at which gain control commences can be much more accurately determined, since the working point of the input transistor of the tuner is only shifted at higher antenna voltages.
The invention is illustrated by way of example in the accompanying drawing, the single figure of which is a block circuit diagram of one embodiment of circuit in accordance with the invention.
Referring to the drawing, an input signal is supplied from an antenna 1 to the input of the tuner 2. This signal is amplified in the initial stage 3 and is mixed in the mixer stage 4 with the aid of a signal from a local oscillator 5 to provide the intermediate frequency signal. Between the output of the tuner 2 and the input to the amplifier 6 there is provided a regulating stage 7 which controls the level of the input signal to the intermediate frequency stage 6. For this purpose there is connected to the output of the tuner 2, if appropriate by way of a filter 8, a circuit 9 for the production of a signal for the automatic gain control (AG C). Only when the signal for the intermediate frequency amplifier has undergone the maximum possible regulation does the gain control of the tuner 2, delayed with the aid of a threshold value circuit 10, commence. The AGC circuit can be constructed in the conventional manner. The regulating circuit 7 may comprise an attentuator formed of PIN-diodes or a field effect transistor stage may be provided.
At an antenna input voltage of 1.5 mV, the signal to noise ratio is already increased by 4db by means of the above described arrangement.
In the arrangement described above the gain control signal from the mixer output of the tuner may be derived selectively or may be a broadband signal, according to requirements. This form of regulation enables the differences in amplification occuring in a complete amplifier section from the antenna to the demodulator to be limited at the tuner, in order that the modern linearity requirements can be achieved with a simultaneous improvement of the signal to noise ratio.
Claims (4)
1. A circuit arrangement for controlling the amplification of high frequency and intermediate frequency stages in radio or television receivers, said arrangement comprising a regulating stage connected after the mixer stage of the receiver and arranged to derive its control signal from an
automatic gain control circuit likewise connected to the mixer stage, and a threshold value stage by way of which the regulation of the initial high frequency stage is effected, the arrangement being such that the said regulating stage first becomes controlled by a predetermined amount, by way of the automatic gain control circuit, whereupon the regulation of the initial high frequency stage commences by way of said threshold value stage.
2. A circuit arrangement as claimed in Claim 1, wherein said predetermined amount is approximately 10db.
3. A circuit arrangement as claimed in Claim 1 or 2, wherein the signal delivered from the regulating stage is selectively derived from the mixer stage by way of a filter circuit.
4. A circuit arrangement for regulating the amplification of high frequency and intermediate frequency stages of radio or television receivers, substantially as described herein with reference to the accompanying drawing.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19813105928 DE3105928C2 (en) | 1981-02-18 | 1981-02-18 | Circuit arrangement for regulating the gain of HF and IF stages in radio and television receivers |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2093291A true GB2093291A (en) | 1982-08-25 |
GB2093291B GB2093291B (en) | 1984-09-19 |
Family
ID=6125161
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8204617A Expired GB2093291B (en) | 1981-02-18 | 1982-02-17 | Gain control circuit for high frequency and intermediate frequency stages in radio or television receivers |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS57184311A (en) |
DE (1) | DE3105928C2 (en) |
FI (1) | FI74844C (en) |
FR (1) | FR2500235B1 (en) |
GB (1) | GB2093291B (en) |
SE (1) | SE454226B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0338906A (en) * | 1989-07-05 | 1991-02-20 | Pioneer Electron Corp | Receiver |
DE4011650A1 (en) * | 1990-04-11 | 1991-10-17 | Licentia Gmbh | CONTROL CIRCUIT FOR A OVERLAY RECEIVER |
JP5429259B2 (en) | 2011-10-27 | 2014-02-26 | コニカミノルタ株式会社 | Screw fall prevention structure |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE657528C (en) * | 1938-03-07 | Marconi Wireless Telegraph Co | Receiver with automatic shrinkage control | |
FR1391976A (en) * | 1964-01-31 | 1965-03-12 | Ribet & Desjardins | Improvements to television receivers |
DE1297705B (en) * | 1966-02-08 | 1969-06-19 | Siemens Ag | Multi-stage amplifier arrangement with automatic control |
US3454721A (en) * | 1966-05-31 | 1969-07-08 | Admiral Corp | Transistorized agc system |
US3579112A (en) * | 1969-03-03 | 1971-05-18 | Rca Corp | Automatic gain control systems |
US3697883A (en) * | 1970-09-10 | 1972-10-10 | Motorola Inc | Automatic gain control circuit |
DE2460602C2 (en) * | 1974-12-20 | 1982-08-19 | Siemens AG, 1000 Berlin und 8000 München | Receiver for high-frequency electromagnetic oscillations with gain control and monitoring circuit |
JPS531007A (en) * | 1976-06-24 | 1978-01-07 | Matsushita Electric Ind Co Ltd | Manufacture of magnetic head |
JPS5350959A (en) * | 1976-10-20 | 1978-05-09 | Matsushita Electric Ind Co Ltd | Automatic gain control device |
JPS5841002B2 (en) * | 1978-04-24 | 1983-09-09 | 株式会社日立製作所 | delay AGC circuit |
JPS55121520U (en) * | 1979-02-16 | 1980-08-28 |
-
1981
- 1981-02-18 DE DE19813105928 patent/DE3105928C2/en not_active Expired
-
1982
- 1982-02-15 FI FI820502A patent/FI74844C/en not_active IP Right Cessation
- 1982-02-16 SE SE8200921A patent/SE454226B/en not_active IP Right Cessation
- 1982-02-17 GB GB8204617A patent/GB2093291B/en not_active Expired
- 1982-02-18 FR FR8202703A patent/FR2500235B1/en not_active Expired
- 1982-02-18 JP JP2369782A patent/JPS57184311A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0119649B2 (en) | 1989-04-12 |
FR2500235B1 (en) | 1986-10-10 |
JPS57184311A (en) | 1982-11-13 |
FI74844B (en) | 1987-11-30 |
FI74844C (en) | 1988-03-10 |
FI820502L (en) | 1982-08-19 |
FR2500235A1 (en) | 1982-08-20 |
GB2093291B (en) | 1984-09-19 |
SE454226B (en) | 1988-04-11 |
DE3105928C2 (en) | 1986-09-11 |
SE8200921L (en) | 1982-08-19 |
DE3105928A1 (en) | 1982-09-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19940217 |