GB1224921A - A cascaded coder - Google Patents
A cascaded coderInfo
- Publication number
- GB1224921A GB1224921A GB25343/68A GB2534368A GB1224921A GB 1224921 A GB1224921 A GB 1224921A GB 25343/68 A GB25343/68 A GB 25343/68A GB 2534368 A GB2534368 A GB 2534368A GB 1224921 A GB1224921 A GB 1224921A
- Authority
- GB
- United Kingdom
- Prior art keywords
- pulse
- amplifier
- source
- coder
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/004—Reconfigurable analogue/digital or digital/analogue converters
- H03M1/008—Reconfigurable analogue/digital or digital/analogue converters among different conversion characteristics, e.g. between mu-255 and a-laws
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Amplifiers (AREA)
- Analogue/Digital Conversion (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
1,224,921. Analogue/digital converters. FUJITSU Ltd. 27 May, 1968 [27 May, 1967; 21 Aug., 1967], No. 25343/68. Heading G4H. A coder for pulse amplitude modulated signals comprising a plurality of series connected stages 111, 121 .. 191 (Fig. 3), each including a source of bias voltage which may modify the input signal before it is fed to the next stage includes pulse-shaping circuits 112, 122 . . . 182 between some of the stages. In the embodiment described in which a reflected binary output pulse train at terminal 199 is obtained via delays 113, 123 ... 183, each pulseshaping circuit includes a sampling circuit receiving a source of timing pulses and a holding circuit. Each coder stage includes a comparator which determines the polarity of the input signal and delivers the bit of the digital signal associated with the stage, a rectifier which delivers a negative output, a positive source of bias voltage and an amplifier with a gain of approximately two. Preferably the amplifier which may include a resonant circuit is chosen to have a gain of more than two for low frequencies to reduce the time interval taken for the amplifier output to reach its ideal value. The input to the amplifier may also consist of the original input pulse together with a pulse obtained by attenuating and delaying this pulse (Fig. 13, not shown).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3384267 | 1967-05-27 | ||
JP5365367 | 1967-08-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1224921A true GB1224921A (en) | 1971-03-10 |
Family
ID=26372617
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB25343/68A Expired GB1224921A (en) | 1967-05-27 | 1968-05-27 | A cascaded coder |
Country Status (4)
Country | Link |
---|---|
US (1) | US3571757A (en) |
DE (1) | DE1762313C3 (en) |
FR (1) | FR1566065A (en) |
GB (1) | GB1224921A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2327577B (en) * | 1997-07-18 | 2002-09-11 | British Broadcasting Corp | Re-encoding decoded signals |
US6853049B2 (en) * | 2002-03-13 | 2005-02-08 | Matrix Semiconductor, Inc. | Silicide-silicon oxide-semiconductor antifuse device and method of making |
US7375664B2 (en) * | 2006-06-07 | 2008-05-20 | Texas Instruments Incorporated | Systems and methods for providing anti-aliasing in a sample-and-hold circuit |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR956416A (en) * | 1947-11-08 | 1950-02-01 | ||
NL258379A (en) * | 1959-11-26 | |||
US3035258A (en) * | 1960-11-14 | 1962-05-15 | Bell Telephone Labor Inc | Pulse code modulation encoder |
NL6513276A (en) * | 1964-10-19 | 1966-04-20 | ||
US3403226A (en) * | 1965-09-30 | 1968-09-24 | Bell Telephone Labor Inc | Reduced bandwidth dual mode encoding of video signals |
-
1968
- 1968-05-22 DE DE1762313A patent/DE1762313C3/en not_active Expired
- 1968-05-24 US US731781A patent/US3571757A/en not_active Expired - Lifetime
- 1968-05-27 GB GB25343/68A patent/GB1224921A/en not_active Expired
- 1968-05-27 FR FR1566065D patent/FR1566065A/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR1566065A (en) | 1969-05-02 |
US3571757A (en) | 1971-03-23 |
DE1762313A1 (en) | 1970-04-16 |
DE1762313B2 (en) | 1971-12-16 |
DE1762313C3 (en) | 1978-08-24 |
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