FR2543740B1 - METHOD FOR PRODUCING TRANSISTORS BY MONOLITHIC INTEGRATION IN ISOPLANAR TECHNOLOGY AND INTEGRATED CIRCUITS THUS OBTAINED - Google Patents

METHOD FOR PRODUCING TRANSISTORS BY MONOLITHIC INTEGRATION IN ISOPLANAR TECHNOLOGY AND INTEGRATED CIRCUITS THUS OBTAINED

Info

Publication number
FR2543740B1
FR2543740B1 FR8305031A FR8305031A FR2543740B1 FR 2543740 B1 FR2543740 B1 FR 2543740B1 FR 8305031 A FR8305031 A FR 8305031A FR 8305031 A FR8305031 A FR 8305031A FR 2543740 B1 FR2543740 B1 FR 2543740B1
Authority
FR
France
Prior art keywords
integrated circuits
monolithic integration
producing transistors
isoplanar
technology
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8305031A
Other languages
French (fr)
Other versions
FR2543740A1 (en
Inventor
Gilbert Marie Marcel Ferrieu
Jean Martial Ducamus
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telecommunications Radioelectriques et Telephoniques SA TRT
Original Assignee
Telecommunications Radioelectriques et Telephoniques SA TRT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telecommunications Radioelectriques et Telephoniques SA TRT filed Critical Telecommunications Radioelectriques et Telephoniques SA TRT
Priority to FR8305031A priority Critical patent/FR2543740B1/en
Publication of FR2543740A1 publication Critical patent/FR2543740A1/en
Application granted granted Critical
Publication of FR2543740B1 publication Critical patent/FR2543740B1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743—Making of internal connections, substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
FR8305031A 1983-03-28 1983-03-28 METHOD FOR PRODUCING TRANSISTORS BY MONOLITHIC INTEGRATION IN ISOPLANAR TECHNOLOGY AND INTEGRATED CIRCUITS THUS OBTAINED Expired FR2543740B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8305031A FR2543740B1 (en) 1983-03-28 1983-03-28 METHOD FOR PRODUCING TRANSISTORS BY MONOLITHIC INTEGRATION IN ISOPLANAR TECHNOLOGY AND INTEGRATED CIRCUITS THUS OBTAINED

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8305031A FR2543740B1 (en) 1983-03-28 1983-03-28 METHOD FOR PRODUCING TRANSISTORS BY MONOLITHIC INTEGRATION IN ISOPLANAR TECHNOLOGY AND INTEGRATED CIRCUITS THUS OBTAINED

Publications (2)

Publication Number Publication Date
FR2543740A1 FR2543740A1 (en) 1984-10-05
FR2543740B1 true FR2543740B1 (en) 1986-05-09

Family

ID=9287294

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8305031A Expired FR2543740B1 (en) 1983-03-28 1983-03-28 METHOD FOR PRODUCING TRANSISTORS BY MONOLITHIC INTEGRATION IN ISOPLANAR TECHNOLOGY AND INTEGRATED CIRCUITS THUS OBTAINED

Country Status (1)

Country Link
FR (1) FR2543740B1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0215213A1 (en) * 1985-09-16 1987-03-25 Tektronix, Inc. Method of fabricating high voltage and low voltage transistors using an epitaxial layer of uniform thickness
FR2807567A1 (en) * 2000-04-10 2001-10-12 St Microelectronics Sa METHOD FOR PRODUCING A BIPOLAR TRANSISTOR
DE102017112647B4 (en) * 2017-06-08 2020-06-18 RF360 Europe GmbH Electrical component wafer and electrical component

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3972754A (en) * 1975-05-30 1976-08-03 Ibm Corporation Method for forming dielectric isolation in integrated circuits
US4311532A (en) * 1979-07-27 1982-01-19 Harris Corporation Method of making junction isolated bipolar device in unisolated IGFET IC
US4454647A (en) * 1981-08-27 1984-06-19 International Business Machines Corporation Isolation for high density integrated circuits

Also Published As

Publication number Publication date
FR2543740A1 (en) 1984-10-05

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ST Notification of lapse