FI981301A0 - Prosessivaihtelujen eliminointimenetelmä u-MOSFET-rakenteissa - Google Patents
Prosessivaihtelujen eliminointimenetelmä u-MOSFET-rakenteissaInfo
- Publication number
- FI981301A0 FI981301A0 FI981301A FI981301A FI981301A0 FI 981301 A0 FI981301 A0 FI 981301A0 FI 981301 A FI981301 A FI 981301A FI 981301 A FI981301 A FI 981301A FI 981301 A0 FI981301 A0 FI 981301A0
- Authority
- FI
- Finland
- Prior art keywords
- process variations
- eliminating process
- mosfet structures
- mosfet
- structures
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI981301A FI981301A0 (fi) | 1998-06-08 | 1998-06-08 | Prosessivaihtelujen eliminointimenetelmä u-MOSFET-rakenteissa |
PCT/FI1999/000494 WO1999067827A2 (fi) | 1998-06-08 | 1999-06-08 | Semiconductor structure and procedure for minimising nonidealities |
US09/719,133 US6501126B1 (en) | 1998-06-08 | 1999-06-08 | Semiconductor structure and procedure for minimizing non-idealities |
EP99931268A EP1093669A2 (en) | 1998-06-08 | 1999-06-08 | Semiconductor structure and procedure for minimising non-idealities |
AU47826/99A AU4782699A (en) | 1998-06-08 | 1999-06-08 | Semiconductor structure and procedure for minimising non-idealities |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI981301A FI981301A0 (fi) | 1998-06-08 | 1998-06-08 | Prosessivaihtelujen eliminointimenetelmä u-MOSFET-rakenteissa |
Publications (1)
Publication Number | Publication Date |
---|---|
FI981301A0 true FI981301A0 (fi) | 1998-06-08 |
Family
ID=8551931
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FI981301A FI981301A0 (fi) | 1998-06-08 | 1998-06-08 | Prosessivaihtelujen eliminointimenetelmä u-MOSFET-rakenteissa |
Country Status (5)
Country | Link |
---|---|
US (1) | US6501126B1 (fi) |
EP (1) | EP1093669A2 (fi) |
AU (1) | AU4782699A (fi) |
FI (1) | FI981301A0 (fi) |
WO (1) | WO1999067827A2 (fi) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4331968A (en) | 1980-03-17 | 1982-05-25 | Mostek Corporation | Three layer floating gate memory transistor with erase gate over field oxide region |
TW203665B (fi) | 1991-03-21 | 1993-04-11 | Shibata Naoru | |
US5294819A (en) | 1992-11-25 | 1994-03-15 | Information Storage Devices | Single-transistor cell EEPROM array for analog or digital storage |
JP3337599B2 (ja) * | 1995-07-24 | 2002-10-21 | 株式会社リコー | 半導体装置およびインバータ回路並びにコンパレータ並びにa/dコンバータ回路 |
US6008508A (en) * | 1996-09-12 | 1999-12-28 | National Semiconductor Corporation | ESD Input protection using a floating gate neuron MOSFET as a tunable trigger element |
JP4330670B2 (ja) * | 1997-06-06 | 2009-09-16 | 株式会社東芝 | 不揮発性半導体記憶装置 |
-
1998
- 1998-06-08 FI FI981301A patent/FI981301A0/fi unknown
-
1999
- 1999-06-08 EP EP99931268A patent/EP1093669A2/en not_active Withdrawn
- 1999-06-08 WO PCT/FI1999/000494 patent/WO1999067827A2/fi not_active Application Discontinuation
- 1999-06-08 US US09/719,133 patent/US6501126B1/en not_active Expired - Fee Related
- 1999-06-08 AU AU47826/99A patent/AU4782699A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
AU4782699A (en) | 2000-01-10 |
WO1999067827A3 (fi) | 2000-02-10 |
US6501126B1 (en) | 2002-12-31 |
WO1999067827A2 (fi) | 1999-12-29 |
EP1093669A2 (en) | 2001-04-25 |
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