EP1779256A4 - Programmable processor architecture - Google Patents

Programmable processor architecture

Info

Publication number
EP1779256A4
EP1779256A4 EP05771043A EP05771043A EP1779256A4 EP 1779256 A4 EP1779256 A4 EP 1779256A4 EP 05771043 A EP05771043 A EP 05771043A EP 05771043 A EP05771043 A EP 05771043A EP 1779256 A4 EP1779256 A4 EP 1779256A4
Authority
EP
European Patent Office
Prior art keywords
programmable processor
processor architecture
architecture
programmable
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05771043A
Other languages
German (de)
French (fr)
Other versions
EP1779256A2 (en
Inventor
Ramchandran Amit
Reid Hauser John Jr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
3Plus1 Technology Inc
Original Assignee
3Plus1 Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 3Plus1 Technology Inc filed Critical 3Plus1 Technology Inc
Publication of EP1779256A2 publication Critical patent/EP1779256A2/en
Publication of EP1779256A4 publication Critical patent/EP1779256A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7864—Architectures of general purpose stored program computers comprising a single central processing unit with memory on more than one IC chip
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Advance Control (AREA)
  • Microcomputers (AREA)
EP05771043A 2004-07-13 2005-07-12 Programmable processor architecture Withdrawn EP1779256A4 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US58769104P 2004-07-13 2004-07-13
US59841704P 2004-08-02 2004-08-02
PCT/US2005/024867 WO2006017339A2 (en) 2004-07-13 2005-07-12 Programmable processor system with two types of sub-processors to execute multimedia applications

Publications (2)

Publication Number Publication Date
EP1779256A2 EP1779256A2 (en) 2007-05-02
EP1779256A4 true EP1779256A4 (en) 2007-11-28

Family

ID=35839807

Family Applications (1)

Application Number Title Priority Date Filing Date
EP05771043A Withdrawn EP1779256A4 (en) 2004-07-13 2005-07-12 Programmable processor architecture

Country Status (5)

Country Link
EP (1) EP1779256A4 (en)
JP (1) JP2008507039A (en)
KR (1) KR20070055487A (en)
CA (1) CA2572954A1 (en)
WO (1) WO2006017339A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7856246B2 (en) 2007-03-21 2010-12-21 Nokia Corporation Multi-cell data processor
GB2474901B (en) * 2009-10-30 2015-01-07 Advanced Risc Mach Ltd Apparatus and method for performing multiply-accumulate operations
WO2014190263A2 (en) 2013-05-24 2014-11-27 Coherent Logix, Incorporated Memory-network processor with programmable optimizations
JP6102528B2 (en) 2013-06-03 2017-03-29 富士通株式会社 Signal processing apparatus and signal processing method
KR102235803B1 (en) * 2017-03-31 2021-04-06 삼성전자주식회사 Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1126368A2 (en) * 2000-02-18 2001-08-22 Texas Instruments Incorporated Microprocessor with non-aligned circular addressing

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9509989D0 (en) * 1995-05-17 1995-07-12 Sgs Thomson Microelectronics Manipulation of data
US6331856B1 (en) * 1995-11-22 2001-12-18 Nintendo Co., Ltd. Video game system with coprocessor providing high speed efficient 3D graphics and digital audio signal processing
US5909559A (en) * 1997-04-04 1999-06-01 Texas Instruments Incorporated Bus bridge device including data bus of first width for a first processor, memory controller, arbiter circuit and second processor having a different second data width
US5878085A (en) * 1997-08-15 1999-03-02 Sicom, Inc. Trellis coded modulation communications using pilot bits to resolve phase ambiguities
WO1999010226A2 (en) * 1997-08-22 1999-03-04 Jens Korsgaard Fluid swivel for oil production vessels and tanker vessels
JP2991694B1 (en) * 1998-06-12 1999-12-20 日本放送協会 Digital transmitter and receiver
US6643332B1 (en) * 1999-07-09 2003-11-04 Lsi Logic Corporation Method and apparatus for multi-level coding of digital signals
US7313583B2 (en) * 2002-10-22 2007-12-25 Broadcom Corporation Galois field arithmetic unit for use within a processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1126368A2 (en) * 2000-02-18 2001-08-22 Texas Instruments Incorporated Microprocessor with non-aligned circular addressing

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
HOOGENBOOM: "TASKING helps Siemens with 32-bit TriCore architecture design", INTERNET CITATION, November 1997 (1997-11-01), XP002259125, Retrieved from the Internet <URL:http://www.tasking.com/technology/tricore-archttecture.pdf> [retrieved on 20031024] *
MANI BHADRA VAYA: "VITURBO: A Reconfigurable Architecture for Ubiquitous Wireless Networks", THESIS: MASTER OF SCIENCE. ELECTRICAL AND COMPUTER ENGINEERING RICE UNIVERSITY HOUSTON, August 2002 (2002-08-01), pages complete, XP002314960 *
STOLBERG H-J ET AL: "HiBRID-SoC: a multi-core system-on-chip architecture for multimedia signal processing applications", DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, 2003 MUNICH, GERMANY 3-7 MARCH 2003, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 3 March 2003 (2003-03-03), pages 8 - 13suppl, XP010673491, ISBN: 0-7695-1870-2 *

Also Published As

Publication number Publication date
EP1779256A2 (en) 2007-05-02
WO2006017339A2 (en) 2006-02-16
JP2008507039A (en) 2008-03-06
KR20070055487A (en) 2007-05-30
WO2006017339A3 (en) 2006-04-06
CA2572954A1 (en) 2006-02-16

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Legal Events

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