DE69629331D1 - System und Verfahren zur Bereitstellung einer flexiblen Speicherhierarchie - Google Patents
System und Verfahren zur Bereitstellung einer flexiblen SpeicherhierarchieInfo
- Publication number
- DE69629331D1 DE69629331D1 DE69629331T DE69629331T DE69629331D1 DE 69629331 D1 DE69629331 D1 DE 69629331D1 DE 69629331 T DE69629331 T DE 69629331T DE 69629331 T DE69629331 T DE 69629331T DE 69629331 D1 DE69629331 D1 DE 69629331D1
- Authority
- DE
- Germany
- Prior art keywords
- providing
- storage hierarchy
- flexible storage
- hierarchy
- flexible
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
- G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US46018895A | 1995-06-02 | 1995-06-02 | |
US460188 | 1995-06-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69629331D1 true DE69629331D1 (de) | 2003-09-11 |
DE69629331T2 DE69629331T2 (de) | 2004-02-12 |
Family
ID=23827707
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69629331T Expired - Fee Related DE69629331T2 (de) | 1995-06-02 | 1996-05-28 | System und Verfahren zur Bereitstellung einer flexiblen Speicherhierarchie |
Country Status (4)
Country | Link |
---|---|
US (2) | US5812816A (de) |
EP (1) | EP0745941B1 (de) |
JP (1) | JPH09179779A (de) |
DE (1) | DE69629331T2 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69629331T2 (de) * | 1995-06-02 | 2004-02-12 | Sun Microsystems, Inc., Mountain View | System und Verfahren zur Bereitstellung einer flexiblen Speicherhierarchie |
US6032271A (en) | 1996-06-05 | 2000-02-29 | Compaq Computer Corporation | Method and apparatus for identifying faulty devices in a computer system |
US6240501B1 (en) * | 1997-09-05 | 2001-05-29 | Sun Microsystems, Inc. | Cache-less address translation |
US6553475B2 (en) * | 1997-10-09 | 2003-04-22 | Matsushita Electric Industrial Co., Ltd. | Memory system with address conversion based on inherent performance condition |
US6665749B1 (en) * | 1999-08-17 | 2003-12-16 | Nec Electronics, Inc. | Bus protocol for efficiently transferring vector data |
US7523290B2 (en) * | 2000-02-29 | 2009-04-21 | International Business Machines Corporation | Very high speed page operations in indirect accessed memory systems |
US6665787B2 (en) * | 2000-02-29 | 2003-12-16 | International Business Machines Corporation | Very high speed page operations in indirect accessed memory systems |
US7782363B2 (en) * | 2000-06-27 | 2010-08-24 | Front Row Technologies, Llc | Providing multiple video perspectives of activities through a data network to a remote multimedia server for selective display by remote viewing audiences |
JP2003108438A (ja) * | 2001-09-28 | 2003-04-11 | Supreme Magic:Kk | データ処理装置 |
US6681301B1 (en) | 2001-10-02 | 2004-01-20 | Advanced Micro Devices, Inc. | System for controlling multiple memory types |
US8972645B2 (en) * | 2012-09-19 | 2015-03-03 | Hewlett-Packard Development Company, L.P. | Request sent to storage device based on moving average |
US10152425B2 (en) * | 2016-06-13 | 2018-12-11 | Advanced Micro Devices, Inc. | Cache entry replacement based on availability of entries at another cache |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5250132A (en) * | 1975-10-21 | 1977-04-21 | Casio Comput Co Ltd | Information processing control unit |
JPS60134953A (ja) * | 1983-12-23 | 1985-07-18 | Hitachi Ltd | デ−タ転送制御装置 |
US4774659A (en) * | 1986-04-16 | 1988-09-27 | Astronautics Corporation Of America | Computer system employing virtual memory |
JPH02253356A (ja) * | 1989-03-28 | 1990-10-12 | Toshiba Corp | 階層キャッシュメモリ装置とその制御方式 |
JPH031260A (ja) * | 1989-05-30 | 1991-01-07 | Hitachi Ltd | 計算機方式 |
US5185694A (en) * | 1989-06-26 | 1993-02-09 | Motorola, Inc. | Data processing system utilizes block move instruction for burst transferring blocks of data entries where width of data blocks varies |
JPH0821233B2 (ja) * | 1990-03-13 | 1996-03-04 | 株式会社東芝 | 画像メモリおよび画像メモリからデータを読み出す方法 |
US5249282A (en) * | 1990-11-21 | 1993-09-28 | Benchmarq Microelectronics, Inc. | Integrated cache memory system with primary and secondary cache memories |
DE69129401T2 (de) * | 1990-12-25 | 1998-10-29 | Mitsubishi Electric Corp | Halbleiterspeichervorrichtung mit einem grossen Speicher und einem Hochgeschwindigkeitsspeicher |
GB2256512B (en) * | 1991-06-04 | 1995-03-15 | Intel Corp | Second level cache controller unit and system |
JP2665081B2 (ja) * | 1991-07-08 | 1997-10-22 | 三菱電機株式会社 | マイクロコンピュータのレジスタ間データ転送方式 |
US5313647A (en) * | 1991-09-20 | 1994-05-17 | Kendall Square Research Corporation | Digital data processor with improved checkpointing and forking |
US5386547A (en) * | 1992-01-21 | 1995-01-31 | Digital Equipment Corporation | System and method for exclusive two-level caching |
US5623624A (en) * | 1993-02-01 | 1997-04-22 | Micron Technology, Inc. | Memory control architecture for high speed transfer options |
DE69629331T2 (de) * | 1995-06-02 | 2004-02-12 | Sun Microsystems, Inc., Mountain View | System und Verfahren zur Bereitstellung einer flexiblen Speicherhierarchie |
-
1996
- 1996-05-28 DE DE69629331T patent/DE69629331T2/de not_active Expired - Fee Related
- 1996-05-28 EP EP96303792A patent/EP0745941B1/de not_active Expired - Lifetime
- 1996-06-03 JP JP8160478A patent/JPH09179779A/ja active Pending
-
1997
- 1997-02-26 US US08/806,860 patent/US5812816A/en not_active Expired - Fee Related
- 1997-09-12 US US08/928,221 patent/US6055613A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6055613A (en) | 2000-04-25 |
DE69629331T2 (de) | 2004-02-12 |
EP0745941A2 (de) | 1996-12-04 |
EP0745941A3 (de) | 1997-02-26 |
US5812816A (en) | 1998-09-22 |
JPH09179779A (ja) | 1997-07-11 |
EP0745941B1 (de) | 2003-08-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |