DE69408772D1 - Halbleitervorrichtung mit schnellen lateralem DMOST mit Hochspannungs-Sourceelektrode - Google Patents
Halbleitervorrichtung mit schnellen lateralem DMOST mit Hochspannungs-SourceelektrodeInfo
- Publication number
- DE69408772D1 DE69408772D1 DE69408772T DE69408772T DE69408772D1 DE 69408772 D1 DE69408772 D1 DE 69408772D1 DE 69408772 T DE69408772 T DE 69408772T DE 69408772 T DE69408772 T DE 69408772T DE 69408772 D1 DE69408772 D1 DE 69408772D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- high voltage
- source electrode
- voltage source
- fast lateral
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BE9301086A BE1007657A3 (nl) | 1993-10-14 | 1993-10-14 | Halfgeleiderinrichting met een snelle laterale dmost voorzien van een hoogspanningsaanvoerelektrode. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69408772D1 true DE69408772D1 (de) | 1998-04-09 |
DE69408772T2 DE69408772T2 (de) | 1998-08-27 |
Family
ID=3887426
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69408772T Expired - Lifetime DE69408772T2 (de) | 1993-10-14 | 1994-10-07 | Halbleitervorrichtung mit schnellen lateralem DMOST mit Hochspannungs-Sourceelektrode |
Country Status (6)
Country | Link |
---|---|
US (1) | US5610432A (de) |
EP (1) | EP0649177B1 (de) |
JP (1) | JP4014659B2 (de) |
KR (1) | KR100313287B1 (de) |
BE (1) | BE1007657A3 (de) |
DE (1) | DE69408772T2 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11501462A (ja) * | 1995-12-21 | 1999-02-02 | フィリップス エレクトロニクス ネムローゼ フェンノートシャップ | 表面電界減少型(resurf型)高電圧半導体装置の製造方法及びその製造方法によって製造される半導体装置 |
WO1998053505A2 (en) * | 1997-05-23 | 1998-11-26 | Koninklijke Philips Electronics N.V. | Lateral mos semiconductor device |
EP1029358A1 (de) * | 1997-11-03 | 2000-08-23 | Infineon Technologies AG | Hochspannungsfeste randstruktur für halbleiterbauelemente |
KR100362531B1 (ko) * | 2000-10-09 | 2002-11-29 | 한국신발피혁연구소 | 내변색을 개선시키는 앨범용 라텍스 점착제 조성물 |
US6448625B1 (en) * | 2001-03-16 | 2002-09-10 | Semiconductor Components Industries Llc | High voltage metal oxide device with enhanced well region |
KR100447073B1 (ko) * | 2001-11-29 | 2004-09-04 | 서석홍 | 유색점착제 제조방법 |
KR20030050359A (ko) * | 2001-12-18 | 2003-06-25 | 박명원 | 발열중합반응을 이용한 유색아크릴수지를 함유한 코팅용점착제의 제조방법 및 그 방법에 의해 제조된 점착제 |
KR100538776B1 (ko) * | 2002-05-29 | 2005-12-23 | 서석홍 | 점착제 제조방법 |
JP4791113B2 (ja) * | 2005-09-12 | 2011-10-12 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置 |
US8174051B2 (en) * | 2007-06-26 | 2012-05-08 | International Rectifier Corporation | III-nitride power device |
US20160284801A1 (en) * | 2013-11-27 | 2016-09-29 | Renesas Electronics Corporation | Semiconductor device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5645074A (en) * | 1979-09-20 | 1981-04-24 | Nippon Telegr & Teleph Corp <Ntt> | High-pressure-resistance mos type semiconductor device |
NL8401983A (nl) * | 1984-06-22 | 1986-01-16 | Philips Nv | Halfgeleiderinrichting met verhoogde doorslagspanning. |
GB2173037A (en) * | 1985-03-29 | 1986-10-01 | Philips Electronic Associated | Semiconductor devices employing conductivity modulation |
US5034790A (en) * | 1989-05-23 | 1991-07-23 | U.S. Philips Corp. | MOS transistor with semi-insulating field plate and surface-adjoining top layer |
EP0571027A1 (de) * | 1992-05-21 | 1993-11-24 | Koninklijke Philips Electronics N.V. | Halbleiteranordnung, die einen lateralen DMOS-Transistor mit die Durchbruchspannung anhebenden Zonen und Vorkehrungen für den Ladungsaustausch mit dem Backgate-Gebiet enthält |
TW218424B (de) * | 1992-05-21 | 1994-01-01 | Philips Nv |
-
1993
- 1993-10-14 BE BE9301086A patent/BE1007657A3/nl not_active IP Right Cessation
-
1994
- 1994-10-07 EP EP94202908A patent/EP0649177B1/de not_active Expired - Lifetime
- 1994-10-07 DE DE69408772T patent/DE69408772T2/de not_active Expired - Lifetime
- 1994-10-13 JP JP24776794A patent/JP4014659B2/ja not_active Expired - Lifetime
- 1994-10-13 KR KR1019940026166A patent/KR100313287B1/ko not_active IP Right Cessation
- 1994-10-13 US US08/323,463 patent/US5610432A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR950012769A (ko) | 1995-05-17 |
BE1007657A3 (nl) | 1995-09-05 |
US5610432A (en) | 1997-03-11 |
DE69408772T2 (de) | 1998-08-27 |
JPH07176744A (ja) | 1995-07-14 |
KR100313287B1 (ko) | 2002-08-09 |
EP0649177A1 (de) | 1995-04-19 |
EP0649177B1 (de) | 1998-03-04 |
JP4014659B2 (ja) | 2007-11-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: NXP B.V., EINDHOVEN, NL |