DE69222722D1 - Speichergerät von SCR-Typ - Google Patents
Speichergerät von SCR-TypInfo
- Publication number
- DE69222722D1 DE69222722D1 DE69222722T DE69222722T DE69222722D1 DE 69222722 D1 DE69222722 D1 DE 69222722D1 DE 69222722 T DE69222722 T DE 69222722T DE 69222722 T DE69222722 T DE 69222722T DE 69222722 D1 DE69222722 D1 DE 69222722D1
- Authority
- DE
- Germany
- Prior art keywords
- storage device
- type storage
- scr type
- scr
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/415—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/10—SRAM devices comprising bipolar components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3233846A JPH0548029A (ja) | 1991-08-21 | 1991-08-21 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69222722D1 true DE69222722D1 (de) | 1997-11-20 |
DE69222722T2 DE69222722T2 (de) | 1998-05-07 |
Family
ID=16961488
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69222722T Expired - Fee Related DE69222722T2 (de) | 1991-08-21 | 1992-08-21 | Speichergerät von SCR-Typ |
Country Status (5)
Country | Link |
---|---|
US (1) | US5287303A (de) |
EP (1) | EP0530623B1 (de) |
JP (1) | JPH0548029A (de) |
KR (1) | KR930005196A (de) |
DE (1) | DE69222722T2 (de) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1489577A (en) * | 1973-10-02 | 1977-10-19 | Plessey Co Ltd | Solid state circuits |
US4409673A (en) * | 1980-12-31 | 1983-10-11 | Ibm Corporation | Single isolation cell for DC stable memory |
US4635087A (en) * | 1984-12-28 | 1987-01-06 | Motorola, Inc. | Monolithic bipolar SCR memory cell |
JPH0482085A (ja) * | 1990-07-25 | 1992-03-16 | Toshiba Corp | スタティック型メモリセル |
-
1991
- 1991-08-21 JP JP3233846A patent/JPH0548029A/ja active Pending
-
1992
- 1992-08-18 US US07/931,799 patent/US5287303A/en not_active Expired - Fee Related
- 1992-08-19 KR KR1019920014874A patent/KR930005196A/ko not_active Application Discontinuation
- 1992-08-21 DE DE69222722T patent/DE69222722T2/de not_active Expired - Fee Related
- 1992-08-21 EP EP92114347A patent/EP0530623B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69222722T2 (de) | 1998-05-07 |
JPH0548029A (ja) | 1993-02-26 |
EP0530623B1 (de) | 1997-10-15 |
EP0530623A3 (en) | 1995-05-03 |
EP0530623A2 (de) | 1993-03-10 |
US5287303A (en) | 1994-02-15 |
KR930005196A (ko) | 1993-03-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |