DE602006012011D1 - Verbesserungen am Entwurf von Spannungsschalter - Google Patents
Verbesserungen am Entwurf von SpannungsschalterInfo
- Publication number
- DE602006012011D1 DE602006012011D1 DE200660012011 DE602006012011T DE602006012011D1 DE 602006012011 D1 DE602006012011 D1 DE 602006012011D1 DE 200660012011 DE200660012011 DE 200660012011 DE 602006012011 T DE602006012011 T DE 602006012011T DE 602006012011 D1 DE602006012011 D1 DE 602006012011D1
- Authority
- DE
- Germany
- Prior art keywords
- design
- voltage switches
- switches
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K31/00—Medicinal preparations containing organic active ingredients
- A61K31/70—Carbohydrates; Sugars; Derivatives thereof
- A61K31/715—Polysaccharides, i.e. having more than five saccharide radicals attached to each other by glycosidic linkages; Derivatives thereof, e.g. ethers, esters
- A61K31/737—Sulfated polysaccharides, e.g. chondroitin sulfate, dermatan sulfate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/002—Switching arrangements with several input- or output terminals
- H03K17/005—Switching arrangements with several input- or output terminals with several inputs only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
- H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
Landscapes
- Health & Medical Sciences (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Life Sciences & Earth Sciences (AREA)
- Pharmacology & Pharmacy (AREA)
- Chemical & Material Sciences (AREA)
- Medicinal Chemistry (AREA)
- Molecular Biology (AREA)
- Epidemiology (AREA)
- Animal Behavior & Ethology (AREA)
- General Health & Medical Sciences (AREA)
- Public Health (AREA)
- Veterinary Medicine (AREA)
- Dermatology (AREA)
- Read Only Memory (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP20060111477 EP1837993B1 (de) | 2006-03-21 | 2006-03-21 | Verbesserungen am Entwurf von Spannungsschalter |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602006012011D1 true DE602006012011D1 (de) | 2010-03-18 |
Family
ID=36685791
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE200660012011 Active DE602006012011D1 (de) | 2006-03-21 | 2006-03-21 | Verbesserungen am Entwurf von Spannungsschalter |
DE200660008738 Active DE602006008738D1 (de) | 2006-03-21 | 2006-05-04 | Zeilenselektor für einen Halbleiterspeicher mit Niedrigspannungstransistoren |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE200660008738 Active DE602006008738D1 (de) | 2006-03-21 | 2006-05-04 | Zeilenselektor für einen Halbleiterspeicher mit Niedrigspannungstransistoren |
Country Status (3)
Country | Link |
---|---|
US (1) | US20090009002A1 (de) |
EP (2) | EP1837993B1 (de) |
DE (2) | DE602006012011D1 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1835507B1 (de) | 2006-03-17 | 2010-08-18 | STMicroelectronics Srl | Mit Niederspannungstransistoren implementierter Pegelschieber für eine Halbleiterspeichervorrichtung |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2607338A1 (fr) * | 1986-11-21 | 1988-05-27 | Eurotechnique Sa | Circuit de commutation de tension en technologie mos |
US5287536A (en) * | 1990-04-23 | 1994-02-15 | Texas Instruments Incorporated | Nonvolatile memory array wordline driver circuit with voltage translator circuit |
US5770897A (en) * | 1996-09-16 | 1998-06-23 | Abb Power T&D Company Inc. | Hybrid solid state switch |
US5796656A (en) * | 1997-02-22 | 1998-08-18 | Programmable Microelectronics Corporation | Row decoder circuit for PMOS non-volatile memory cell which uses electron tunneling for programming and erasing |
US6281724B1 (en) * | 1998-11-17 | 2001-08-28 | Analog Devices, Inc. | Circuit for partial power-down on dual voltage supply integrated circuits |
JP4057756B2 (ja) * | 2000-03-01 | 2008-03-05 | 松下電器産業株式会社 | 半導体集積回路 |
US7256517B2 (en) * | 2000-08-23 | 2007-08-14 | Lsi Corporation | Interface circuit for providing a computer logic circuit with first and second voltages and an associated method |
US6249177B1 (en) * | 2000-09-28 | 2001-06-19 | Cypress Semiconductor Corp. | Method, circuit and/or architecture for reducing gate oxide stress in low-voltage regulated devices |
FR2816751A1 (fr) | 2000-11-15 | 2002-05-17 | St Microelectronics Sa | Memoire flash effacable par page |
KR100909960B1 (ko) * | 2004-12-28 | 2009-07-29 | 삼성전자주식회사 | 다중 인터페이스 카드에서의 전원전압 제어장치 및 방법 |
-
2006
- 2006-03-21 DE DE200660012011 patent/DE602006012011D1/de active Active
- 2006-03-21 EP EP20060111477 patent/EP1837993B1/de active Active
- 2006-05-04 DE DE200660008738 patent/DE602006008738D1/de active Active
- 2006-05-04 EP EP20060113480 patent/EP1837880B1/de active Active
-
2007
- 2007-03-21 US US11/726,707 patent/US20090009002A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP1837993B1 (de) | 2010-01-27 |
US20090009002A1 (en) | 2009-01-08 |
EP1837993A1 (de) | 2007-09-26 |
DE602006008738D1 (de) | 2009-10-08 |
EP1837880A1 (de) | 2007-09-26 |
EP1837880B1 (de) | 2009-08-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |