DE60115795D1 - Adaptiver Wiederholungsmechanismus - Google Patents

Adaptiver Wiederholungsmechanismus

Info

Publication number
DE60115795D1
DE60115795D1 DE60115795T DE60115795T DE60115795D1 DE 60115795 D1 DE60115795 D1 DE 60115795D1 DE 60115795 T DE60115795 T DE 60115795T DE 60115795 T DE60115795 T DE 60115795T DE 60115795 D1 DE60115795 D1 DE 60115795D1
Authority
DE
Germany
Prior art keywords
repetition mechanism
adaptive repetition
adaptive
repetition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60115795T
Other languages
English (en)
Other versions
DE60115795T2 (de
Inventor
James B Keller
Chun H Ning
Chui A Kwong-Tak
Mark D Hayter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broadcom Corp
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Application granted granted Critical
Publication of DE60115795D1 publication Critical patent/DE60115795D1/de
Publication of DE60115795T2 publication Critical patent/DE60115795T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Debugging And Monitoring (AREA)
  • Retry When Errors Occur (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE60115795T 2000-09-26 2001-09-24 Adaptiver Wiederholungsmechanismus Expired - Lifetime DE60115795T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US670362 2000-09-26
US09/670,362 US6633936B1 (en) 2000-09-26 2000-09-26 Adaptive retry mechanism

Publications (2)

Publication Number Publication Date
DE60115795D1 true DE60115795D1 (de) 2006-01-19
DE60115795T2 DE60115795T2 (de) 2006-07-20

Family

ID=24690120

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60115795T Expired - Lifetime DE60115795T2 (de) 2000-09-26 2001-09-24 Adaptiver Wiederholungsmechanismus

Country Status (3)

Country Link
US (2) US6633936B1 (de)
EP (1) EP1191454B1 (de)
DE (1) DE60115795T2 (de)

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* Cited by examiner, † Cited by third party
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US5978379A (en) 1997-01-23 1999-11-02 Gadzoox Networks, Inc. Fiber channel learning bridge, learning half bridge, and protocol
US7430171B2 (en) 1998-11-19 2008-09-30 Broadcom Corporation Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
US6633936B1 (en) * 2000-09-26 2003-10-14 Broadcom Corporation Adaptive retry mechanism
US6912608B2 (en) * 2001-04-27 2005-06-28 Pts Corporation Methods and apparatus for pipelined bus
US6766389B2 (en) * 2001-05-18 2004-07-20 Broadcom Corporation System on a chip for networking
US7904454B2 (en) * 2001-07-16 2011-03-08 International Business Machines Corporation Database access security
US7239636B2 (en) 2001-07-23 2007-07-03 Broadcom Corporation Multiple virtual channels for use in network devices
US20030101297A1 (en) * 2001-11-29 2003-05-29 International Business Machines Corporation Dynamic request pacing in switch systems
US7295555B2 (en) 2002-03-08 2007-11-13 Broadcom Corporation System and method for identifying upper layer protocol message boundaries
US6816954B2 (en) * 2002-07-29 2004-11-09 Lsi Logic Corporation System and method for tuning retry performance
US7346701B2 (en) 2002-08-30 2008-03-18 Broadcom Corporation System and method for TCP offload
US7934021B2 (en) 2002-08-29 2011-04-26 Broadcom Corporation System and method for network interfacing
US7411959B2 (en) 2002-08-30 2008-08-12 Broadcom Corporation System and method for handling out-of-order frames
US7313623B2 (en) 2002-08-30 2007-12-25 Broadcom Corporation System and method for TCP/IP offload independent of bandwidth delay product
US8180928B2 (en) 2002-08-30 2012-05-15 Broadcom Corporation Method and system for supporting read operations with CRC for iSCSI and iSCSI chimney
US7035958B2 (en) * 2002-10-03 2006-04-25 International Business Machines Corporation Re-ordering a first request within a FIFO request queue to a different queue position when the first request receives a retry response from the target
US7096289B2 (en) * 2003-01-16 2006-08-22 International Business Machines Corporation Sender to receiver request retry method and apparatus
US7506371B1 (en) 2004-01-22 2009-03-17 Guardium, Inc. System and methods for adaptive behavior based access control
US7346710B2 (en) 2004-04-12 2008-03-18 Stephen Waller Melvin Apparatus for input/output expansion without additional control line wherein first and second signals transition directly to a different state when necessary to perform input/output
US7966439B1 (en) * 2004-11-24 2011-06-21 Nvidia Corporation Apparatus, system, and method for a fast data return memory controller
US7535908B2 (en) * 2005-06-09 2009-05-19 International Business Machines Corporation Method for data transfer
US7970788B2 (en) 2005-08-02 2011-06-28 International Business Machines Corporation Selective local database access restriction
US7933923B2 (en) * 2005-11-04 2011-04-26 International Business Machines Corporation Tracking and reconciling database commands
US20090265485A1 (en) * 2005-11-30 2009-10-22 Broadcom Corporation Ring-based cache coherent bus
JP4555791B2 (ja) * 2006-03-16 2010-10-06 富士通株式会社 データ読出方法及びデータ読出装置
DE102006021733A1 (de) * 2006-05-09 2007-11-22 Bayer Healthcare Ag 3-Tetrazolylindazole und 3-Tetrazolylpyrazolopyridine sowie ihre Verwendung
US8141100B2 (en) 2006-12-20 2012-03-20 International Business Machines Corporation Identifying attribute propagation for multi-tier processing
US8495367B2 (en) 2007-02-22 2013-07-23 International Business Machines Corporation Nondestructive interception of secure data in transit
US8261326B2 (en) 2008-04-25 2012-09-04 International Business Machines Corporation Network intrusion blocking security overlay
US8176404B2 (en) * 2009-09-09 2012-05-08 Lsi Corporation Systems and methods for stepped data retry in a storage system
US8874808B2 (en) * 2010-09-07 2014-10-28 International Business Machines Corporation Hierarchical buffer system enabling precise data delivery through an asynchronous boundary
US8635390B2 (en) * 2010-09-07 2014-01-21 International Business Machines Corporation System and method for a hierarchical buffer system for a shared data bus
KR102549584B1 (ko) * 2018-03-27 2023-06-30 삼성전자주식회사 메모리 모듈을 포함하는 메모리 시스템, 메모리 모듈, 그리고 메모리 모듈의 동작 방법
US10990463B2 (en) 2018-03-27 2021-04-27 Samsung Electronics Co., Ltd. Semiconductor memory module and memory system including the same
US10996891B2 (en) 2019-02-28 2021-05-04 International Business Machines Corporation Token management for write commands transmitted by a host over a plurality of interfaces to a storage controller
US11010248B2 (en) * 2019-02-28 2021-05-18 International Business Machines Corporation Reuse of resources in a storage controller for executing write commands over a plurality of interfaces

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3992699A (en) * 1974-11-13 1976-11-16 Communication Mfg. Co. First-in/first-out data storage system
US3992669A (en) * 1975-08-29 1976-11-16 Gte Automatic Electric Laboratories Incorporated Radio frequency protection circuit
US5717872A (en) * 1996-01-11 1998-02-10 Unisys Corporation Flexible, soft, random-like counter system for bus protocol waiting periods
US6021483A (en) * 1997-03-17 2000-02-01 International Business Machines Corporation PCI-to-PCI bridges with a timer register for storing a delayed transaction latency
JPH10293744A (ja) * 1997-04-18 1998-11-04 Nec Corp Ｐｃｉバス・システム
US5884052A (en) * 1997-07-14 1999-03-16 Vlsi Technology, Inc. Smart retry mechanism to program the retry latency of a PCI initiator agent
US6081859A (en) * 1998-03-12 2000-06-27 Vlsi Technology, Inc. Address dependent retry system to program the retry latency of an initiator PCI agent
US6289406B1 (en) * 1998-11-06 2001-09-11 Vlsi Technology, Inc. Optimizing the performance of asynchronous bus bridges with dynamic transactions
US6633936B1 (en) * 2000-09-26 2003-10-14 Broadcom Corporation Adaptive retry mechanism

Also Published As

Publication number Publication date
DE60115795T2 (de) 2006-07-20
US6851004B2 (en) 2005-02-01
EP1191454B1 (de) 2005-12-14
EP1191454A3 (de) 2003-11-26
US6633936B1 (en) 2003-10-14
EP1191454A2 (de) 2002-03-27
US20040024945A1 (en) 2004-02-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: BOSCH JEHLE PATENTANWALTSGESELLSCHAFT MBH, 80639 M