DE60112632T2 - Phasenverriegelungsschleife - Google Patents

Phasenverriegelungsschleife Download PDF

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Publication number
DE60112632T2
DE60112632T2 DE60112632T DE60112632T DE60112632T2 DE 60112632 T2 DE60112632 T2 DE 60112632T2 DE 60112632 T DE60112632 T DE 60112632T DE 60112632 T DE60112632 T DE 60112632T DE 60112632 T2 DE60112632 T2 DE 60112632T2
Authority
DE
Germany
Prior art keywords
phase
locked loop
locked
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60112632T
Other languages
English (en)
Other versions
DE60112632D1 (de
Inventor
David Canard
Vincent Fillatre
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE60112632D1 publication Critical patent/DE60112632D1/de
Application granted granted Critical
Publication of DE60112632T2 publication Critical patent/DE60112632T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0893Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
DE60112632T 2000-03-10 2001-03-05 Phasenverriegelungsschleife Expired - Lifetime DE60112632T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0003134 2000-03-10

Publications (2)

Publication Number Publication Date
DE60112632D1 DE60112632D1 (de) 2005-09-22
DE60112632T2 true DE60112632T2 (de) 2006-06-14

Family

ID=8847980

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60112632T Expired - Lifetime DE60112632T2 (de) 2000-03-10 2001-03-05 Phasenverriegelungsschleife

Country Status (5)

Country Link
US (1) US6407643B2 (de)
EP (1) EP1133060B1 (de)
JP (1) JP2001285060A (de)
KR (1) KR100806506B1 (de)
DE (1) DE60112632T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7171183B2 (en) * 2002-06-12 2007-01-30 Broadcom Corporation Linearized fractional-N synthesizer having a current offset charge pump
DE60208771D1 (de) 2002-11-21 2006-04-06 St Microelectronics Belgium Nv Niederfrequente Selbstkalibrierung einer einen mehrphasigen Takt erzeugenden Phasenregelschleife
EP1434352B1 (de) 2002-12-23 2008-08-27 STMicroelectronics Belgium N.V. Frequenzsynthesizer mit gebrochenem Teilverhältnis und kompensierter Verzögerung
US7082295B2 (en) * 2003-04-03 2006-07-25 Broadcom Corporation On-chip loop filter for use in a phase locked loop and other applications
US7268600B2 (en) * 2005-11-30 2007-09-11 International Business Machines Corporation Phase- or frequency-locked loop circuit having a glitch detector for detecting triggering-edge-type glitches in a noisy signal
KR100727307B1 (ko) 2006-03-14 2007-06-12 엘지전자 주식회사 위상 고정 루프
KR20150061387A (ko) 2013-11-27 2015-06-04 삼성전기주식회사 주파수 합성 장치 및 주파수 합성 방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4242649A (en) * 1979-07-13 1980-12-30 Harris Corporation Method and apparatus for modulating a phase locked loop
GB2068185B (en) * 1980-01-21 1983-06-22 Philips Electronic Associated Frequency synthesiser of the phase lock loop type
GB2097206B (en) * 1981-04-21 1985-03-13 Marconi Co Ltd Frequency synthesisers
GB2150775A (en) * 1983-12-02 1985-07-03 Plessey Co Plc Frequency synthesiser
GB2173659B (en) * 1985-02-06 1988-06-08 Plessey Co Plc Frequency synthesisers
DE68915228T2 (de) * 1988-09-02 1994-12-15 Sanyo Electric Co Phasensynchronisierschaltung in einem Videosignalempfänger und Verfahren zur Herstellung der Phasensynchronisation.
US5144260A (en) * 1991-09-25 1992-09-01 Rose Communications, Inc. Method and apparatus for perturbation cancellation of a phase locked oscillator
KR100300347B1 (ko) * 1993-11-27 2001-10-22 윤종용 디지탈변복조기에있어서디지탈주파수에러검출/보정회로
JPH08251026A (ja) * 1995-03-14 1996-09-27 Sony Corp 集積回路および送受信機
FR2751809A1 (fr) 1996-07-24 1998-01-30 Philips Electronics Nv Dispositif de selection de frequence muni d'un detecteur de verrouillage
JP3839117B2 (ja) * 1997-01-30 2006-11-01 株式会社ルネサステクノロジ Pll回路およびそれを用いた無線通信端末機器

Also Published As

Publication number Publication date
KR20010089227A (ko) 2001-09-29
EP1133060B1 (de) 2005-08-17
US20010033201A1 (en) 2001-10-25
EP1133060A1 (de) 2001-09-12
KR100806506B1 (ko) 2008-02-21
JP2001285060A (ja) 2001-10-12
US6407643B2 (en) 2002-06-18
DE60112632D1 (de) 2005-09-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL

R082 Change of representative

Ref document number: 1133060

Country of ref document: EP

Representative=s name: MUELLER-BORE & PARTNER PATENTANWAELTE, EUROPEA, DE