DE3752114D1 - Verfahren zur Herstellung einer komplementären MOS integrierten Schaltungsanordnung - Google Patents
Verfahren zur Herstellung einer komplementären MOS integrierten SchaltungsanordnungInfo
- Publication number
- DE3752114D1 DE3752114D1 DE3752114T DE3752114T DE3752114D1 DE 3752114 D1 DE3752114 D1 DE 3752114D1 DE 3752114 T DE3752114 T DE 3752114T DE 3752114 T DE3752114 T DE 3752114T DE 3752114 D1 DE3752114 D1 DE 3752114D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- integrated circuit
- circuit arrangement
- complementary mos
- mos integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000000295 complement effect Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02543—Phosphides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
- H01L21/02645—Seed materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61246811A JP2516604B2 (ja) | 1986-10-17 | 1986-10-17 | 相補性mos集積回路装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3752114D1 true DE3752114D1 (de) | 1997-10-16 |
DE3752114T2 DE3752114T2 (de) | 1998-01-22 |
Family
ID=17154037
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3752114T Expired - Fee Related DE3752114T2 (de) | 1986-10-17 | 1987-10-15 | Verfahren zur Herstellung einer komplementären MOS integrierten Schaltungsanordnung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5028976A (de) |
EP (1) | EP0264283B1 (de) |
JP (1) | JP2516604B2 (de) |
DE (1) | DE3752114T2 (de) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5155058A (en) * | 1986-11-07 | 1992-10-13 | Canon Kabushiki Kaisha | Method of making semiconductor memory device |
US5196912A (en) * | 1988-10-28 | 1993-03-23 | Casio Computer Co., Ltd. | Thin film transistor having memory function and method for using thin film transistor as memory element |
US5182619A (en) * | 1991-09-03 | 1993-01-26 | Motorola, Inc. | Semiconductor device having an MOS transistor with overlapped and elevated source and drain |
JP3058954B2 (ja) * | 1991-09-24 | 2000-07-04 | ローム株式会社 | 絶縁層の上に成長層を有する半導体装置の製造方法 |
EP0585059B1 (de) * | 1992-08-21 | 1999-05-12 | STMicroelectronics, Inc. | Verfahren zur Herstellung einer Halbleiter-Speicherstruktur vom vertikalen Typ und nach dem Verfahren hergestellte Struktur |
JPH07176688A (ja) * | 1993-12-20 | 1995-07-14 | Mitsubishi Electric Corp | 半導体集積回路 |
US5838176A (en) * | 1996-07-11 | 1998-11-17 | Foveonics, Inc. | Correlated double sampling circuit |
JP4103968B2 (ja) * | 1996-09-18 | 2008-06-18 | 株式会社半導体エネルギー研究所 | 絶縁ゲイト型半導体装置 |
US5923067A (en) * | 1997-04-04 | 1999-07-13 | International Business Machines Corporation | 3-D CMOS-on-SOI ESD structure and method |
KR100305402B1 (ko) * | 1998-12-30 | 2001-11-02 | 박종섭 | 반도체소자의 제조방법 |
US6693033B2 (en) | 2000-02-10 | 2004-02-17 | Motorola, Inc. | Method of removing an amorphous oxide from a monocrystalline surface |
US6392257B1 (en) | 2000-02-10 | 2002-05-21 | Motorola Inc. | Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same |
KR20030011083A (ko) | 2000-05-31 | 2003-02-06 | 모토로라 인코포레이티드 | 반도체 디바이스 및 이를 제조하기 위한 방법 |
AU2001264987A1 (en) * | 2000-06-30 | 2002-01-14 | Motorola, Inc., A Corporation Of The State Of Delware | Hybrid semiconductor structure and device |
US6555946B1 (en) | 2000-07-24 | 2003-04-29 | Motorola, Inc. | Acoustic wave device and process for forming the same |
AU2001277001A1 (en) | 2000-07-24 | 2002-02-05 | Motorola, Inc. | Heterojunction tunneling diodes and process for fabricating same |
DE10057665A1 (de) * | 2000-11-21 | 2002-06-06 | Siemens Ag | Integrierte Schaltung und Herstellungsverfahren dazu |
US6638838B1 (en) | 2000-10-02 | 2003-10-28 | Motorola, Inc. | Semiconductor structure including a partially annealed layer and method of forming the same |
US20020096683A1 (en) | 2001-01-19 | 2002-07-25 | Motorola, Inc. | Structure and method for fabricating GaN devices utilizing the formation of a compliant substrate |
US6673646B2 (en) | 2001-02-28 | 2004-01-06 | Motorola, Inc. | Growth of compound semiconductor structures on patterned oxide films and process for fabricating same |
WO2002082551A1 (en) | 2001-04-02 | 2002-10-17 | Motorola, Inc. | A semiconductor structure exhibiting reduced leakage current |
JP4310076B2 (ja) * | 2001-05-31 | 2009-08-05 | キヤノン株式会社 | 結晶性薄膜の製造方法 |
US6709989B2 (en) | 2001-06-21 | 2004-03-23 | Motorola, Inc. | Method for fabricating a semiconductor structure including a metal oxide interface with silicon |
US6992321B2 (en) | 2001-07-13 | 2006-01-31 | Motorola, Inc. | Structure and method for fabricating semiconductor structures and devices utilizing piezoelectric materials |
US6646293B2 (en) | 2001-07-18 | 2003-11-11 | Motorola, Inc. | Structure for fabricating high electron mobility transistors utilizing the formation of complaint substrates |
US7019332B2 (en) | 2001-07-20 | 2006-03-28 | Freescale Semiconductor, Inc. | Fabrication of a wavelength locker within a semiconductor structure |
US6693298B2 (en) | 2001-07-20 | 2004-02-17 | Motorola, Inc. | Structure and method for fabricating epitaxial semiconductor on insulator (SOI) structures and devices utilizing the formation of a compliant substrate for materials used to form same |
US6855992B2 (en) | 2001-07-24 | 2005-02-15 | Motorola Inc. | Structure and method for fabricating configurable transistor devices utilizing the formation of a compliant substrate for materials used to form the same |
US6667196B2 (en) | 2001-07-25 | 2003-12-23 | Motorola, Inc. | Method for real-time monitoring and controlling perovskite oxide film growth and semiconductor structure formed using the method |
US6639249B2 (en) | 2001-08-06 | 2003-10-28 | Motorola, Inc. | Structure and method for fabrication for a solid-state lighting device |
US6589856B2 (en) | 2001-08-06 | 2003-07-08 | Motorola, Inc. | Method and apparatus for controlling anti-phase domains in semiconductor structures and devices |
US20030034491A1 (en) | 2001-08-14 | 2003-02-20 | Motorola, Inc. | Structure and method for fabricating semiconductor structures and devices for detecting an object |
US6673667B2 (en) | 2001-08-15 | 2004-01-06 | Motorola, Inc. | Method for manufacturing a substantially integral monolithic apparatus including a plurality of semiconductor materials |
US20030071327A1 (en) | 2001-10-17 | 2003-04-17 | Motorola, Inc. | Method and apparatus utilizing monocrystalline insulator |
JP4275336B2 (ja) * | 2001-11-16 | 2009-06-10 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
US6916717B2 (en) | 2002-05-03 | 2005-07-12 | Motorola, Inc. | Method for growing a monocrystalline oxide layer and for fabricating a semiconductor device on a monocrystalline substrate |
US7169619B2 (en) | 2002-11-19 | 2007-01-30 | Freescale Semiconductor, Inc. | Method for fabricating semiconductor structures on vicinal substrates using a low temperature, low pressure, alkaline earth metal-rich process |
US6885065B2 (en) | 2002-11-20 | 2005-04-26 | Freescale Semiconductor, Inc. | Ferromagnetic semiconductor structure and method for forming the same |
US7020374B2 (en) | 2003-02-03 | 2006-03-28 | Freescale Semiconductor, Inc. | Optical waveguide structure and method for fabricating the same |
US6965128B2 (en) | 2003-02-03 | 2005-11-15 | Freescale Semiconductor, Inc. | Structure and method for fabricating semiconductor microresonator devices |
JP2009076879A (ja) | 2007-08-24 | 2009-04-09 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
US8232598B2 (en) * | 2007-09-20 | 2012-07-31 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
US8044464B2 (en) * | 2007-09-21 | 2011-10-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US7982250B2 (en) * | 2007-09-21 | 2011-07-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP4544288B2 (ja) | 2007-10-19 | 2010-09-15 | セイコーエプソン株式会社 | 半導体装置及び電子機器 |
JP5960000B2 (ja) * | 2012-09-05 | 2016-08-02 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
EP2884542A3 (de) * | 2013-12-10 | 2015-09-02 | IMEC vzw | Integrierte Schaltungsvorrichtung mit Stromtakt-Netzschalter im Back-End einer Leitung |
Family Cites Families (19)
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US3620833A (en) * | 1966-12-23 | 1971-11-16 | Texas Instruments Inc | Integrated circuit fabrication |
JPS5876101A (ja) * | 1981-10-31 | 1983-05-09 | Mitsubishi Electric Corp | 有機溶媒精製装置 |
JPS58164219A (ja) * | 1982-03-25 | 1983-09-29 | Agency Of Ind Science & Technol | 積層型半導体装置の製造方法 |
US4593453A (en) * | 1982-06-01 | 1986-06-10 | Rockwell International Corporation | Two-level transistor structures and method utilizing minimal area therefor |
JPS5918196A (ja) * | 1982-07-21 | 1984-01-30 | Hitachi Ltd | 単結晶薄膜の製造方法 |
US4476475A (en) * | 1982-11-19 | 1984-10-09 | Northern Telecom Limited | Stacked MOS transistor |
JPS6021553A (ja) * | 1983-07-15 | 1985-02-02 | Hitachi Ltd | 三次元集積回路 |
US4603341A (en) * | 1983-09-08 | 1986-07-29 | International Business Machines Corporation | Stacked double dense read only memory |
CA1197628A (en) * | 1984-01-05 | 1985-12-03 | Thomas W. Macelwee | Fabrication of stacked mos devices |
US4686758A (en) * | 1984-06-27 | 1987-08-18 | Honeywell Inc. | Three-dimensional CMOS using selective epitaxial growth |
JP2505754B2 (ja) * | 1986-07-11 | 1996-06-12 | キヤノン株式会社 | 光電変換装置の製造方法 |
US4679299A (en) * | 1986-08-11 | 1987-07-14 | Ncr Corporation | Formation of self-aligned stacked CMOS structures by lift-off |
JPH0828470B2 (ja) * | 1986-11-07 | 1996-03-21 | キヤノン株式会社 | 半導体メモリ装置 |
JPS63239928A (ja) * | 1987-03-27 | 1988-10-05 | Canon Inc | 集積回路 |
JPS63239932A (ja) * | 1987-03-27 | 1988-10-05 | Canon Inc | 結晶の形成方法 |
JPS63239935A (ja) * | 1987-03-27 | 1988-10-05 | Canon Inc | シリコン選択成長法 |
JPS63281335A (ja) * | 1987-05-13 | 1988-11-17 | Hitachi Ltd | Zピンチ用放電管 |
JP2550994B2 (ja) * | 1987-05-14 | 1996-11-06 | 株式会社ニコン | 位置合せ方法 |
US4866291A (en) * | 1987-06-30 | 1989-09-12 | Canon Kabushiki Kaisha | Photosensor with charge storage unit and switch unit formed on a single-crystal semiconductor film |
-
1986
- 1986-10-17 JP JP61246811A patent/JP2516604B2/ja not_active Expired - Fee Related
-
1987
- 1987-10-15 DE DE3752114T patent/DE3752114T2/de not_active Expired - Fee Related
- 1987-10-15 EP EP87309125A patent/EP0264283B1/de not_active Expired - Lifetime
-
1990
- 1990-05-29 US US07/529,706 patent/US5028976A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE3752114T2 (de) | 1998-01-22 |
EP0264283A2 (de) | 1988-04-20 |
JPS63265463A (ja) | 1988-11-01 |
EP0264283A3 (de) | 1988-09-28 |
JP2516604B2 (ja) | 1996-07-24 |
US5028976A (en) | 1991-07-02 |
EP0264283B1 (de) | 1997-09-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |