DE3588011D1 - Halbleiteranordnung mit epitaxialem Material. - Google Patents
Halbleiteranordnung mit epitaxialem Material.Info
- Publication number
- DE3588011D1 DE3588011D1 DE3588011T DE3588011T DE3588011D1 DE 3588011 D1 DE3588011 D1 DE 3588011D1 DE 3588011 T DE3588011 T DE 3588011T DE 3588011 T DE3588011 T DE 3588011T DE 3588011 D1 DE3588011 D1 DE 3588011D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- epitaxial material
- epitaxial
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000463 material Substances 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/15—Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
- H01L29/151—Compositional structures
- H01L29/152—Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
- H01L29/155—Comprising only semiconductor materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/15—Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
- H01L29/157—Doping structures, e.g. doping superlattices, nipi superlattices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
- H01L29/365—Planar doping, e.g. atomic-plane doping, delta-doping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/7725—Field effect transistors with delta-doped channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/864—Transit-time diodes, e.g. IMPATT, TRAPATT diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035236—Superlattices; Multiple quantum well structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/305—Structure or shape of the active region; Materials used for the active region characterised by the doping materials used in the laser structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/305—Structure or shape of the active region; Materials used for the active region characterised by the doping materials used in the laser structure
- H01S5/3054—Structure or shape of the active region; Materials used for the active region characterised by the doping materials used in the laser structure p-doping
- H01S5/3059—Structure or shape of the active region; Materials used for the active region characterised by the doping materials used in the laser structure p-doping in II-VI materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/3408—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers characterised by specially shaped wells, e.g. triangular
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Life Sciences & Earth Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Biophysics (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
- Semiconductor Lasers (AREA)
- Led Devices (AREA)
- Light Receiving Elements (AREA)
- Bipolar Transistors (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP84113987 | 1984-11-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3588011D1 true DE3588011D1 (de) | 1995-05-24 |
DE3588011T2 DE3588011T2 (de) | 1995-08-31 |
Family
ID=8192290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3588011T Expired - Fee Related DE3588011T2 (de) | 1984-11-19 | 1985-11-15 | Halbleiteranordnung mit epitaxialem Material. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4882609A (de) |
EP (1) | EP0183146B1 (de) |
JP (1) | JP2512422B2 (de) |
DE (1) | DE3588011T2 (de) |
Families Citing this family (106)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5060234A (en) * | 1984-11-19 | 1991-10-22 | Max-Planck Gesellschaft Zur Forderung Der Wissenschaften | Injection laser with at least one pair of monoatomic layers of doping atoms |
US5216260A (en) * | 1984-11-19 | 1993-06-01 | Max-Planck Gesellschaft Zur Foerderung Der Wissenschaften E.V. | Optically bistable semiconductor device with pairs of monoatomic layers separated by intrinsic layers |
JPS61216316A (ja) * | 1985-02-22 | 1986-09-26 | Fujitsu Ltd | 半導体装置の製造方法 |
JPS61198784A (ja) * | 1985-02-28 | 1986-09-03 | Fujitsu Ltd | 電界効果型半導体装置 |
AU590327B2 (en) * | 1985-09-09 | 1989-11-02 | Sumitomo Electric Industries, Ltd. | Method of growth of thin film layer for use in a composite semiconductor |
JPH0738460B2 (ja) * | 1985-12-27 | 1995-04-26 | オムロン株式会社 | 半導体発光素子 |
US4780748A (en) * | 1986-06-06 | 1988-10-25 | American Telephone & Telegraph Company, At&T Bell Laboratories | Field-effect transistor having a delta-doped ohmic contact |
US4772934A (en) * | 1986-06-06 | 1988-09-20 | American Telephone And Telegraph Company, At&T Bell Laboratories | Delta-doped ohmic metal to semiconductor contacts |
EP0314836A1 (de) * | 1987-11-06 | 1989-05-10 | Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. | Halbleiteranordnung, insbesondere Heiss-Elektronen-Transistor |
FR2618221B1 (fr) * | 1987-07-17 | 1991-07-19 | Thomson Csf | Detecteur d'onde electromagnetique et analyseur d'image comportant un tel detecteur. |
FR2620268A1 (fr) * | 1987-09-03 | 1989-03-10 | Centre Nat Rech Scient | Procede de dopage d'une couche semi-conductrice et transistor obtenu par ce procede |
US4825265A (en) * | 1987-09-04 | 1989-04-25 | American Telephone And Telegraph Company At&T Bell Laboratories | Transistor |
JP2586053B2 (ja) * | 1987-09-25 | 1997-02-26 | 日本電気株式会社 | 電界効果トランジスタ |
EP0312237A3 (de) * | 1987-10-13 | 1989-10-25 | AT&T Corp. | Anreicherung der Grenzschichtladung in einer delta-dotierten Heterostruktur |
US5497015A (en) * | 1988-11-12 | 1996-03-05 | Sony Corporation | Quantum interference transistor |
US5013685A (en) * | 1989-11-02 | 1991-05-07 | At&T Bell Laboratories | Method of making a non-alloyed ohmic contact to III-V semiconductors-on-silicon |
US5081511A (en) * | 1990-09-06 | 1992-01-14 | Motorola, Inc. | Heterojunction field effect transistor with monolayers in channel region |
US5206527A (en) * | 1990-11-09 | 1993-04-27 | Sumitomo Electric Industries, Ltd. | Field effect transistor |
JP2549206B2 (ja) * | 1990-12-27 | 1996-10-30 | 住友電気工業株式会社 | 電界効果トランジスタ |
US5151758A (en) * | 1991-02-20 | 1992-09-29 | Comsat | Planar-doped valley field effect transistor (PDVFET) |
US5219772A (en) * | 1991-08-15 | 1993-06-15 | At&T Bell Laboratories | Method for making field effect devices with ultra-short gates |
KR940006711B1 (ko) * | 1991-09-12 | 1994-07-25 | 포항종합제철 주식회사 | 델타도핑 양자 우물전계 효과 트랜지스터의 제조방법 |
JPH05291307A (ja) * | 1991-12-05 | 1993-11-05 | Samsung Electron Co Ltd | 化合物半導体装置及びその製造方法 |
JPH0817231B2 (ja) * | 1992-01-29 | 1996-02-21 | 東京工業大学長 | 組織ドープ構造半導体装置 |
FR2691839B1 (fr) * | 1992-05-27 | 1994-08-05 | Schlumberger Ind Sa | Capteur a effet hall. |
US5376810A (en) * | 1992-06-26 | 1994-12-27 | California Institute Of Technology | Growth of delta-doped layers on silicon CCD/S for enhanced ultraviolet response |
JPH06104289A (ja) * | 1992-09-18 | 1994-04-15 | Hitachi Ltd | 半導体装置およびそれを用いた増幅回路 |
DE4235265A1 (de) * | 1992-10-20 | 1994-04-21 | Daimler Benz Ag | Si/SiGe Baritt-Diode |
KR960004594B1 (ko) * | 1993-03-17 | 1996-04-09 | 엘지전자주식회사 | 적외선 광 검출기 |
US5432119A (en) * | 1994-01-31 | 1995-07-11 | Hughes Aircraft Company | High yield electron-beam gate fabrication method for sub-micron gate FETS |
US5569943A (en) * | 1995-09-01 | 1996-10-29 | The United States Of America As Represented By The Secretary Of The Army | Field effect real space transistor |
GB2308732A (en) * | 1995-12-29 | 1997-07-02 | Sharp Kk | A semiconductor laser device |
EP0841704A1 (de) * | 1996-11-07 | 1998-05-13 | Paul-Drude-Institut für Festkörperelektronik | Transistorhalbleiterbauelement und Verfahren zu dessen Herstellung |
JP3458349B2 (ja) * | 1996-11-19 | 2003-10-20 | 株式会社デンソー | 半導体装置 |
US6258616B1 (en) * | 1998-05-22 | 2001-07-10 | Lucent Technologies Inc. | Method of making a semiconductor device having a non-alloyed ohmic contact to a buried doped layer |
US6993222B2 (en) * | 1999-03-05 | 2006-01-31 | Rj Mears, Llc | Optical filter device with aperiodically arranged grating elements |
GB2385980B (en) | 1999-03-05 | 2003-10-29 | Nanovis Llc | Raman amplifier with aperiodic grating |
JP3527496B2 (ja) * | 2000-03-03 | 2004-05-17 | 松下電器産業株式会社 | 半導体装置 |
EP1286398B1 (de) * | 2000-05-31 | 2006-10-04 | Matsushita Electric Industrial Co., Ltd. | Misfet |
US6674131B2 (en) * | 2000-06-27 | 2004-01-06 | Matsushita Electric Industrial Co., Ltd. | Semiconductor power device for high-temperature applications |
TWI288435B (en) | 2000-11-21 | 2007-10-11 | Matsushita Electric Ind Co Ltd | Semiconductor device and equipment for communication system |
ATE453661T1 (de) * | 2001-09-27 | 2010-01-15 | Merck & Co Inc | Isolierte dna-moleküle, die für einen humanisierten calcitonin gene-related peptide receptor kodieren, damit verwandte, nichthumane transgene tiere und assayverfahren |
JP4463482B2 (ja) * | 2002-07-11 | 2010-05-19 | パナソニック株式会社 | Misfet及びその製造方法 |
WO2004053929A2 (en) | 2002-08-13 | 2004-06-24 | Massachusetts Institute Of Technology | Semiconductor nanocrystal heterostructures |
US7531828B2 (en) * | 2003-06-26 | 2009-05-12 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions |
US20060231857A1 (en) * | 2003-06-26 | 2006-10-19 | Rj Mears, Llc | Method for making a semiconductor device including a memory cell with a negative differential resistance (ndr) device |
US20040262594A1 (en) * | 2003-06-26 | 2004-12-30 | Rj Mears, Llc | Semiconductor structures having improved conductivity effective mass and methods for fabricating same |
US20050279991A1 (en) * | 2003-06-26 | 2005-12-22 | Rj Mears, Llc | Semiconductor device including a superlattice having at least one group of substantially undoped layers |
US20070063185A1 (en) * | 2003-06-26 | 2007-03-22 | Rj Mears, Llc | Semiconductor device including a front side strained superlattice layer and a back side stress layer |
US7612366B2 (en) * | 2003-06-26 | 2009-11-03 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice layer above a stress layer |
US20050282330A1 (en) * | 2003-06-26 | 2005-12-22 | Rj Mears, Llc | Method for making a semiconductor device including a superlattice having at least one group of substantially undoped layers |
US20060267130A1 (en) * | 2003-06-26 | 2006-11-30 | Rj Mears, Llc | Semiconductor Device Including Shallow Trench Isolation (STI) Regions with a Superlattice Therebetween |
US20070063186A1 (en) * | 2003-06-26 | 2007-03-22 | Rj Mears, Llc | Method for making a semiconductor device including a front side strained superlattice layer and a back side stress layer |
US7033437B2 (en) * | 2003-06-26 | 2006-04-25 | Rj Mears, Llc | Method for making semiconductor device including band-engineered superlattice |
US7045377B2 (en) * | 2003-06-26 | 2006-05-16 | Rj Mears, Llc | Method for making a semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction |
US20060273299A1 (en) * | 2003-06-26 | 2006-12-07 | Rj Mears, Llc | Method for making a semiconductor device including a dopant blocking superlattice |
US20060011905A1 (en) * | 2003-06-26 | 2006-01-19 | Rj Mears, Llc | Semiconductor device comprising a superlattice dielectric interface layer |
US7202494B2 (en) * | 2003-06-26 | 2007-04-10 | Rj Mears, Llc | FINFET including a superlattice |
US7531829B2 (en) * | 2003-06-26 | 2009-05-12 | Mears Technologies, Inc. | Semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance |
US20070010040A1 (en) * | 2003-06-26 | 2007-01-11 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Strained Superlattice Layer Above a Stress Layer |
US20070015344A1 (en) * | 2003-06-26 | 2007-01-18 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Strained Superlattice Between at Least One Pair of Spaced Apart Stress Regions |
JP2007521648A (ja) * | 2003-06-26 | 2007-08-02 | アール.ジェイ. メアーズ エルエルシー | バンド設計超格子を有するmosfetを有する半導体装置 |
US7586116B2 (en) * | 2003-06-26 | 2009-09-08 | Mears Technologies, Inc. | Semiconductor device having a semiconductor-on-insulator configuration and a superlattice |
US7227174B2 (en) * | 2003-06-26 | 2007-06-05 | Rj Mears, Llc | Semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction |
US7514328B2 (en) * | 2003-06-26 | 2009-04-07 | Mears Technologies, Inc. | Method for making a semiconductor device including shallow trench isolation (STI) regions with a superlattice therebetween |
US20060289049A1 (en) * | 2003-06-26 | 2006-12-28 | Rj Mears, Llc | Semiconductor Device Having a Semiconductor-on-Insulator (SOI) Configuration and Including a Superlattice on a Thin Semiconductor Layer |
US20060243964A1 (en) * | 2003-06-26 | 2006-11-02 | Rj Mears, Llc | Method for making a semiconductor device having a semiconductor-on-insulator configuration and a superlattice |
US7659539B2 (en) | 2003-06-26 | 2010-02-09 | Mears Technologies, Inc. | Semiconductor device including a floating gate memory cell with a superlattice channel |
US6830964B1 (en) * | 2003-06-26 | 2004-12-14 | Rj Mears, Llc | Method for making semiconductor device including band-engineered superlattice |
US7598515B2 (en) * | 2003-06-26 | 2009-10-06 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice and overlying stress layer and related methods |
US7045813B2 (en) * | 2003-06-26 | 2006-05-16 | Rj Mears, Llc | Semiconductor device including a superlattice with regions defining a semiconductor junction |
US7446002B2 (en) * | 2003-06-26 | 2008-11-04 | Mears Technologies, Inc. | Method for making a semiconductor device comprising a superlattice dielectric interface layer |
US20040266116A1 (en) * | 2003-06-26 | 2004-12-30 | Rj Mears, Llc | Methods of fabricating semiconductor structures having improved conductivity effective mass |
US20070020860A1 (en) * | 2003-06-26 | 2007-01-25 | Rj Mears, Llc | Method for Making Semiconductor Device Including a Strained Superlattice and Overlying Stress Layer and Related Methods |
US7153763B2 (en) | 2003-06-26 | 2006-12-26 | Rj Mears, Llc | Method for making a semiconductor device including band-engineered superlattice using intermediate annealing |
US20060292765A1 (en) * | 2003-06-26 | 2006-12-28 | Rj Mears, Llc | Method for Making a FINFET Including a Superlattice |
US7535041B2 (en) * | 2003-06-26 | 2009-05-19 | Mears Technologies, Inc. | Method for making a semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance |
US20070020833A1 (en) * | 2003-06-26 | 2007-01-25 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer |
US7491587B2 (en) * | 2003-06-26 | 2009-02-17 | Mears Technologies, Inc. | Method for making a semiconductor device having a semiconductor-on-insulator (SOI) configuration and including a superlattice on a thin semiconductor layer |
US7229902B2 (en) * | 2003-06-26 | 2007-06-12 | Rj Mears, Llc | Method for making a semiconductor device including a superlattice with regions defining a semiconductor junction |
US20060220118A1 (en) * | 2003-06-26 | 2006-10-05 | Rj Mears, Llc | Semiconductor device including a dopant blocking superlattice |
US7586165B2 (en) * | 2003-06-26 | 2009-09-08 | Mears Technologies, Inc. | Microelectromechanical systems (MEMS) device including a superlattice |
US7531850B2 (en) * | 2003-06-26 | 2009-05-12 | Mears Technologies, Inc. | Semiconductor device including a memory cell with a negative differential resistance (NDR) device |
TWI334646B (en) * | 2005-12-22 | 2010-12-11 | Mears Technologies Inc | Electronic device including a selectively polable superlattice |
US7517702B2 (en) * | 2005-12-22 | 2009-04-14 | Mears Technologies, Inc. | Method for making an electronic device including a poled superlattice having a net electrical dipole moment |
US7394094B2 (en) * | 2005-12-29 | 2008-07-01 | Massachusetts Institute Of Technology | Semiconductor nanocrystal heterostructures |
US7700447B2 (en) * | 2006-02-21 | 2010-04-20 | Mears Technologies, Inc. | Method for making a semiconductor device comprising a lattice matching layer |
US7989843B2 (en) | 2006-08-25 | 2011-08-02 | National Institute For Materials Science | Semiconductor and method for producing the same |
US7483212B2 (en) * | 2006-10-11 | 2009-01-27 | Rensselaer Polytechnic Institute | Optical thin film, semiconductor light emitting device having the same and methods of fabricating the same |
US7781827B2 (en) | 2007-01-24 | 2010-08-24 | Mears Technologies, Inc. | Semiconductor device with a vertical MOSFET including a superlattice and related methods |
US7928425B2 (en) * | 2007-01-25 | 2011-04-19 | Mears Technologies, Inc. | Semiconductor device including a metal-to-semiconductor superlattice interface layer and related methods |
US7880161B2 (en) * | 2007-02-16 | 2011-02-01 | Mears Technologies, Inc. | Multiple-wavelength opto-electronic device including a superlattice |
US7863066B2 (en) * | 2007-02-16 | 2011-01-04 | Mears Technologies, Inc. | Method for making a multiple-wavelength opto-electronic device including a superlattice |
US7812339B2 (en) * | 2007-04-23 | 2010-10-12 | Mears Technologies, Inc. | Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures |
KR101018088B1 (ko) * | 2008-11-07 | 2011-02-25 | 삼성엘이디 주식회사 | 질화물 반도체 소자 |
WO2014205353A2 (en) * | 2013-06-20 | 2014-12-24 | Stratio, Inc. | Gate-controlled charge modulated device for cmos image sensors |
US9166035B2 (en) * | 2013-09-12 | 2015-10-20 | Taiwan Semiconductor Manufacturing Company Limited | Delta doping layer in MOSFET source/drain region |
WO2015077595A1 (en) | 2013-11-22 | 2015-05-28 | Mears Technologies, Inc. | Vertical semiconductor devices including superlattice punch through stop layer and related methods |
CN105900241B (zh) | 2013-11-22 | 2020-07-24 | 阿托梅拉公司 | 包括超晶格耗尽层堆叠的半导体装置和相关方法 |
WO2015191561A1 (en) | 2014-06-09 | 2015-12-17 | Mears Technologies, Inc. | Semiconductor devices with enhanced deterministic doping and related methods |
US9722046B2 (en) | 2014-11-25 | 2017-08-01 | Atomera Incorporated | Semiconductor device including a superlattice and replacement metal gate structure and related methods |
WO2016187038A1 (en) | 2015-05-15 | 2016-11-24 | Atomera Incorporated | Semiconductor devices with superlattice and punch-through stop (pts) layers at different depths and related methods |
US9721790B2 (en) | 2015-06-02 | 2017-08-01 | Atomera Incorporated | Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity control |
US9558939B1 (en) | 2016-01-15 | 2017-01-31 | Atomera Incorporated | Methods for making a semiconductor device including atomic layer structures using N2O as an oxygen source |
US9927461B2 (en) * | 2016-03-09 | 2018-03-27 | Mark J. Hagmann | Apparatus and algorithm for carrier profiling in scanning frequency comb microscopy |
CN112670356B (zh) * | 2020-12-24 | 2023-05-12 | 湖南科莱特光电有限公司 | 单分子层内δ掺杂的半导体材料及其制备方法和探测器 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2261527C2 (de) * | 1972-12-15 | 1983-04-21 | Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V., 3400 Göttingen | Halbleiterkörper mit in einer vorgegebenen Richtung abwechselnd aufeinanderfolgenden n- und p-dotierten Zonen, Verfahren zu seiner Herstellung und Verwendungen des Halbleiterkörpers |
US4205329A (en) * | 1976-03-29 | 1980-05-27 | Bell Telephone Laboratories, Incorporated | Periodic monolayer semiconductor structures grown by molecular beam epitaxy |
US4163237A (en) * | 1978-04-24 | 1979-07-31 | Bell Telephone Laboratories, Incorporated | High mobility multilayered heterojunction devices employing modulated doping |
US4410902A (en) * | 1981-03-23 | 1983-10-18 | The United States Of America As Represented By The Secretary Of The Army | Planar doped barrier semiconductor device |
JPS59124769A (ja) * | 1982-12-29 | 1984-07-18 | Fujitsu Ltd | 半導体装置 |
US4525731A (en) * | 1982-12-30 | 1985-06-25 | International Business Machines Corporation | Semiconductor conversion of optical-to-electrical energy |
US4504846A (en) * | 1982-12-30 | 1985-03-12 | International Business Machines Corporation | Multiwavelength optical-to-electrical logic operations |
JPS60117680A (ja) * | 1983-11-29 | 1985-06-25 | Nippon Telegr & Teleph Corp <Ntt> | 高速電界効果トランジスタ |
ZA849070B (en) * | 1983-12-07 | 1985-07-31 | Energy Conversion Devices Inc | Semiconducting multilayered structures and systems and methods for synthesizing the structures and devices incorporating the structures |
US4591889A (en) * | 1984-09-14 | 1986-05-27 | At&T Bell Laboratories | Superlattice geometry and devices |
-
1985
- 1985-11-14 US US06/798,053 patent/US4882609A/en not_active Expired - Fee Related
- 1985-11-15 DE DE3588011T patent/DE3588011T2/de not_active Expired - Fee Related
- 1985-11-15 EP EP85114551A patent/EP0183146B1/de not_active Expired - Lifetime
- 1985-11-19 JP JP25963185A patent/JP2512422B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0183146B1 (de) | 1995-04-19 |
US4882609A (en) | 1989-11-21 |
EP0183146A2 (de) | 1986-06-04 |
DE3588011T2 (de) | 1995-08-31 |
JPS61166081A (ja) | 1986-07-26 |
JP2512422B2 (ja) | 1996-07-03 |
EP0183146A3 (en) | 1989-03-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE3588011D1 (de) | Halbleiteranordnung mit epitaxialem Material. | |
DE3650012D1 (de) | Halbleitervorrichtung. | |
DE3583969D1 (de) | Abtastvorrichtung mit halbleiterlaser. | |
DE3072175D1 (de) | Halbleitervorrichtungen mit heterouebergang. | |
DE3576433D1 (de) | Halbleiterspeichervorrichtung. | |
DE3481957D1 (de) | Halbleiteranordnung. | |
NL189326C (nl) | Halfgeleiderinrichting. | |
DE3583302D1 (de) | Halbleiteranordnung. | |
DE3787517D1 (de) | Halbleiteranordnung mit konstantem Strom. | |
DE3581773D1 (de) | Halbleiterspeichervorrichtung. | |
DE3584189D1 (de) | Halbleiterspeichergeraet. | |
DE3684557D1 (de) | Waferintegrierte halbleiteranordnung. | |
DE3683316D1 (de) | Halbleiteranordnung. | |
DE3584799D1 (de) | Halbleitervorrichtung. | |
DE3688064D1 (de) | Halbleitervorrichtung. | |
DE3679108D1 (de) | Halbleiteranordnungen. | |
DE3585733D1 (de) | Halbleiterspeichereinrichtung mit lese-aenderung-schreib-konfiguration. | |
DE3588041D1 (de) | Lichtlöschbare Thyristor-Vorrichtung. | |
DE69009409D1 (de) | Halbleiter-Heterostrukturen. | |
KR850006779A (ko) | 반도체 장치 | |
DE3581370D1 (de) | Halbleitervorrichtung. | |
DE3582653D1 (de) | Halbleiteranordnung. | |
DE3667879D1 (de) | Halbleiteranordnung. | |
DE3889563D1 (de) | Halbleiteranordnung mit Schmelzsicherung. | |
DE3684184D1 (de) | Verkapselte halbleiteranordnung. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |