DE2246405B2 - CIRCUIT ARRANGEMENT FOR ADDRESSING A MEMORY SYSTEM WITH LOGICAL ADDRESSES - Google Patents

CIRCUIT ARRANGEMENT FOR ADDRESSING A MEMORY SYSTEM WITH LOGICAL ADDRESSES

Info

Publication number
DE2246405B2
DE2246405B2 DE19722246405 DE2246405A DE2246405B2 DE 2246405 B2 DE2246405 B2 DE 2246405B2 DE 19722246405 DE19722246405 DE 19722246405 DE 2246405 A DE2246405 A DE 2246405A DE 2246405 B2 DE2246405 B2 DE 2246405B2
Authority
DE
Germany
Prior art keywords
addressing
memory system
circuit arrangement
logical addresses
addresses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19722246405
Other languages
German (de)
Other versions
DE2246405A1 (en
DE2246405C3 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of DE2246405A1 publication Critical patent/DE2246405A1/en
Publication of DE2246405B2 publication Critical patent/DE2246405B2/en
Application granted granted Critical
Publication of DE2246405C3 publication Critical patent/DE2246405C3/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/122Replacement control using replacement algorithms of the least frequently used [LFU] type, e.g. with individual count value

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
DE19722246405 1971-09-25 1972-09-21 Circuit arrangement for addressing a memory system with logical addresses Expired DE2246405C3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB4477671 1971-09-25
GB4477671 1971-09-25

Publications (3)

Publication Number Publication Date
DE2246405A1 DE2246405A1 (en) 1973-04-12
DE2246405B2 true DE2246405B2 (en) 1976-06-10
DE2246405C3 DE2246405C3 (en) 1977-02-24

Family

ID=

Also Published As

Publication number Publication date
FR2154264A5 (en) 1973-05-04
GB1314140A (en) 1973-04-18
DE2246405A1 (en) 1973-04-12
JPS4841642A (en) 1973-06-18
JPS5228536B2 (en) 1977-07-27

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
E77 Valid patent as to the heymanns-index 1977
8339 Ceased/non-payment of the annual fee