CN218974795U - High-precision time-frequency signal output equipment - Google Patents

Abstract

The utility model discloses high-precision time-frequency signal output equipment which comprises an antenna module, a time service module, a BM5503 module, a frequency conversion module, a frequency output module, a UI module, a CPU module, a pulse control module, a pulse output module and a power supply module, wherein the antenna module is connected with the time service module, the time service module is connected with the BM5503 module, the BM5503 module is connected with the frequency conversion module, the frequency conversion module is connected with the frequency output module, the CPU module is respectively connected with the time service module, the BM5503 module, the UI module and the pulse control module, and the pulse control module is connected with the pulse output module. Satellite signals are received through the antenna module, clock and output positioning information are provided through the time service module and the BM5503 module, and time-frequency signals are output through the frequency output module and the pulse output module, so that the design is concise, the cost is greatly reduced, and the method can be widely applied to the technical field of signal processing.

Description

High-precision time-frequency signal output equipment

Technical Field

The utility model relates to the technical field of signal processing, in particular to high-precision time-frequency signal output equipment.

Background

The ground digital television broadcast single-frequency network is a digital television coverage network composed of a plurality of transmitters which are positioned at different places and are in a synchronous state, and all the transmitters in the network transmit the same program at the same time with the same frequency so as to realize reliable coverage of a specific service area and single-frequency network time service receiving equipment. In order to achieve nanosecond time-frequency precision required by specifications, the single-frequency network time service receiving equipment in the market generally adopts a high-stability precise vibration/rubidium clock as a clock source of a system, and is complex in design and high in cost.

Disclosure of Invention

Therefore, the purpose of the embodiment of the utility model is to provide a high-precision time-frequency signal output device, which adopts a concise design and reduces the cost.

The embodiment of the utility model provides high-precision time-frequency signal output equipment, which comprises an antenna module, a time service module, a BM5503 module, a frequency conversion module, a frequency output module, a UI module, a CPU module, a pulse control module, a pulse output module and a power module, wherein the antenna module is connected with the time service module, the time service module is connected with the BM5503 module, the BM5503 module is connected with the frequency conversion module, the frequency conversion module is connected with the frequency output module, the CPU module is respectively connected with the time service module, the BM5503 module, the UI module and the pulse control module, the pulse control module is connected with the pulse output module, and the power module is respectively connected with the antenna module, the time service module, the BM5503 module, the frequency conversion module, the frequency output module, the UI module, the CPU module, the pulse control module and the pulse output module.

Optionally, the antenna module includes a BD antenna and/or a GPS antenna, where the BD antenna and/or the GPS antenna are connected to the time service module.

Optionally, the BM5503 module includes a crystal oscillator circuit, where the crystal oscillator circuit is connected with the time service module, the frequency conversion module and the CPU module respectively.

Optionally, the UI module includes a display screen and an indicator, where the display screen and the indicator are both connected with the CPU module.

Optionally, the crystal oscillator circuit, the time service module and the CPU module are integrated on a main board.

Optionally, the main board further comprises a WDT circuit, an LCD interface circuit, an RS232 circuit and a PPS output circuit, wherein the WDT circuit is connected with the CPU module, the LCD interface circuit is connected with the UI module, the RS232 circuit is connected with the CPU module, and the PPS output circuit is respectively connected with the time service module, the BM5503 module and the CPU module.

Optionally, the crystal oscillator circuit comprises a chip BM5503 and a chip BM5503 peripheral circuit.

Optionally, the CPU module includes a chip GD32F303RET6 and a chip GD32F303RET6 peripheral circuit.

Optionally, the WDT circuit includes a chip SP706TEN and chip SP706TEN peripheral circuits.

Optionally, the RS232 circuit includes two identical transceiver circuits, and the transceiver circuits are connected with the CPU module.

The embodiment of the utility model has the following beneficial effects: the embodiment of the utility model provides high-precision time-frequency signal output equipment, which comprises an antenna module, a time service module, a BM5503 module, a frequency conversion module, a frequency output module, a UI module, a CPU module, a pulse control module, a pulse output module and a power module, wherein the antenna module is connected with the time service module, the time service module is connected with the BM5503 module, the BM5503 module is connected with the frequency conversion module, the frequency conversion module is connected with the frequency output module, the CPU module is respectively connected with the time service module, the BM5503 module, the UI module and the pulse control module, the pulse control module is connected with the pulse output module, and the power module is respectively connected with the antenna module, the time service module, the BM5503 module, the frequency conversion module, the frequency output module, the UI module, the CPU module, the pulse control module and the pulse output module. Satellite signals are received through the antenna module, clocks and output positioning information are provided through the time service module and the BM5503 module, and time-frequency signals are output through the frequency output module and the pulse output module, so that the design is concise, and the cost is greatly reduced.

Drawings

Fig. 1 is a block diagram of a high-precision time-frequency signal output device according to an embodiment of the present utility model;

FIG. 2 is a schematic circuit diagram of a power module according to an embodiment of the present utility model;

FIG. 3 is a schematic circuit diagram of a CPU module according to an embodiment of the present utility model;

FIG. 4 is a schematic circuit diagram of a timing module according to an embodiment of the present utility model;

FIG. 5 is a schematic circuit diagram of a crystal oscillator circuit according to an embodiment of the present utility model;

FIG. 6 is a schematic circuit diagram of a WDT circuit provided by an embodiment of the present utility model;

fig. 7 is a schematic circuit diagram of a PPS output circuit according to an embodiment of the present utility model;

FIG. 8 is a schematic circuit diagram of an RS232 circuit according to an embodiment of the present utility model;

FIG. 9 is a schematic circuit diagram of an LCD interface provided by an embodiment of the present utility model;

fig. 10 is a schematic circuit diagram of a display circuit according to an embodiment of the present utility model.

Detailed Description

The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

In embodiments of the utility model, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g." in an embodiment should not be taken as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present utility model, unless otherwise indicated, the meaning of "a plurality" is two or more.

Referring to fig. 1, an embodiment of the present utility model provides a high-precision time-frequency signal output device, which includes an antenna module, a time service module, a BM5503 module, a frequency conversion module, a frequency output module, a UI module, a CPU module, a pulse control module, a pulse output module and a power module, where the antenna module is connected with the time service module, the time service module is connected with the BM5503 module, the BM5503 module is connected with the frequency conversion module, the frequency conversion module is connected with the frequency output module, the CPU module is connected with the time service module, the BM5503 module, the UI module and the pulse control module, the pulse control module is connected with the pulse output module, and the power module is connected with the antenna module, the time service module, the BM5503 module, the frequency conversion module, the frequency output module, the UI module, the CPU module, the pulse control module and the pulse output module.

The antenna module is used for receiving satellite signals, and inputting the satellite signals into the time service module after processing.

The Time service module is used for connecting the antenna module and outputting PPS (Pulse Per Second) TOD (Time Of Day information, protocol for transmitting Time Of Day information) +detection signals, wherein the PPS+TOD provides a device base Time source, and the detection signals are used for detecting the working state Of an external BD (BeiDou Navigation Satellite System, beidou satellite navigation system)/GPS (Global Positioning System ) antenna.

The BM5503 module receives the external PPS signal, namely the self-timing module, and the BM5503 module performs self-learning and calibration, so that when the external PPS signal is disconnected, the BM5503 module can still output the PPS signal plus 10M signal, and meanwhile, the BM5503 module can output the related information of the module through a serial port.

The CPU module is an equipment core module, detects the working state of the time service module in real time, detects the working state of the BM5503 module in real time, communicates with the pulse control module in real time and outputs the states of the equipment and the modules to the UI module.

And the UI module is used as a human-computer interaction Interface, and a User can inquire and display the related information of the equipment through the UI module.

The Pulse control module is connected with the CPU module, and can control and output different Pulse signals such as PPS, PPM (Pulse Per Minute), PPH (Pulse Per Hour, hour Pulse) and the like through the CPU, and can also adjust the Pulse width of the output Pulse signals and perform level conversion of the Pulse signals; and the pulse output module is used for receiving the pulse signals output by the pulse control module and converting the input square wave pulse signals into sine wave signals for multiplexing output.

The frequency conversion module is used for receiving the frequency information output by the BM5503 module, converting the input frequency signal into level, and outputting the converted frequency signal to the frequency output module; and the frequency output module is used for receiving the frequency signal of the frequency conversion module and converting the input square wave frequency signal into a sine wave signal for multiplexing output.

And the power supply module is used for supplying power to the whole equipment.

Specifically, the antenna module receives satellite signals, inputs the satellite signals after preliminary processing into the time service module, inputs the satellite information into the BM5503 module, outputs detection signals to detect the working state of an external antenna module, then outputs PPS+TOD signals to provide a basic time source for equipment, the BM5503 module receives the satellite information and outputs corresponding frequency information to the frequency conversion module, the frequency conversion module converts the input frequency signals into level signals, the frequency signals after conversion are output to the frequency output module, and the frequency output module converts the input square wave frequency signals into sine wave signals for multiplexing; the working state of the time service module and the working state of the BM5503 module are detected in real time through the CPU module, communication is carried out between the time service module and the pulse control module, the states of equipment and each module are output to the UI module for display, different pulse signals are output to the pulse control module, the pulse control module adjusts the pulse width of the output pulse signals, meanwhile, level conversion of the pulse signals is carried out, the converted pulse signals are input to the pulse output module, and the pulse output module converts the input square wave pulse signals into sine wave signals for multiplexing output.

Referring to fig. 2, a schematic circuit diagram of a power module, in a specific embodiment, the schematic circuit diagram of the power module includes a chip CD40-220SSK1 and a chip CD40-220SSK1 peripheral circuit, the input ac voltage and dc voltage are converted into working voltages of each module of the device by the chip CD40-220SSK1, the ac 220V input voltage enters the power module through EMC (Electro Magnetic Compatibility ) device protection, and the output dc 12V voltage decoupling provides power to the device through a connection base; C1-C3 are decoupling capacitors at the power output end, and power noise is filtered; f9 is a fuse, a protection circuit.

Referring to fig. 3, the CPU module may optionally include a chip GD32F303RET6 and a chip GD32F303RET6 peripheral circuit.

Specifically, the chip GD32F303RET6 is a novel 32-bit general microcontroller, which has an optimal cost performance in terms of enhancing processing capacity, reducing power consumption and peripheral devices, and also provides a memory protection unit and a powerful tracking technology to enhance application security and advanced debug support. Pin 14 (bd_pps_n) of chip GD32F303RET6 is connected with endpoint bd_pps_n of time service module, receives PPS signal output by time service module, pin 15 (pps_in) of chip GD32F303RET6 is connected with endpoint pps_in of crystal oscillator circuit, receives PPS signal output by crystal oscillator circuit, pin 16 (usart1_tx) of chip GD32F303RET6 is connected with endpoint usart1_tx of crystal oscillator circuit, sends control signal to crystal oscillator circuit, pin 17 (usart1_rx) of chip GD32F303RET6 is connected with endpoint usart1_rx of crystal oscillator circuit, receives clock signal of crystal oscillator circuit; y2 is a crystal oscillator of the CPU, C200 and C201 are decoupling capacitors, and crystal oscillator noise is passed; C187-C191 is a decoupling capacitor of the power supply, filters power supply noise, and is connected with a pin 3 (RTCX 1) of the chip GD32F303RET6, and is connected with a pin 4 (RTCX 2) of the chip GD32F303RET 6; p7 is the download port of the GD32F303RET6 of the chip, the endpoint SWDIO is connected with the pin 46 (SWDIO) of the GD32F303RET6, and the endpoint SWCLK is connected with the pin 49 (SWCLK) of the GD32F303RET 6; y1 is a voltage conversion chip, C195-C198 is a power decoupling capacitor, filters noise, and pin 3 (OSC_IN) is connected to pin 5 (OSC_IN) of chip GD32F303RET6.

Referring to fig. 4, a schematic circuit diagram of a timing module, C152 is a power decoupling capacitor of the timing module, and filters noise of a power supply; the endpoints GPS_OPEN, GPS_SHORT and GPS_RESET are connected with the antenna module; the endpoint usart2_tx is connected to pin 29 (usart2_tx) of chip GD32F303RET6, and sends information to chip GD32F303RET; usart2_rx is connected to pin 30 (usart2_rx) of chip GD32F303RET6, and receives chip information.

Referring to fig. 5, the BM5503 module includes a crystal oscillator circuit, and the crystal oscillator circuit is respectively connected with the time service module, the frequency conversion module and the CPU module.

Specifically, the crystal oscillator circuit comprises a crystal oscillator chip BM5503, capacitors C28-C31 and C37 are decoupling capacitors at the power supply end of the chip BM5503, and power supply noise is filtered; the end point USART1_RX is connected with the pin 17 (USART1_RX) of the chip GD32F303RET6, and the end point USART1_TX is connected with the pin 16 (USART1_TX) of the chip GD32F303RET 6; the terminal ocxo_lock_con is connected to the pin 40 (ocxo_lock_con) of the chip GD32F303RET6, and outputs clock information to the chip GD32F303RET6.

In a specific embodiment, the working voltage of the crystal oscillator circuit is direct current 5V voltage, and the crystal oscillator circuit receives the signal of the time service module 1PPS, and outputs a sine wave signal with the frequency of 1PPS and 10M after internal taming; and the serial port is communicated with the CPU module.

Referring to fig. 6, optionally, the WDT circuit includes a chip SP706TEN and a chip SP706TEN peripheral circuit.

Wherein, WDT (watch dog Timer), WDT timing exceeds, will give a reset signal to CPU, make CPU reset.

Specifically, the SP706TEN is a microprocessor monitor circuit chip. RESET1 is a manual RESET key, C216 is a decoupling capacitor at the RESET end key end, and noise is filtered; c212 and C213 are decoupling capacitors of the input power supply end, and input noise of the power supply end is filtered; the terminal NRST of the chip SP706TEN is connected to the pin 60 (NRST) of the chip GD32F303RET6, and outputs reset information to reset the CPU chip GD32F303RET6.

In a specific embodiment, the operating voltage of the WDT circuit is a dc 3V3 voltage; monitoring WDT signals output by the CPU module, and restarting the CPU module in time when abnormality occurs; a reset button is arranged, and the CPU module can be reset by pressing.

Referring to fig. 7, optionally, the main board further includes a WDT circuit, an LCD interface circuit, an RS232 circuit, and a PPS output circuit, where the WDT circuit is connected to the CPU module, the LCD interface circuit is connected to the UI module, the RS232 circuit is connected to the CPU module, and the PPS output circuit is connected to the timing module, the BM5503 module, and the CPU module, respectively.

Specifically, the PPS output circuit includes a chip TXU0104, where the chip TXU0104 is a 4-bit, dual-power in-phase fixed-direction voltage level conversion device. The Ax pin takes the VCCA logic level as a reference, the OE pin can take the VCCA or VCCB logic level as a reference, and the Bx pin takes the VCCB logic level as a reference; the A port can accept 1.1V to 5.5V input voltage, and the B port can accept 1.1V to 5.5V input voltage; when OE is a fixed direction, the data transfer may be set high from a to B or B to a with reference to either supply; when OE is set to a low level, all output pins are in a high impedance state. U28 is an AND gate chip, outputs PPS signals to the chip TXU0104 through pin 4 (PPS_LVTIL), and the endpoints PPS_OU1-PPS_OU8 of the chip TXU0104 are output to the corresponding endpoints PPS_OU1-PPS_OU8 of the interfaces P8-P12; C231-C236 are decoupling capacitors of the input power supply, filtering noise.

In a specific embodiment, the operating voltage of the PPS output circuit is dc 3V3 and 5V voltages; the 1PPS output by the crystal oscillator passes through an AND gate, then is subjected to level conversion into 1PPS with the level of 5V, and outputs 8 paths of 1PPS outwards through a BNC interface.

Referring to fig. 8, optionally, the RS232 circuit includes two identical transceiver circuits, and the transceiver circuits are connected to the CPU module.

Specifically, the endpoint uart3_rx9 of the chip SP3232E is connected to the pin 52 (uart3_rx) of the chip GD32F303RET6, and sends information to the chip GD32F303RET6, the endpoint uart3_tx10 of the chip SP3232E is connected to the pin 51 (uart3_tx) of the chip GD32F303RET6, and receives information sent by the chip GD32F303RET 6; the endpoint uart4_rx12 of the chip SP3232E is connected to the pin 54 (uart4_rx) of the chip GD32F303RET6, and sends information to the chip GD32F303RET6, the endpoint uart4_tx11 of the chip SP3232E is connected to the pin 53 (uart4_tx) of the chip GD32F303RET6, and receives information sent by the chip GD32F303RET 6; the endpoint TXD1_232 of the chip SP3232E is connected with the endpoint TXD1_232 of the RS232 circuit, the RS232 circuit sends information to the chip SP3232E, the endpoint TXD2_232 of the chip SP3232E is connected with the endpoint TXD2_232 of the RS232 circuit, and the RS232 circuit sends information to the chip SP3232E; the end point RXD1_232 of the chip SP3232E is connected with RXD1_232 of an RS232 circuit, the RS232 circuit receives information of the chip SP3232E, the end point RXD2_232 of the chip SP3232E is connected with RXD2_232 of the RS232 circuit, and the RS232 circuit receives information of the chip SP3232E; and the COM1A and the COM1B are externally connected with an interface and are communicated with the outside.

In a specific embodiment, the operating voltage of the switching chip SP3232E of RS23 is dc 3V3; the CPU module outputs two paths of serial ports, and the serial ports are converted into RS232 serial ports to output information.

Referring to fig. 9, a schematic circuit diagram of an lcd interface, referring to fig. 10, a schematic circuit diagram of a display circuit, optionally, the UI module includes a display screen and an indicator, where the display screen and the indicator are both connected with the CPU module.

Specifically, the endpoints DB0-DB7 of the LCD interface are respectively connected with the corresponding endpoints DB0-DB7 of the chips LCD1 and P1 of the display circuit (i.e., the endpoint DB0 of the interface is connected with the endpoint DB0 of P1, and so on), and the endpoints led_gps, led_lock, led_alm, led_bd, and led_keep of the LCD interface are respectively connected with the corresponding endpoints of the display circuit and the CPU module chip GD32F303RET6 (i.e., the endpoint led_gps of the interface is connected with the endpoint led_gps of the display circuit and the chip GD32F303RET6, and so on); the capacitors C1-C12 of the display circuit are decoupling capacitors, and noise of the light emitting diodes D1-D6 is filtered; the capacitors C21-C25 are decoupling capacitors at the power supply end and filter power supply noise.

In a specific embodiment, the working voltage of the LCD interface is direct current 3V3 voltage, and the inside is an LCD liquid crystal screen interface and an indicator lamp control connection; the working voltage of the display circuit is direct current 3V3 voltage; support 8 bit LCD parallel port liquid crystal screen; a 3V3 power lamp and 5 MCU controlled GPIO (General Purpose Input Output ) lamps.

The embodiment of the utility model has the following beneficial effects: the embodiment of the utility model provides high-precision time-frequency signal output equipment, which comprises an antenna module, a time service module, a BM5503 module, a frequency conversion module, a frequency output module, a UI module, a CPU module, a pulse control module, a pulse output module and a power module, wherein the antenna module is connected with the time service module, the time service module is connected with the BM5503 module, the BM5503 module is connected with the frequency conversion module, the frequency conversion module is connected with the frequency output module, the CPU module is respectively connected with the time service module, the BM5503 module, the UI module and the pulse control module, the pulse control module is connected with the pulse output module, and the power module is respectively connected with the antenna module, the time service module, the BM5503 module, the frequency conversion module, the frequency output module, the UI module, the CPU module, the pulse control module and the pulse output module. Satellite signals are received through the antenna module, clocks and output positioning information are provided through the time service module and the BM5503 module, time-frequency signals are output through the frequency output module and the pulse output module, communication control is carried out with the outside through an RS232 interface, man-machine interaction is completed through the UI module, the overall design is simple, the cost is greatly reduced, and meanwhile performance requirements are met.

While the preferred embodiment of the present utility model has been described in detail, the utility model is not limited to the embodiment, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the utility model, and these modifications and substitutions are intended to be included in the scope of the present utility model as defined in the appended claims.

Claims (10)

1. The utility model provides a high accuracy time-frequency signal output equipment, its characterized in that includes antenna module, time service module, BM5503 module, frequency conversion module, frequency output module, UI module, CPU module, pulse control module, pulse output module and power module, the antenna module with time service module is connected, time service module with BM5503 module is connected, BM5503 module with frequency conversion module is connected, frequency conversion module with frequency output module is connected, the CPU module respectively with time service module, BM5503 module UI module with pulse control module is connected, pulse control module with pulse output module is connected, power module respectively with antenna module time service module BM5503 module frequency conversion module, frequency output module UI module CPU module pulse control module with pulse output module connects.

2. The high-precision time-frequency signal output device according to claim 1, wherein the antenna module comprises a BD antenna and/or a GPS antenna, and the BD antenna and/or the GPS antenna are connected with the time service module.

3. The high-precision time-frequency signal output device according to claim 1, wherein the BM5503 module comprises a crystal oscillator circuit, and the crystal oscillator circuit is respectively connected with the time service module, the frequency conversion module and the CPU module.

4. The high-precision time-frequency signal output device according to claim 1, wherein the UI module comprises a display screen and an indicator light, and the display screen and the indicator light are both connected with the CPU module.

5. The high-precision time-frequency signal output device according to claim 3, wherein the crystal oscillator circuit, the time service module and the CPU module are integrated on a main board.

6. The high-precision time-frequency signal output device according to claim 5, wherein the main board further comprises a WDT circuit, an LCD interface circuit, an RS232 circuit and a PPS output circuit, the WDT circuit is connected with the CPU module, the LCD interface circuit is connected with the UI module, the RS232 circuit is connected with the CPU module, and the PPS output circuit is connected with the time service module, the BM5503 module and the CPU module, respectively.

7. A high-precision time-frequency signal output apparatus according to claim 3, wherein the crystal oscillator circuit comprises a chip BM5503 and a chip BM5503 peripheral circuit.

8. The high-precision time-frequency signal output apparatus according to claim 1, wherein the CPU module includes a chip GD32F303RET6 and a chip GD32F303RET6 peripheral circuit.

9. The high-precision time-frequency signal output device according to claim 6, wherein the WDT circuit comprises a chip SP706TEN and a chip SP706TEN peripheral circuit.

10. The high-precision time-frequency signal output device according to claim 6, wherein the RS232 circuit comprises two identical transceiver circuits, and the transceiver circuits are connected with the CPU module.

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