CN204497261U - LED encapsulation structure - Google Patents
LED encapsulation structure Download PDFInfo
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- CN204497261U CN204497261U CN201420667144.8U CN201420667144U CN204497261U CN 204497261 U CN204497261 U CN 204497261U CN 201420667144 U CN201420667144 U CN 201420667144U CN 204497261 U CN204497261 U CN 204497261U
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Abstract
The utility model discloses a kind of LED encapsulation structure, comprise: substrate or support, substrate or support comprise the first electrode pin, the second electrode pin and insulation isolated area, the metal function region of the first electrode pin comprises the first die bond region and remaining first non-die bond region, and/or the metal function region of the second electrode pin comprises the second die bond region and remaining second non-die bond region; LED wafer, LED wafer is fixed on the first die bond region and/or the second die bond region by conducting resinl; And packing colloid, the coated LED wafer of packing colloid; The surface roughness in the first die bond region is larger than the surface roughness in the first non-die bond region; And/or second the surface roughness in die bond region larger than the surface roughness in the second non-die bond region.The roughness in the non-die bond region of the roughness ratio due to die bond region is large, improves the mechanical adhering force in conducting resinl and die bond region, metal function district, thus improves the reliability of LED encapsulation structure.
Description
Technical field
The utility model relates to semiconductor applications, particularly relates to a kind of LED encapsulation structure.
Background technology
Light-emitting diode (LED, Light Emitting Diode) has been widely used in the occasions such as various illumination or luminescence display.In existing LED technology, in order to reach higher luminous efficiency, more and more substrate of packaging body or the bottom reflection silver coating of support all have employed the mode improving glossiness and achieve the goal, and namely add more brightener during plating and make silver coating surface-brightening, smooth.Although the substrate under this technique or support improve the luminous efficiency of LED light source, but the product of the LED encapsulation structure for elargol die bond, die bond region is more smooth, the bonding force of elargol is less, under the effect of stress, elargol more easily departs from the metal surface in die bond region, causes LED light source disabler.
Summary of the invention
For above-mentioned prior art present situation, technical problem to be solved in the utility model is, provides a kind of LED encapsulation structure, improves the mechanical adhering force in conducting resinl and die bond region, to improve the reliability of LED encapsulation structure.
In order to solve the problems of the technologies described above, a kind of LED encapsulation structure provided by the utility model, comprising:
Substrate or support, described substrate or support comprise the first electrode pin, the second electrode pin and the insulation isolated area for the first electrode pin and the second electrode pin being separated, the metal function region of described first electrode pin comprises the first die bond region and remaining first non-die bond region, and/or the metal function region of described second electrode pin comprises the second die bond region and remaining second non-die bond region;
LED wafer, described LED wafer is fixed on described first die bond region and/or described second die bond region by conducting resinl; And
Packing colloid, the coated described LED wafer of described packing colloid;
The surface roughness in described first die bond region is larger than the surface roughness in described first non-die bond region; And/or the surface roughness in described second die bond region is larger than the surface roughness in described second non-die bond region.
Wherein in an embodiment, the surface roughness in described first die bond region is 2.5 μm ~ 4.5 μm.
Wherein in an embodiment, the surface roughness in described second die bond region is 2.5 μm ~ 4.5 μm.
Wherein in an embodiment, described conducting resinl is elargol.
Wherein in an embodiment, described packing colloid is epoxy resin or silica gel
Wherein in an embodiment, described LED wafer is flip chip, described flip chip is across in described insulation isolated area, and the positive electrode of described flip chip and negative electrode are fixed on described first die bond region and described second die bond region respectively by described conducting resinl.
Wherein in an embodiment, described LED wafer is the wafer of vertical stratification, the negative electrode of the wafer of described vertical stratification is fixed on described first die bond region or described second die bond region by described conducting resinl, and the positive electrode of the wafer of described vertical stratification then passes through conductive bond line and the metal function region of described second electrode pin or the metal function joint area of described first electrode pin and forms conductivity pathway.
Compared with prior art, LED encapsulation structure of the present utility model, the roughness in the non-die bond region of the roughness ratio due to the die bond region for fixed L ED wafer is large, improves the mechanical adhering force in conducting resinl and die bond region, metal function district, thus improves the reliability of LED encapsulation structure.
The beneficial effect that the utility model additional technical feature has will be described in this specification embodiment part.
Accompanying drawing explanation
Fig. 1 is the main TV structure schematic diagram of substrate in the utility model embodiment one or support;
Fig. 2 is the cross-sectional view of substrate in the utility model embodiment one or support;
Fig. 3 is the substrate in the utility model embodiment one or the cross-sectional view after support point conducting resinl;
Fig. 4 is the substrate in the utility model embodiment one or the cross-sectional view after support die bond;
Fig. 5 be in utility model embodiment two substrate or support die bond after cross-sectional view.
Description of reference numerals: 10: substrate or support; 11: the first electrode pins; 12: the second electrode pins; 13: insulation isolated area; 21: the metal function region of described first electrode pin; 21a: the first die bond region; 21b: the first non-die bond region; 22: the metal function region of described second electrode pin; 22a: the second die bond region; 22b: the second non-die bond region; 40: conducting resinl; 50: flip chip; 51: the positive electrode of flip chip; 52: the negative electrode of flip chip; 60: the wafer of vertical stratification; 70: conductive bond line.
Embodiment
And the utility model is described in detail below with reference to the accompanying drawings in conjunction with the embodiments.It should be noted that, when not conflicting, the feature in following embodiment and embodiment can combine mutually.
Fig. 1 and Fig. 2 is respectively front view and the cutaway view of substrate in the utility model embodiment one or support 10.As shown in Figure 1, 2, substrate in the present embodiment or support 10 comprise the first electrode pin 11, second electrode pin 12 and the insulation isolated area 13 for the first electrode pin 11 and the second electrode pin 12 being separated, the surface roughness that the metal function region 21 of described first electrode pin 11 comprises the first die bond region 21a and remaining first non-die bond region 21b, described first die bond region 21a is larger than the surface roughness of described first non-die bond region 21b.The surface roughness of the first non-die bond region 21b is generally 0.1 μm ~ 1 μm, and therefore the surface roughness of described first die bond region 21a is preferably 2.5 μm ~ 4.5 μm; The surface roughness that the metal function region 22 of described second electrode pin 12 comprises the second die bond region 22a and remaining second non-die bond region 22b, described second die bond region 22a is larger than the surface roughness of described second non-die bond region 22b.The surface roughness of the first non-die bond region 21b is generally 0.1 μm ~ 1 μm, and therefore the surface roughness of described second die bond region 22a is preferably 2.5 μm ~ 4.5 μm.Described first die bond region 21a and described second die bond region 22a can realize degree of roughness higher than the first non-die bond region 21b and the second non-die bond region 22b by electroplating technology, aft-loaded airfoil mode.
Fig. 3 is the substrate in the utility model embodiment one or the cross-sectional view after support point conducting resinl, and Fig. 4 is the substrate in the utility model embodiment one or the cross-sectional view after support die bond.As shown in Figure 3,4, LED wafer in the present embodiment is flip chip 50, flip chip 50 is across in described insulation isolated area 13, and the positive electrode 51 of described flip chip 50 and negative electrode 52 are fixed on described first die bond region 21a and described second die bond region 22a respectively by conducting resinl 40.Because the roughness for the first die bond region 21a of fixed L ED wafer and the roughness ratio first non-die bond region 21b of the second die bond region 22a and the second non-die bond region 22b is large, improve the mechanical adhering force in conducting resinl and die bond region, metal function district, thus improve the reliability of LED encapsulation structure.Preferably, described conducting resinl 40 is elargol.
The coated LED wafer of packing colloid (not shown), forms LED particle like this.
Fig. 5 be in utility model embodiment two substrate or support die bond after cross-sectional view.As shown in Figure 5, the structure of the LED encapsulation structure in the present embodiment is substantially identical with the structure of embodiment one, difference is: described LED wafer is the wafer 60 of vertical stratification, the negative electrode of the wafer 60 of described vertical stratification is fixed on described first die bond region 21a by described conducting resinl 40, and the positive electrode of the wafer 60 of described vertical stratification is then connected to form conductivity pathway by conductive bond line 70 and the metal function region 22 of described second electrode pin 12.Because the roughness of the roughness ratio first non-die bond region 21b of the first die bond region 21a for fixed L ED wafer is large, improves the mechanical adhering force in conducting resinl and die bond region, metal function district, thus improve the reliability of LED encapsulation structure.
To sum up, LED encapsulation structure of the present utility model, LED wafer is fixed on described coarse crystal bonding area field surface by conducting resinl, improves the mechanical adhering force in conducting resinl and die bond region, metal function district thus improves the reliability of LED encapsulation structure
The above embodiment only have expressed several execution mode of the present utility model, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the utility model the scope of the claims.It should be pointed out that for the person of ordinary skill of the art, without departing from the concept of the premise utility, can also make some distortion and improvement, these all belong to protection range of the present utility model.
Claims (7)
1. a LED encapsulation structure, comprising:
Substrate or support (10), described substrate or support (10) comprise the first electrode pin (11), second electrode pin (12) and the insulation isolated area (13) for the first electrode pin (11) and the second electrode pin (12) are separated, the metal function region (21) of described first electrode pin (11) comprises the first die bond region (21a) and remaining the first non-die bond region (21b), and/or the metal function region (22) of described second electrode pin (12) comprises the second die bond region (22a) and remaining the second non-die bond region (22b),
LED wafer, described LED wafer is fixed on described first die bond region (21a) and/or described second die bond region (22a) by conducting resinl (40); And
Packing colloid, the coated described LED wafer of described packing colloid;
It is characterized in that,
The surface roughness in described first die bond region (21a) is larger than the surface roughness of described first non-die bond region (21b); And/or the surface roughness in described second die bond region (22a) is larger than the surface roughness of described second non-die bond region (22b).
2. LED encapsulation structure according to claim 1, is characterized in that, the surface roughness in described first die bond region (21a) is 2.5 μm ~ 4.5 μm.
3. LED encapsulation structure according to claim 1, is characterized in that, the surface roughness in described second die bond region (22a) is 2.5 μm ~ 4.5 μm.
4. LED encapsulation structure according to claim 1, is characterized in that, described conducting resinl (40) is elargol.
5. LED encapsulation structure according to claim 1, is characterized in that, described packing colloid is epoxy resin or silica gel
6. LED encapsulation structure as claimed in any of claims 1 to 5, it is characterized in that, described LED wafer is flip chip (50), described flip chip (50) is across on described insulation isolated area (13), and the positive electrode (51) of described flip chip (50) and negative electrode (52) are fixed on described first die bond region (21a) and described second die bond region (22a) respectively by described conducting resinl (40).
7. LED encapsulation structure as claimed in any of claims 1 to 5, it is characterized in that, described LED wafer is the wafer (60) of vertical stratification, the negative electrode of the wafer (60) of described vertical stratification is fixed on described first die bond region (21a) or described second die bond region (22a) by described conducting resinl (40), the positive electrode of the wafer (60) of described vertical stratification is then connected to form conductivity pathway by conductive bond line (70) and the metal function region (22) of described second electrode pin (12) or the metal function region (21) of described first electrode pin (11).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420667144.8U CN204497261U (en) | 2014-11-07 | 2014-11-07 | LED encapsulation structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420667144.8U CN204497261U (en) | 2014-11-07 | 2014-11-07 | LED encapsulation structure |
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| CN204497261U true CN204497261U (en) | 2015-07-22 |
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| CN201420667144.8U Active CN204497261U (en) | 2014-11-07 | 2014-11-07 | LED encapsulation structure |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109980077A (en) * | 2017-12-25 | 2019-07-05 | 晶元光电股份有限公司 | A kind of light-emitting component and its light emitting device |
| US11355723B2 (en) | 2017-12-25 | 2022-06-07 | Epistar Corporation | Light-emitting element and light-emitting device comprising the same |
-
2014
- 2014-11-07 CN CN201420667144.8U patent/CN204497261U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109980077A (en) * | 2017-12-25 | 2019-07-05 | 晶元光电股份有限公司 | A kind of light-emitting component and its light emitting device |
| US11355723B2 (en) | 2017-12-25 | 2022-06-07 | Epistar Corporation | Light-emitting element and light-emitting device comprising the same |
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