CN203104397U - Current maintaining circuit - Google Patents
Current maintaining circuit Download PDFInfo
- Publication number
- CN203104397U CN203104397U CN 201320077658 CN201320077658U CN203104397U CN 203104397 U CN203104397 U CN 203104397U CN 201320077658 CN201320077658 CN 201320077658 CN 201320077658 U CN201320077658 U CN 201320077658U CN 203104397 U CN203104397 U CN 203104397U
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- China
- Prior art keywords
- resistance
- triode
- resistor
- parallel
- controllable silicon
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- Expired - Fee Related
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Abstract
The utility model discloses a current maintaining circuit which comprises a first resistor, wherein the first resistor is connected in parallel with a second resistor; a third resistor is connected in parallel with the first capacitor; the emitter electrode of a third triode is connected with first controllable silicon; the collector electrode of the third triode is connected with the third resistor; the base electrode of the third triode is connected with an eighth resistor; a third capacitor is connected in parallel with the first controllable silicon; second controllable silicon is connected in parallel with a seventh resistor; a fourth resistor is connected in series with the seventh resistor; a fifth resistor is connected in series with a second capacitor; an inductor is connected with the drain electrode of a second triode; the source electrode of the second triode is connected with a sixth resistor; the source electrode of a first triode is connected with the fourth resistor; and the grid electrode of the second triode is connected with a pulse width modulation end. The current maintaining circuit keeps current balanced and does not influence the electric performance.
Description
Technical field
The utility model relates to a kind of holding circuit, particularly relates to a kind of electric current holding circuit.
Background technology
The current unevenness weighing apparatus can influence electrical property in the available circuit.
The utility model content
Technical problem to be solved in the utility model provides a kind of electric current holding circuit, and its holding current equilibrium does not influence electrical property.
The utility model solves above-mentioned technical problem by following technical proposals: the electric current holding circuit, it is characterized in that, it comprises first resistance, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, first electric capacity, second electric capacity, the 3rd electric capacity, first controllable silicon, second controllable silicon, first triode, second triode, the 3rd triode, inductance, first resistance is in parallel with second resistance, the 3rd resistance is in parallel with first electric capacity, the emitter of the 3rd triode is connected with first controllable silicon, the collector electrode of the 3rd triode is connected with the 3rd resistance, the base stage of the 3rd triode is connected with the 8th resistance, the 3rd electric capacity is in parallel with first controllable silicon, second controllable silicon is in parallel with the 7th resistance, the 4th resistance is connected with the 7th resistance, the 5th resistance and second capacitances in series, inductance is connected with the drain electrode of second triode, the source electrode of second triode is connected with the 6th resistance, the source electrode of first triode is connected with the 4th resistance, and the grid of second triode is connected with the pulse-width modulation end.
Preferably, described inductance is connected with an input.
Preferably, described the 5th resistance is connected with an interchange end.
Positive progressive effect of the present utility model is: the equilibrium of the utility model electric current holding circuit holding current does not influence electrical property.
Description of drawings
Fig. 1 is the circuit diagram of the utility model electric current holding circuit.
Embodiment
Provide the utility model preferred embodiment below in conjunction with accompanying drawing, to describe the technical solution of the utility model in detail.
As shown in Figure 1, the utility model electric current holding circuit, comprise first resistance R 1, second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 8th resistance R 8, first capacitor C 1, second capacitor C 2, the 3rd capacitor C 3, the first controllable silicon ZD1, the second controllable silicon ZD2, the first triode Q1, the second triode Q2, the 3rd triode Q3, inductance L 1, first resistance R 1 is in parallel with second resistance R 2, the 3rd resistance R 3 is in parallel with first capacitor C 1, the emitter of the 3rd triode Q3 is connected with the first controllable silicon ZD1, the collector electrode of the 3rd triode Q3 is connected with the 3rd resistance R 3, the base stage of the 3rd triode Q3 is connected with the 8th resistance R 8, the 3rd capacitor C 3 is in parallel with the first controllable silicon ZD1, the second controllable silicon ZD2 is in parallel with the 7th resistance R 7, the 4th resistance R 4 is connected with the 7th resistance R 7, the 5th resistance R 5 is connected with second capacitor C 2, inductance L 1 is connected with the drain electrode of the second triode Q2, the source electrode of the second triode Q2 is connected with the 6th resistance R 6, the source electrode of the first triode Q1 is connected with the 4th resistance R 4, (Pulse Width Modulation PWM) connects for the grid of the second triode Q2 and pulse-width modulation end.Inductance L 1 is connected with an input (INPUT).The 5th resistance R 5 is connected with an interchange end (VCC).
When pulse-width modulation end duty ratio hour, the second triode Q2 ON time is short in unit interval, the flow through second triode Q2, the 6th resistance R 6, the 7th resistance R 7 electric currents diminishes, 7 pressure drops of the 7th resistance R diminish, and the 3rd triode Q3 ends, the first triode Q1 conducting, first resistance R 1, second resistance R 2, the first triode Q1, the 4th resistance R 4, the 7th resistance R 7 constitute the loop, electric current is kept in generation, i.e. holding current equilibrium does not influence electrical property.Otherwise when pulse-width modulation end duty ratio was big, the first triode Q1 ended, and disconnected keeping electric current, to promote efficient.
Those skilled in the art can carry out various remodeling and change to the utility model.Therefore, the utility model has covered various remodeling and the change in the scope that falls into appending claims and equivalent thereof.
Claims (3)
1. electric current holding circuit, it is characterized in that, it comprises first resistance, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, first electric capacity, second electric capacity, the 3rd electric capacity, first controllable silicon, second controllable silicon, first triode, second triode, the 3rd triode, inductance, first resistance is in parallel with second resistance, the 3rd resistance is in parallel with first electric capacity, the emitter of the 3rd triode is connected with first controllable silicon, the collector electrode of the 3rd triode is connected with the 3rd resistance, the base stage of the 3rd triode is connected with the 8th resistance, the 3rd electric capacity is in parallel with first controllable silicon, second controllable silicon is in parallel with the 7th resistance, the 4th resistance is connected with the 7th resistance, the 5th resistance and second capacitances in series, inductance is connected with the drain electrode of second triode, the source electrode of second triode is connected with the 6th resistance, and the source electrode of first triode is connected with the 4th resistance, and the grid of second triode is connected with the pulse-width modulation end.
2. electric current holding circuit as claimed in claim 1 is characterized in that, described inductance is connected with an input.
3. electric current holding circuit as claimed in claim 1 is characterized in that, described the 5th resistance is connected with an interchange end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320077658 CN203104397U (en) | 2013-02-21 | 2013-02-21 | Current maintaining circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320077658 CN203104397U (en) | 2013-02-21 | 2013-02-21 | Current maintaining circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203104397U true CN203104397U (en) | 2013-07-31 |
Family
ID=48855771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320077658 Expired - Fee Related CN203104397U (en) | 2013-02-21 | 2013-02-21 | Current maintaining circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203104397U (en) |
-
2013
- 2013-02-21 CN CN 201320077658 patent/CN203104397U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130731 Termination date: 20150221 |
|
| EXPY | Termination of patent right or utility model |