CN203084160U - Logic pen used for defining logic voltage window - Google Patents
Logic pen used for defining logic voltage window Download PDFInfo
- Publication number
- CN203084160U CN203084160U CN 201220659526 CN201220659526U CN203084160U CN 203084160 U CN203084160 U CN 203084160U CN 201220659526 CN201220659526 CN 201220659526 CN 201220659526 U CN201220659526 U CN 201220659526U CN 203084160 U CN203084160 U CN 203084160U
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- resistance
- logic
- resistor
- gate
- voltage window
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- Expired - Fee Related
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Abstract
Disclosed is a logic pen used for defining a logic voltage window. A logic circuit comprises a negation gate U1 and a negation gate U2. A testing input terminal is respectively connected with one end of a resistor R2 and one end of a resistor R4 through a resistor R1. The other end of the resistor R2 is connected with an input terminal of the negation gate U1 and one end of a resistor R3. The other end of the resistor R3 is connected with a VCC. The other end of the resistor R4 is connected with an input terminal of the negation gate U2 and one end of a resistor R5. The other end of the resistor R5 is grounded. An output terminal of the negation gate U1 is connected with an anode of an LED display tube D2 through a resistor R6. A cathode of the LED display tube D2 is grounded. An output terminal of the negation gate U2 is connected with a cathode of an LED display tube D1 through a resistor R7. An anode of the LED display tube D1 is connected with the VCC. The logic pen used for defining the logic voltage window is capable of decreasing intaking/outputting current at a detection terminal and reducing testing errors, and is simple in structure and clear in logic.
Description
Technical field
The utility model relates to a kind of logic pen that is used to define the logic voltage window.
Background technology
Logic pen is to adopt the instrument of the pilot lamp of different colours for the height of expression digital level.It is to measure the easier instrument of digital circuit, uses logic pen can measure out of order chip in the digital circuit fast.Existing logic pen circuit relative complex, and the suction of sound end/confess electric current is bigger than normal, might have influence on the logic level of test point.
Summary of the invention
In order to overcome above-mentioned the deficiencies in the prior art, the purpose of this utility model is to provide a kind of logic pen that is used to define the logic voltage window.
To achieve these goals, the technical solution adopted in the utility model is:
A kind of logic pen that is used to define the logic voltage window, its logical circuit comprises not gate U1 and not gate U2, test input is by the end of resistance R 1 back difference connecting resistance R2 and an end of resistance R 4, the input end of another termination not gate U1 of resistance R 2 and an end of resistance R 3, another termination VCC of resistance R 3, the input end of another termination not gate U2 of resistance R 4 and an end of resistance R 5, the other end ground connection of resistance R 5, the output terminal of not gate U1 connects the anode of laser-emitting diode D2 by resistance R 6, the plus earth of laser-emitting diode D2, the output terminal of not gate U2 connects the negative electrode of laser-emitting diode D1 by resistance R 7, and the anode of laser-emitting diode D1 meets VCC.
Compared with prior art, the utility model can reduce the suction of test side/confess electric current, test error is reduced, and simple in structure, clear logic.
Description of drawings
Accompanying drawing is circuit theory diagrams of the present utility model.
Embodiment
Below in conjunction with drawings and Examples the utility model is carried out more detailed explanation.
As shown in the figure, the utility model is a kind of logic pen that is used to define the logic voltage window, its logical circuit comprises not gate U1 and not gate U2, test input is by the end of resistance R 1 back difference connecting resistance R2 and an end of resistance R 4, the input end of another termination not gate U1 of resistance R 2 and an end of resistance R 3, another termination VCC of resistance R 3, the input end of another termination not gate U2 of resistance R 4 and an end of resistance R 5, the other end ground connection of resistance R 5, the output terminal of not gate U1 connects the anode of laser-emitting diode D2 by resistance R 6, the plus earth of laser-emitting diode D2, the output terminal of not gate U2 connects the negative electrode of laser-emitting diode D1 by resistance R 7, and the anode of laser-emitting diode D1 meets VCC.
In the utility model structure, 3 couples of not gate U1 of resistance R 2 and resistance R do biasing, 5 couples of not gate U2 of resistance R 4 and resistance R do biasing, and not gate U1 and not gate U2 all have very high input impedance, so the resistance of resistance R 2, R3, R4 and R5 all should be more than 100K, also be that resistance R 2, R3, R4 and R5 also have high impedance, so suction of test lead/confess electric current is just very little, has improved measuring accuracy.
Claims (1)
1. logic pen that is used to define the logic voltage window, it is characterized in that, its logical circuit comprises not gate U1 and not gate U2, test input is by the end of resistance R 1 back difference connecting resistance R2 and an end of resistance R 4, the input end of another termination not gate U1 of resistance R 2 and an end of resistance R 3, another termination VCC of resistance R 3, the input end of another termination not gate U2 of resistance R 4 and an end of resistance R 5, the other end ground connection of resistance R 5, the output terminal of not gate U1 connects the anode of laser-emitting diode D2 by resistance R 6, the plus earth of laser-emitting diode D2, the output terminal of not gate U2 connects the negative electrode of laser-emitting diode D1 by resistance R 7, and the anode of laser-emitting diode D1 meets VCC.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201220659526 CN203084160U (en) | 2012-11-30 | 2012-11-30 | Logic pen used for defining logic voltage window |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201220659526 CN203084160U (en) | 2012-11-30 | 2012-11-30 | Logic pen used for defining logic voltage window |
Publications (1)
Publication Number | Publication Date |
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CN203084160U true CN203084160U (en) | 2013-07-24 |
Family
ID=48829984
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN 201220659526 Expired - Fee Related CN203084160U (en) | 2012-11-30 | 2012-11-30 | Logic pen used for defining logic voltage window |
Country Status (1)
Country | Link |
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CN (1) | CN203084160U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20160187391A1 (en) * | 2014-12-31 | 2016-06-30 | Hong Fu Jin Precision Industry (Wuhan) Co., Ltd. | Electrical current magnitude indicator |
-
2012
- 2012-11-30 CN CN 201220659526 patent/CN203084160U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20160187391A1 (en) * | 2014-12-31 | 2016-06-30 | Hong Fu Jin Precision Industry (Wuhan) Co., Ltd. | Electrical current magnitude indicator |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130724 Termination date: 20131130 |