CN201796083U - Digital voltmeter - Google Patents
Digital voltmeter Download PDFInfo
- Publication number
- CN201796083U CN201796083U CN2010202609702U CN201020260970U CN201796083U CN 201796083 U CN201796083 U CN 201796083U CN 2010202609702 U CN2010202609702 U CN 2010202609702U CN 201020260970 U CN201020260970 U CN 201020260970U CN 201796083 U CN201796083 U CN 201796083U
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- CN
- China
- Prior art keywords
- circuit
- data processing
- control circuit
- processing circuit
- fpga
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
The utility model discloses a digital voltmeter which is characterized by comprising an A/D (Analog to Digital) switching circuit, a data processing circuit, a data display circuit, an hour hand signal crystal oscillator source and a programmable logic control circuit. The output terminal of the A/D switching circuit is connected with the data processing circuit; the data processing circuit is connected with the data display circuit; the output terminal of the hour hand signal crystal oscillator source is connected with the programmable logic control circuit; and three output terminals of the programmable logic control circuit are respectively connected with the A/D switching circuit, the data processing circuit and the data display circuit. The A/D switching circuit adopts an ADC0804, and the programmable logic control circuit adopts an FPGA (Field Programmable Gate Array) device. The digital voltmeter has the advantages of high processing speed, wide application scope, high measuring accuracy and the like.
Description
Technical field
The utility model belongs to electronic technology field, relates to a kind of digital voltmeter.
Background technology
For many years, in field of measuring technique, measuring equipments such as various simulated pointer formula ammeters, pot, electric bridge and volt box are always in occupation of leading position.Though these instrument and meters have working stability, multiple advantage such as reliable, simple in structure, troublesome poeration, speed is slow, range ability is little, can not realize automatic measurement.This digital instrument has overcome these shortcomings, will obtain application more and more widely.
The utility model content
The technical problems to be solved in the utility model provides a kind of digital voltmeter.
The utility model is to solve the problems of the technologies described above the technical scheme that is adopted to be:
A kind of digital voltmeter is characterized in that, described voltage table comprises A/D change-over circuit, data processing circuit, data display circuit, hour hands signal crystal oscillator source, FPGA (Field Programmable Gate Array) control circuit.The output terminal of described A/D change-over circuit connects data processing circuit, described data processing circuit connects data display circuit, the output terminal in described hour hands signal crystal oscillator source connects the FPGA (Field Programmable Gate Array) control circuit, and three output terminals of described logic control circuit connect A/D change-over circuit, data processing circuit and data display circuit respectively.
Described A/D change-over circuit adopts ADC0804.
Described FPGA (Field Programmable Gate Array) control circuit adopts the FPGA device.
The beneficial effects of the utility model have:
The utility model accuracy height, measurement range are wide, highly sensitive, measuring speed fast, defeated put the impedance height, easy to use, handled easily is simple, antijamming capability is strong, automaticity is high, the characteristics of clear reading, intuitive and convenient.
Description of drawings
Fig. 1 is the connection block diagram of the digital voltmeter of the utility model embodiment 1.
Embodiment
The utility model is described in further detail below in conjunction with the drawings and specific embodiments.
Embodiment 1:
As shown in Figure 1, described voltage table comprises ADC0804, data processing circuit, data display circuit, hour hands signal crystal oscillator source, FPGA device.The output terminal of described ADC0804 connects data processing circuit, described data processing circuit connects data display circuit, the output terminal in described hour hands signal crystal oscillator source connects the input end of FPGA device, and three output terminals of described FPGA device connect ADC0804, data processing circuit and data display circuit respectively.
The principle of work of this Direct Conversion Receiver is as follows: when work, system is by the aanalogvoltage of certain speed collection input, the aanalogvoltage that to gather input then is through ADC0804 conversion back output 8 bit digital quantity, again this 8 bit digital quantity is input to data processing circuit, through obtaining the polar code and the numerical code of aanalogvoltage after the data processing circuit processing, the polar code and the numerical code of aanalogvoltage are input in the display circuit, just can obtain the demonstration of tested voltage by display circuit.
Control module produces the control signal that activates A/D converter, data processing module, display module.
Data processing module receives the digital conversion value that A/D converter passes over, and the conversion value that receives is adjusted to corresponding digital signal.
Display module is translated into corresponding 7 hop count sign indicating number motivation values with the binary-coded decimal of numerical value processing module output.
For 8 ADC0804, the accurate position of the output of optic nerve has 2
8=256 kinds, the resolution that is it is 1/256, suppose input signal Vin for-24V～+ the 24V voltage range, then its minimum output voltage is 48V/256=0.1875V, minimum voltage value that ADC0804 can change that Here it is also is the minimum voltage value of this voltage table institute energy measurement.
Claims (1)
1. digital voltmeter, it is characterized in that, described voltage table comprises the A/D change-over circuit, data processing circuit, data display circuit, hour hands signal crystal oscillator source, the FPGA (Field Programmable Gate Array) control circuit, the output terminal of described A/D change-over circuit connects data processing circuit, described data processing circuit connects data display circuit, the output terminal in described hour hands signal crystal oscillator source connects the FPGA (Field Programmable Gate Array) control circuit, three output terminals of described logic control circuit connect the A/D change-over circuit respectively, data processing circuit and data display circuit, described A/D change-over circuit adopts ADC0804, and described FPGA (Field Programmable Gate Array) control circuit adopts the FPGA device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202609702U CN201796083U (en) | 2010-07-16 | 2010-07-16 | Digital voltmeter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202609702U CN201796083U (en) | 2010-07-16 | 2010-07-16 | Digital voltmeter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201796083U true CN201796083U (en) | 2011-04-13 |
Family
ID=43850989
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010202609702U Expired - Fee Related CN201796083U (en) | 2010-07-16 | 2010-07-16 | Digital voltmeter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201796083U (en) |
-
2010
- 2010-07-16 CN CN2010202609702U patent/CN201796083U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110413 Termination date: 20110716 |