CN1577633A - 自集成芯片读出缺陷信息项之方法及集成存储芯片 - Google Patents
自集成芯片读出缺陷信息项之方法及集成存储芯片 Download PDFInfo
- Publication number
- CN1577633A CN1577633A CN200410069825.5A CN200410069825A CN1577633A CN 1577633 A CN1577633 A CN 1577633A CN 200410069825 A CN200410069825 A CN 200410069825A CN 1577633 A CN1577633 A CN 1577633A
- Authority
- CN
- China
- Prior art keywords
- defect information
- information item
- word line
- storage unit
- defect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
- G01R31/31935—Storing data, e.g. failure memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C2029/1208—Error catch memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C2029/4402—Internal storage of test result, quality data, chip identification, repair information
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
- Dram (AREA)
Abstract
Description
Claims (8)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10331068.1 | 2003-07-09 | ||
DE10331068A DE10331068A1 (de) | 2003-07-09 | 2003-07-09 | Verfahren zum Auslesen von Fehlerinformationen aus einem integrierten Baustein und integrierter Speicherbaustein |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1577633A true CN1577633A (zh) | 2005-02-09 |
CN100492546C CN100492546C (zh) | 2009-05-27 |
Family
ID=34071603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100698255A Expired - Fee Related CN100492546C (zh) | 2003-07-09 | 2004-07-09 | 自集成芯片读出缺陷信息项之方法及集成存储芯片 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7038956B2 (zh) |
CN (1) | CN100492546C (zh) |
DE (1) | DE10331068A1 (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8108607B2 (en) | 2005-09-26 | 2012-01-31 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
CN101071631B (zh) * | 2006-03-21 | 2012-06-13 | 奇梦达股份公司 | 用于后端测试的多个存储库读取和数据压缩的方法和设备 |
CN101887743B (zh) * | 2005-09-26 | 2013-02-20 | 拉姆伯斯公司 | 在矩阵拓扑中包括多个集成电路存储器器件和多个缓冲器器件的存储器模块 |
US11328764B2 (en) | 2005-09-26 | 2022-05-10 | Rambus Inc. | Memory system topologies including a memory die stack |
WO2023168847A1 (zh) * | 2022-03-11 | 2023-09-14 | 长鑫存储技术有限公司 | 存储器芯片的测试电路及测试方法 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7162669B2 (en) * | 2003-06-10 | 2007-01-09 | Hewlett-Packard Development Company, L.P. | Apparatus and method for compressing redundancy information for embedded memories, including cache memories, of integrated circuits |
KR100555532B1 (ko) * | 2003-11-27 | 2006-03-03 | 삼성전자주식회사 | 메모리 테스트 회로 및 테스트 시스템 |
JP2006107590A (ja) * | 2004-10-04 | 2006-04-20 | Nec Electronics Corp | 半導体集積回路装置及びそのテスト方法 |
US20070022349A1 (en) * | 2005-07-07 | 2007-01-25 | Agilent Technologies, Inc. | Test apparatus with tester channel availability identification |
US10510431B2 (en) | 2017-09-22 | 2019-12-17 | Qualcomm Incorporated | Detecting random telegraph noise defects in memory |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4389715A (en) * | 1980-10-06 | 1983-06-21 | Inmos Corporation | Redundancy scheme for a dynamic RAM |
JPS59180898A (ja) * | 1983-03-31 | 1984-10-15 | Hitachi Ltd | 不良ビット救済方法 |
FR2611301B1 (fr) * | 1987-02-24 | 1989-04-21 | Thomson Semiconducteurs | Memoire integree avec redondance de colonnes de donnees |
EP0424612A3 (en) * | 1989-08-30 | 1992-03-11 | International Business Machines Corporation | Apparatus and method for real time data error capture and compression for redundancy analysis of a memory |
US6026505A (en) * | 1991-10-16 | 2000-02-15 | International Business Machines Corporation | Method and apparatus for real time two dimensional redundancy allocation |
US5457656A (en) * | 1994-08-17 | 1995-10-10 | United Microelectronics Corp. | Zero static power memory device redundancy circuitry |
US5996106A (en) * | 1997-02-04 | 1999-11-30 | Micron Technology, Inc. | Multi bank test mode for memory devices |
JP3558252B2 (ja) * | 1997-11-10 | 2004-08-25 | 株式会社アドバンテスト | 半導体メモリ試験装置 |
JP4519208B2 (ja) * | 1998-03-03 | 2010-08-04 | 株式会社東芝 | 半導体記憶装置 |
DE19922786B4 (de) * | 1999-05-18 | 2006-06-08 | Infineon Technologies Ag | Halbleiterspeicher mit Testeinrichtung |
US6421794B1 (en) * | 2000-03-09 | 2002-07-16 | John T. Chen | Method and apparatus for diagnosing memory using self-testing circuits |
JP3822412B2 (ja) * | 2000-03-28 | 2006-09-20 | 株式会社東芝 | 半導体記憶装置 |
DE10229802B3 (de) * | 2002-07-03 | 2004-01-08 | Infineon Technologies Ag | Testschaltung und Verfahren zum Testen einer integrierten Speicherschaltung |
US6886119B2 (en) * | 2002-09-04 | 2005-04-26 | Agere Systems Inc. | Method and apparatus for improved integrated circuit memory testing |
-
2003
- 2003-07-09 DE DE10331068A patent/DE10331068A1/de not_active Withdrawn
-
2004
- 2004-07-09 US US10/888,649 patent/US7038956B2/en not_active Expired - Fee Related
- 2004-07-09 CN CNB2004100698255A patent/CN100492546C/zh not_active Expired - Fee Related
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9865329B2 (en) | 2005-09-26 | 2018-01-09 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
US8108607B2 (en) | 2005-09-26 | 2012-01-31 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
CN101887743B (zh) * | 2005-09-26 | 2013-02-20 | 拉姆伯斯公司 | 在矩阵拓扑中包括多个集成电路存储器器件和多个缓冲器器件的存储器模块 |
US8539152B2 (en) | 2005-09-26 | 2013-09-17 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
US9117035B2 (en) | 2005-09-26 | 2015-08-25 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
US9563583B2 (en) | 2005-09-26 | 2017-02-07 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
US11727982B2 (en) | 2005-09-26 | 2023-08-15 | Rambus Inc. | Memory system topologies including a memory die stack |
US10381067B2 (en) | 2005-09-26 | 2019-08-13 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
US11043258B2 (en) | 2005-09-26 | 2021-06-22 | Rambus Inc. | Memory system topologies including a memory die stack |
US10672458B1 (en) | 2005-09-26 | 2020-06-02 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
US10535398B2 (en) | 2005-09-26 | 2020-01-14 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
US11328764B2 (en) | 2005-09-26 | 2022-05-10 | Rambus Inc. | Memory system topologies including a memory die stack |
CN101071631B (zh) * | 2006-03-21 | 2012-06-13 | 奇梦达股份公司 | 用于后端测试的多个存储库读取和数据压缩的方法和设备 |
WO2023168847A1 (zh) * | 2022-03-11 | 2023-09-14 | 长鑫存储技术有限公司 | 存储器芯片的测试电路及测试方法 |
Also Published As
Publication number | Publication date |
---|---|
US7038956B2 (en) | 2006-05-02 |
US20050030822A1 (en) | 2005-02-10 |
CN100492546C (zh) | 2009-05-27 |
DE10331068A1 (de) | 2005-02-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
C56 | Change in the name or address of the patentee | ||
CP01 | Change in the name or title of a patent holder |
Address after: Munich, Germany Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: INFINEON TECHNOLOGIES AG |
|
TR01 | Transfer of patent right |
Effective date of registration: 20120917 Address after: Munich, Germany Patentee after: QIMONDA AG Address before: Munich, Germany Patentee before: Infineon Technologies AG |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20151223 Address after: German Berg, Laura Ibiza Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: QIMONDA AG |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090527 Termination date: 20170709 |
|
CF01 | Termination of patent right due to non-payment of annual fee |