CN1230739C - 用于执行堆栈操作的装置和方法以及用于产生地址的装置 - Google Patents
用于执行堆栈操作的装置和方法以及用于产生地址的装置 Download PDFInfo
- Publication number
- CN1230739C CN1230739C CNB001329375A CN00132937A CN1230739C CN 1230739 C CN1230739 C CN 1230739C CN B001329375 A CNB001329375 A CN B001329375A CN 00132937 A CN00132937 A CN 00132937A CN 1230739 C CN1230739 C CN 1230739C
- Authority
- CN
- China
- Prior art keywords
- stack pointer
- pointer
- stack
- updated
- memory location
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30163—Decoding the operand specifier, e.g. specifier format with implied specifier, e.g. top of stack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
- G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4482—Procedural
- G06F9/4484—Executing subprograms
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Executing Machine-Instructions (AREA)
Abstract
Description
Claims (7)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/436,891 US6654871B1 (en) | 1999-11-09 | 1999-11-09 | Device and a method for performing stack operations in a processing system |
US09/436,891 | 1999-11-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1295279A CN1295279A (zh) | 2001-05-16 |
CN1230739C true CN1230739C (zh) | 2005-12-07 |
Family
ID=23734241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB001329375A Expired - Fee Related CN1230739C (zh) | 1999-11-09 | 2000-11-08 | 用于执行堆栈操作的装置和方法以及用于产生地址的装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6654871B1 (zh) |
JP (1) | JP2001184211A (zh) |
KR (1) | KR100875377B1 (zh) |
CN (1) | CN1230739C (zh) |
TW (1) | TW535089B (zh) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10121745A1 (de) * | 2001-05-04 | 2002-11-14 | Systemonic Ag | Verfahren und Anordnung zu einem Stack mit einem, in Datengruppen mit mehreren Elementen aufgeteilten Speicher |
IL152006A0 (en) * | 2002-09-30 | 2003-07-31 | Rabintex Ind Ltd | Shell for ballistic helmet |
CN100353335C (zh) * | 2003-03-28 | 2007-12-05 | 联发科技股份有限公司 | 增加处理器中存储器的方法 |
US7111149B2 (en) * | 2003-07-07 | 2006-09-19 | Intel Corporation | Method and apparatus for generating a device ID for stacked devices |
WO2005096136A1 (en) * | 2004-03-31 | 2005-10-13 | Intel Corporation | Stack caching using code sharing |
US7290153B2 (en) | 2004-11-08 | 2007-10-30 | Via Technologies, Inc. | System, method, and apparatus for reducing power consumption in a microprocessor |
JP2006309508A (ja) * | 2005-04-28 | 2006-11-09 | Oki Electric Ind Co Ltd | スタック制御装置およびその方法 |
US7769983B2 (en) * | 2005-05-18 | 2010-08-03 | Qualcomm Incorporated | Caching instructions for a multiple-state processor |
US7454572B2 (en) * | 2005-11-08 | 2008-11-18 | Mediatek Inc. | Stack caching systems and methods with an active swapping mechanism |
US7647482B2 (en) * | 2006-03-31 | 2010-01-12 | Intel Corporation | Methods and apparatus for dynamic register scratching |
US7711927B2 (en) * | 2007-03-14 | 2010-05-04 | Qualcomm Incorporated | System, method and software to preload instructions from an instruction set other than one currently executing |
EP2150889A1 (en) * | 2007-04-10 | 2010-02-10 | Cambridge Consultants Limited | Data processing apparatus |
US8055886B2 (en) * | 2007-07-12 | 2011-11-08 | Texas Instruments Incorporated | Processor micro-architecture for compute, save or restore multiple registers and responsive to first instruction for repeated issue of second instruction |
JP5044387B2 (ja) * | 2007-12-26 | 2012-10-10 | ルネサスエレクトロニクス株式会社 | 情報処理装置及びそのスタックポインタ更新方法 |
WO2010004242A2 (en) | 2008-07-10 | 2010-01-14 | Cambridge Consultants Limited | Data processing apparatus, for example using vector pointers |
US9910823B2 (en) | 2011-05-16 | 2018-03-06 | Cypress Semiconductor Corporation | Stack processor using a ferroelectric random access memory (F-RAM) having an instruction set optimized to minimize memory fetch |
US9588881B2 (en) * | 2011-05-16 | 2017-03-07 | Cypress Semiconductor Corporation | Stack processor using a ferroelectric random access memory (F-RAM) for code space and a portion of the stack memory space having an instruction set optimized to minimize processor stack accesses |
US8934279B2 (en) * | 2011-05-16 | 2015-01-13 | Cypress Semiconductor Corporation | Stack processor using a ferroelectric random access memory (F-RAM) for code space and a portion of the stack memory space |
US9697002B2 (en) * | 2011-10-03 | 2017-07-04 | International Business Machines Corporation | Computer instructions for activating and deactivating operands |
CN112486897B (zh) * | 2019-09-11 | 2024-07-09 | 中国科学院微电子研究所 | 一种高速缓存***及单周期多数据的入栈、出栈操作方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58221446A (ja) * | 1982-06-18 | 1983-12-23 | Hitachi Ltd | スタツクアドレス選択方式 |
JPS62128337A (ja) * | 1985-11-30 | 1987-06-10 | Nec Corp | スタツク制御方式 |
US5142635A (en) | 1989-04-07 | 1992-08-25 | Intel Corporation | Method and circuitry for performing multiple stack operations in succession in a pipelined digital computer |
JPH0752576B2 (ja) | 1990-07-19 | 1995-06-05 | 株式会社東芝 | スタックメモリ |
US5381360A (en) * | 1993-09-27 | 1995-01-10 | Hitachi America, Ltd. | Modulo arithmetic addressing circuit |
US5706491A (en) | 1994-10-18 | 1998-01-06 | Cyrix Corporation | Branch processing unit with a return stack including repair using pointers from different pipe stages |
EP0772818A1 (en) * | 1995-05-26 | 1997-05-14 | National Semiconductor Corporation | Apparatus and method for executing pop instructions |
US5687336A (en) | 1996-01-11 | 1997-11-11 | Exponential Technology, Inc. | Stack push/pop tracking and pairing in a pipelined processor |
KR100246465B1 (ko) * | 1996-11-06 | 2000-03-15 | 김영환 | 마이크로프로세서 스택 명령어의 수행사이클을 줄이기 위한 장치 및 그 방법 |
US5958039A (en) * | 1997-10-28 | 1999-09-28 | Microchip Technology Incorporated | Master-slave latches and post increment/decrement operations |
-
1999
- 1999-11-09 US US09/436,891 patent/US6654871B1/en not_active Expired - Lifetime
-
2000
- 2000-10-20 TW TW089122103A patent/TW535089B/zh not_active IP Right Cessation
- 2000-11-07 JP JP2000338990A patent/JP2001184211A/ja active Pending
- 2000-11-08 KR KR1020000066072A patent/KR100875377B1/ko active IP Right Grant
- 2000-11-08 CN CNB001329375A patent/CN1230739C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100875377B1 (ko) | 2008-12-23 |
US6654871B1 (en) | 2003-11-25 |
JP2001184211A (ja) | 2001-07-06 |
CN1295279A (zh) | 2001-05-16 |
TW535089B (en) | 2003-06-01 |
KR20010051522A (ko) | 2001-06-25 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FREEDOM SEMICONDUCTORS CO. Free format text: FORMER OWNER: MOTOROLA, INC. Effective date: 20040806 |
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C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20040806 Address after: Texas in the United States Applicant after: FreeScale Semiconductor Address before: Illinois Instrunment Applicant before: Motorola, Inc. |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20051207 Termination date: 20131108 |