CN1208726C - 当预测路线失败时从非预测路线提供部分标记以指导搜索的高速缓存 - Google Patents
当预测路线失败时从非预测路线提供部分标记以指导搜索的高速缓存 Download PDFInfo
- Publication number
- CN1208726C CN1208726C CNB008180385A CN00818038A CN1208726C CN 1208726 C CN1208726 C CN 1208726C CN B008180385 A CNB008180385 A CN B008180385A CN 00818038 A CN00818038 A CN 00818038A CN 1208726 C CN1208726 C CN 1208726C
- Authority
- CN
- China
- Prior art keywords
- route
- address
- mark
- speed cache
- prediction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000004044 response Effects 0.000 claims abstract description 35
- 238000000034 method Methods 0.000 claims description 14
- 230000008878 coupling Effects 0.000 claims description 9
- 238000010168 coupling process Methods 0.000 claims description 9
- 238000005859 coupling reaction Methods 0.000 claims description 9
- 239000003550 marker Substances 0.000 claims description 9
- 238000001514 detection method Methods 0.000 claims description 3
- 230000013011 mating Effects 0.000 claims 1
- 238000012545 processing Methods 0.000 description 39
- 238000013507 mapping Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- 238000013461 design Methods 0.000 description 7
- 238000012790 confirmation Methods 0.000 description 6
- 238000002372 labelling Methods 0.000 description 6
- 101100118004 Arabidopsis thaliana EBP1 gene Proteins 0.000 description 5
- 101150052583 CALM1 gene Proteins 0.000 description 5
- 102100025580 Calmodulin-1 Human genes 0.000 description 5
- 101100459256 Cyprinus carpio myca gene Proteins 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 5
- 101150091339 cam-1 gene Proteins 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000007246 mechanism Effects 0.000 description 5
- 230000001419 dependent effect Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000006073 displacement reaction Methods 0.000 description 3
- 238000000802 evaporation-induced self-assembly Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 238000013519 translation Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000008520 organization Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 244000260524 Chrysanthemum balsamita Species 0.000 description 1
- 235000005633 Chrysanthemum balsamita Nutrition 0.000 description 1
- 206010027476 Metastases Diseases 0.000 description 1
- 235000012364 Peperomia pellucida Nutrition 0.000 description 1
- 240000007711 Peperomia pellucida Species 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 238000013467 fragmentation Methods 0.000 description 1
- 238000006062 fragmentation reaction Methods 0.000 description 1
- 230000003760 hair shine Effects 0.000 description 1
- 239000003999 initiator Substances 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 230000009401 metastasis Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 239000013598 vector Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/383—Operand prefetching
- G06F9/3832—Value prediction for operands; operand history buffers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/608—Details relating to cache mapping
- G06F2212/6082—Way prediction in set-associative cache
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/476,577 | 2000-01-03 | ||
US09/476,577 US6687789B1 (en) | 2000-01-03 | 2000-01-03 | Cache which provides partial tags from non-predicted ways to direct search if way prediction misses |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1415092A CN1415092A (zh) | 2003-04-30 |
CN1208726C true CN1208726C (zh) | 2005-06-29 |
Family
ID=23892412
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB008180385A Expired - Lifetime CN1208726C (zh) | 2000-01-03 | 2000-08-08 | 当预测路线失败时从非预测路线提供部分标记以指导搜索的高速缓存 |
Country Status (7)
Country | Link |
---|---|
US (1) | US6687789B1 (zh) |
EP (1) | EP1244970B1 (zh) |
JP (1) | JP2003519835A (zh) |
KR (1) | KR100747127B1 (zh) |
CN (1) | CN1208726C (zh) |
DE (1) | DE60003235T2 (zh) |
WO (1) | WO2001050272A1 (zh) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4027620B2 (ja) * | 2001-06-20 | 2007-12-26 | 富士通株式会社 | 分岐予測装置、プロセッサ、及び分岐予測方法 |
US6944713B2 (en) * | 2002-06-18 | 2005-09-13 | Intel Corporation | Low power set associative cache |
US20040054867A1 (en) * | 2002-09-13 | 2004-03-18 | Paulus Stravers | Translation lookaside buffer |
US6973557B2 (en) * | 2003-02-04 | 2005-12-06 | Sun Microsystems, Inc. | Apparatus and method for dual access to a banked and pipelined data cache memory unit |
US20040181626A1 (en) * | 2003-03-13 | 2004-09-16 | Pickett James K. | Partial linearly tagged cache memory system |
TWI246658B (en) * | 2003-04-25 | 2006-01-01 | Ip First Llc | Microprocessor, apparatus and method for selectively associating store buffer cache line status with response buffer cache line status |
US20040243767A1 (en) * | 2003-06-02 | 2004-12-02 | Cierniak Michal J. | Method and apparatus for prefetching based upon type identifier tags |
US20050050278A1 (en) * | 2003-09-03 | 2005-03-03 | Advanced Micro Devices, Inc. | Low power way-predicted cache |
US7117290B2 (en) * | 2003-09-03 | 2006-10-03 | Advanced Micro Devices, Inc. | MicroTLB and micro tag for reducing power in a processor |
US7085894B2 (en) * | 2003-09-11 | 2006-08-01 | International Business Machines Corporation | Selectively accepting cache content |
US6961276B2 (en) * | 2003-09-17 | 2005-11-01 | International Business Machines Corporation | Random access memory having an adaptable latency |
US7669009B2 (en) * | 2004-09-23 | 2010-02-23 | Intel Corporation | Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches |
KR100688503B1 (ko) * | 2004-11-02 | 2007-03-02 | 삼성전자주식회사 | 브랜치 목적 어드레스를 이용하여 캐쉬 웨이를 예측하는프로세서 및 그 방법 |
US7707387B2 (en) | 2005-06-01 | 2010-04-27 | Microsoft Corporation | Conditional execution via content addressable memory and parallel computing execution model |
US7793040B2 (en) * | 2005-06-01 | 2010-09-07 | Microsoft Corporation | Content addressable memory architecture |
US20060274787A1 (en) * | 2005-06-07 | 2006-12-07 | Fong Pong | Adaptive cache design for MPT/MTT tables and TCP context |
US20060277352A1 (en) * | 2005-06-07 | 2006-12-07 | Fong Pong | Method and system for supporting large caches with split and canonicalization tags |
US9946547B2 (en) | 2006-09-29 | 2018-04-17 | Arm Finance Overseas Limited | Load/store unit for a processor, and applications thereof |
US7594079B2 (en) * | 2006-09-29 | 2009-09-22 | Mips Technologies, Inc. | Data cache virtual hint way prediction, and applications thereof |
JP5326314B2 (ja) | 2008-03-21 | 2013-10-30 | 富士通株式会社 | プロセサおよび情報処理装置 |
US20100332762A1 (en) * | 2009-06-30 | 2010-12-30 | Moga Adrian C | Directory cache allocation based on snoop response information |
EP2492818A4 (en) * | 2009-10-20 | 2014-07-30 | Univ Electro Communications | CACHE-MEMORY AND ITS CONTROL METHOD |
US8392665B2 (en) | 2010-09-25 | 2013-03-05 | Intel Corporation | Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines |
CN102193875B (zh) * | 2011-04-26 | 2013-08-14 | 北京工业大学 | 多核下基于Cache划分的自适应路预测算法 |
US20120297256A1 (en) * | 2011-05-20 | 2012-11-22 | Qualcomm Incorporated | Large Ram Cache |
US8458447B2 (en) * | 2011-06-17 | 2013-06-04 | Freescale Semiconductor, Inc. | Branch target buffer addressing in a data processor |
US9460016B2 (en) | 2014-06-16 | 2016-10-04 | Analog Devices Global Hamilton | Cache way prediction |
KR102354990B1 (ko) * | 2014-09-17 | 2022-01-24 | 삼성전자주식회사 | 캐시 메모리 시스템 및 그 동작방법 |
US9846648B2 (en) * | 2015-05-11 | 2017-12-19 | Intel Corporation | Create page locality in cache controller cache allocation |
GB2553102B (en) * | 2016-08-19 | 2020-05-20 | Advanced Risc Mach Ltd | A memory unit and method of operation of a memory unit to handle operation requests |
US10324850B2 (en) | 2016-11-11 | 2019-06-18 | Microsoft Technology Licensing, Llc | Serial lookup of tag ways |
GB2560336B (en) * | 2017-03-07 | 2020-05-06 | Imagination Tech Ltd | Address generators for verifying integrated circuit hardware designs for cache memory |
US10565122B2 (en) | 2017-05-30 | 2020-02-18 | Microsoft Technology Licensing, Llc | Serial tag lookup with way-prediction |
US10545875B2 (en) | 2017-12-27 | 2020-01-28 | Advanced Micro Devices, Inc. | Tag accelerator for low latency DRAM cache |
US11507174B2 (en) * | 2020-02-25 | 2022-11-22 | Qualcomm Incorporated | System physical address size aware cache memory |
CN111988444B (zh) * | 2020-08-19 | 2022-10-18 | 成都安可信电子股份有限公司 | 一种同步总线快速搜索终端地址搜索方法 |
US11928472B2 (en) | 2020-09-26 | 2024-03-12 | Intel Corporation | Branch prefetch mechanisms for mitigating frontend branch resteers |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62293596A (ja) * | 1986-06-12 | 1987-12-21 | Matsushita Electric Ind Co Ltd | 連想記憶装置 |
US4914582A (en) | 1986-06-27 | 1990-04-03 | Hewlett-Packard Company | Cache tag lookaside |
JPS63163939A (ja) * | 1986-12-26 | 1988-07-07 | Nippon Telegr & Teleph Corp <Ntt> | キヤツシユメモリの制御方法 |
JPH02156352A (ja) * | 1988-12-09 | 1990-06-15 | Hitachi Ltd | キャッシュメモリ |
US5235697A (en) | 1990-06-29 | 1993-08-10 | Digital Equipment | Set prediction cache memory system using bits of the main memory address |
JPH05120135A (ja) * | 1991-10-25 | 1993-05-18 | Oki Electric Ind Co Ltd | キヤツシユ制御方式 |
US5418922A (en) | 1992-04-30 | 1995-05-23 | International Business Machines Corporation | History table for set prediction for accessing a set associative cache |
JPH0721785A (ja) * | 1993-06-29 | 1995-01-24 | Kawasaki Steel Corp | 半導体メモリ |
US5671444A (en) | 1994-02-28 | 1997-09-23 | Intel Corporaiton | Methods and apparatus for caching data in a non-blocking manner using a plurality of fill buffers |
EP0675443A1 (en) | 1994-03-30 | 1995-10-04 | Digital Equipment Corporation | Apparatus and method for accessing direct mapped cache |
JP3589485B2 (ja) * | 1994-06-07 | 2004-11-17 | 株式会社ルネサステクノロジ | セットアソシアティブ方式のメモリ装置およびプロセッサ |
US5732242A (en) * | 1995-03-24 | 1998-03-24 | Silicon Graphics, Inc. | Consistently specifying way destinations through prefetching hints |
JPH08263370A (ja) * | 1995-03-27 | 1996-10-11 | Toshiba Microelectron Corp | キャッシュメモリシステム |
US5752069A (en) | 1995-08-31 | 1998-05-12 | Advanced Micro Devices, Inc. | Superscalar microprocessor employing away prediction structure |
US5893146A (en) | 1995-08-31 | 1999-04-06 | Advanced Micro Design, Inc. | Cache structure having a reduced tag comparison to enable data transfer from said cache |
US5845323A (en) * | 1995-08-31 | 1998-12-01 | Advanced Micro Devices, Inc. | Way prediction structure for predicting the way of a cache in which an access hits, thereby speeding cache access time |
US5802594A (en) | 1995-09-06 | 1998-09-01 | Intel Corporation | Single phase pseudo-static instruction translation look-aside buffer |
WO1998020421A1 (en) | 1996-11-04 | 1998-05-14 | Advanced Micro Devices, Inc. | A way prediction structure |
US5848428A (en) | 1996-12-19 | 1998-12-08 | Compaq Computer Corporation | Sense amplifier decoding in a memory device to reduce power consumption |
JPH1139216A (ja) * | 1997-07-24 | 1999-02-12 | Hitachi Ltd | 半導体記憶装置及びキャッシュメモリシステム |
US5956746A (en) * | 1997-08-13 | 1999-09-21 | Intel Corporation | Computer system having tag information in a processor and cache memory |
US6016545A (en) | 1997-12-16 | 2000-01-18 | Advanced Micro Devices, Inc. | Reduced size storage apparatus for storing cache-line-related data in a high frequency microprocessor |
-
2000
- 2000-01-03 US US09/476,577 patent/US6687789B1/en not_active Expired - Lifetime
- 2000-08-08 JP JP2001550564A patent/JP2003519835A/ja active Pending
- 2000-08-08 CN CNB008180385A patent/CN1208726C/zh not_active Expired - Lifetime
- 2000-08-08 EP EP00951019A patent/EP1244970B1/en not_active Expired - Lifetime
- 2000-08-08 WO PCT/US2000/021756 patent/WO2001050272A1/en active IP Right Grant
- 2000-08-08 KR KR1020027008672A patent/KR100747127B1/ko not_active IP Right Cessation
- 2000-08-08 DE DE60003235T patent/DE60003235T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR20020067596A (ko) | 2002-08-22 |
DE60003235D1 (de) | 2003-07-10 |
CN1415092A (zh) | 2003-04-30 |
DE60003235T2 (de) | 2004-04-08 |
JP2003519835A (ja) | 2003-06-24 |
EP1244970A1 (en) | 2002-10-02 |
KR100747127B1 (ko) | 2007-08-09 |
WO2001050272A1 (en) | 2001-07-12 |
US6687789B1 (en) | 2004-02-03 |
EP1244970B1 (en) | 2003-06-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1208726C (zh) | 当预测路线失败时从非预测路线提供部分标记以指导搜索的高速缓存 | |
CN100414494C (zh) | 根据多组高速缓存组预测来选择执行的指令的装置和*** | |
US7024545B1 (en) | Hybrid branch prediction device with two levels of branch prediction cache | |
CN100485638C (zh) | 在处理器中用于减少功耗的微变换检测缓冲器及微标记符 | |
US6502185B1 (en) | Pipeline elements which verify predecode information | |
CN1287292C (zh) | 使用类型位跟踪二级高速缓存中储存的错误校正码及预解码位 | |
US6339822B1 (en) | Using padded instructions in a block-oriented cache | |
US6185675B1 (en) | Basic block oriented trace cache utilizing a basic block sequence buffer to indicate program order of cached basic blocks | |
US7003629B1 (en) | System and method of identifying liveness groups within traces stored in a trace cache | |
US8583894B2 (en) | Hybrid prefetch method and apparatus | |
US8156286B2 (en) | Processor and method for using an instruction hint to prevent hardware prefetch from using certain memory accesses in prefetch calculations | |
JPH1074166A (ja) | 多重レベル・ダイナミック・セット予測方法および装置 | |
US20070033385A1 (en) | Call return stack way prediction repair | |
US8694759B2 (en) | Generating predicted branch target address from two entries storing portions of target address based on static/dynamic indicator of branch instruction type | |
EP1290562A1 (en) | A translation lookaside buffer flush filter | |
US6453387B1 (en) | Fully associative translation lookaside buffer (TLB) including a least recently used (LRU) stack and implementing an LRU replacement strategy | |
CN100524202C (zh) | 利用改进指令目的地标记的数据处理***、处理器和方法 | |
KR20020039689A (ko) | 정렬정보를 캐쉬하는 장치 및 방법 | |
US11797308B2 (en) | Fetch stage handling of indirect jumps in a processor pipeline | |
US7694110B1 (en) | System and method of implementing microcode operations as subroutines | |
CN113760371A (zh) | 分支预测的方法及其微处理器以及数据处理*** |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: GLOBALFOUNDRIES Free format text: FORMER OWNER: ADVANCED MICRO DEVICES INC. Effective date: 20100705 |
|
C41 | Transfer of patent application or patent right or utility model | ||
COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: CALIFORNIA, THE UNITED STATES TO: CAYMAN ISLANDS, BRITISH |
|
TR01 | Transfer of patent right |
Effective date of registration: 20100705 Address after: Grand Cayman, Cayman Islands Patentee after: Globalfoundries Semiconductor Inc. Address before: American California Patentee before: Advanced Micro Devices Inc. |
|
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20050629 |