CN118266230A - Image pickup apparatus and camera system - Google Patents
Image pickup apparatus and camera system Download PDFInfo
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- CN118266230A CN118266230A CN202280076668.7A CN202280076668A CN118266230A CN 118266230 A CN118266230 A CN 118266230A CN 202280076668 A CN202280076668 A CN 202280076668A CN 118266230 A CN118266230 A CN 118266230A
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Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
The imaging device includes 1 st pixel and 2 nd pixel. The 1 st pixel includes: a1 st photoelectric conversion section that generates a signal charge by photoelectric conversion and has sensitivity in the 1 st invisible band; and a1 st signal detection circuit connected to the 1 st photoelectric conversion unit. The 2 nd pixel includes: a2 nd photoelectric conversion unit which generates signal charges by photoelectric conversion and has sensitivity in the 2 nd wavelength band; and a2 nd signal detection circuit connected to the 2 nd photoelectric conversion unit. The exposure period of the 2 nd photoelectric conversion portion does not overlap with the light emission period of the light which is generated by illumination and has a light emission peak in the 1 st band and is incident to the 1 st photoelectric conversion portion.
Description
Technical Field
The present disclosure relates to an imaging apparatus and a camera system.
Background
Conventionally, an image sensor using photoelectric conversion has been known. For example, CMOS (complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor)) type image sensors having photodiodes are widely used. CMOS image sensors have the advantage of low power consumption and access per pixel. In a CMOS image sensor, a so-called rolling shutter method, in which exposure and readout of signal charges are sequentially performed for each row of a pixel array, is generally applied as a signal readout method.
In the rolling shutter method, the start and end of exposure are different for each row of the pixel array. Therefore, when an object moving at a high speed is imaged, a distorted image may be obtained as an image of the object, or when a flash is used, a difference in brightness may occur in the image. For this reason, a so-called global shutter function is required in which the start and end of exposure are shared among all pixels in the pixel array.
For example, patent document 1 discloses the following method: in an image sensor having a laminated structure in which a circuit unit and a photoelectric conversion unit are separated from each other, a global shutter function is realized by controlling movement of signal charges from the photoelectric conversion unit to a charge accumulation region by changing a voltage supplied to the photoelectric conversion unit.
Patent document 2 discloses the following technique: by stacking a plurality of photoelectric conversion units, signals of respective colors can be extracted, and by separating circuits connected to the respective photoelectric conversion units, the respective signal readouts can be individually controlled.
Patent document 3 discloses the following technique: for the purpose of imaging visible light and near infrared light, photoelectric conversion layers are stacked, and signals from the respective photoelectric conversion layers are taken out individually.
Patent document 4 discloses an inspection method using visible light and near infrared light, and the like.
Prior art literature
Patent literature
Patent document 1: japanese patent No. 6202512
Patent document 2: U.S. Pat. No. 9277146 specification
Patent document 3: japanese patent laid-open publication No. 2019-186738
Patent document 4: U.S. patent application publication No. 2003/0059103 specification
Patent document 5: U.S. patent application publication No. 2007/0013798 specification
Patent document 6: japanese patent application laid-open No. 2010-232410
Patent document 7: japanese patent No. 5553727
Disclosure of Invention
Problems to be solved by the invention
In the present disclosure, an imaging device and a camera system are provided that can suppress degradation of image quality when a plurality of photoelectric conversion portions are provided.
Means for solving the problems
An image pickup device according to an embodiment of the present disclosure includes 1 st and 2 nd pixels. The 1 st pixel includes: a1 st photoelectric conversion section that generates a signal charge by photoelectric conversion and has sensitivity in the 1 st invisible band; and a1 st signal detection circuit connected to the 1 st photoelectric conversion unit. The 2 nd pixel includes: a2 nd photoelectric conversion unit which generates signal charges by photoelectric conversion and has sensitivity in the 2 nd wavelength band; and a2 nd signal detection circuit connected to the 2 nd photoelectric conversion unit. The exposure period of the 2 nd photoelectric conversion portion is not overlapped with the light emission period of the light which is generated by illumination and has a light emission peak in the 1 st band and is incident to the 1 st photoelectric conversion portion.
A camera system according to an embodiment of the present disclosure includes: the image pickup device; and an illumination device that emits light having a light emission peak in the 1 st band. The illumination device does not emit the light during the exposure of the 2 nd photoelectric conversion portion.
Effects of the invention
According to the present disclosure, an imaging device and a camera system capable of suppressing degradation of image quality can be provided.
Drawings
Fig. 1 is a block diagram showing an example of a functional configuration of a camera system according to the embodiment.
Fig. 2 is a schematic diagram showing a schematic configuration of the imaging device according to the embodiment.
Fig. 3A is a schematic diagram showing an exemplary circuit configuration of a pixel including the 1 st photoelectric conversion portion and a peripheral circuit in the image pickup device according to the embodiment.
Fig. 3B is a schematic diagram showing an exemplary circuit configuration of a pixel including the 2 nd photoelectric conversion portion and a peripheral circuit in the image pickup device according to the embodiment.
Fig. 4 is a cross-sectional view schematically showing an exemplary cross-sectional structure of a pixel in the image pickup device according to the embodiment.
Fig. 5 is a schematic diagram showing the configuration of another imaging apparatus according to the embodiment.
Fig. 6 is a diagram showing an example of an absorption spectrum in the photoelectric conversion layer containing tin naphthalocyanine.
Fig. 7A is a cross-sectional view schematically showing an example of the structure of the photoelectric conversion layer in the 1 st photoelectric conversion unit according to the embodiment.
Fig. 7B is a cross-sectional view schematically showing an example of the structure of the photoelectric conversion layer in the 2 nd photoelectric conversion unit according to the embodiment.
Fig. 8 is a graph showing an exemplary photocurrent characteristic of the photoelectric conversion layer according to the embodiment.
Fig. 9 is a diagram for explaining an example of the operation of the imaging device according to the embodiment.
Fig. 10 is a diagram for explaining a comparative example of the operation of the imaging apparatus.
Fig. 11 is a schematic diagram showing a schematic configuration of an imaging device according to modification 1.
Fig. 12 is a schematic diagram showing an exemplary circuit configuration of a pixel including a2 nd photoelectric conversion portion and a peripheral circuit in the image pickup device according to modification 2.
Fig. 13 is a cross-sectional view schematically showing an exemplary cross-sectional structure of a pixel in the image pickup device according to modification 2.
Fig. 14 is a diagram for explaining an example of the operation of the imaging device according to modification 2.
Detailed Description
(A pass by of one embodiment of the present disclosure)
Before explaining the embodiments of the present disclosure in detail, a pass of one mode of obtaining the present disclosure is explained. The present inventors have found that the following problems occur in an image pickup apparatus including a plurality of photoelectric conversion portions.
When the imaging device includes a plurality of photoelectric conversion units, the plurality of photoelectric conversion units include photoelectric conversion units having sensitivity in an invisible wavelength band, so that an image of invisible light can be obtained. The invisible image may be useful for theft prevention, inspection, or the like because information that cannot be confirmed by visible light can be acquired. On the other hand, when imaging light in an invisible wavelength band, the amount of ambient light may be insufficient, and for example, an illumination device may be used to irradiate an object with invisible illumination light and image the reflected light. However, when invisible illumination light is used, the invisible illumination light is also incident on a photoelectric conversion portion, among the plurality of photoelectric conversion portions, which is not used for capturing an image of the invisible illumination light. As a result, the following problems occur: an unexpected photoelectric conversion does not occur in the photoelectric conversion portion for capturing an invisible illumination light, resulting in degradation of image quality. For example, when the imaging device includes a photoelectric conversion portion having sensitivity in the near infrared band and a photoelectric conversion portion having sensitivity in the visible band, illumination light of near infrared rays is also incident on the photoelectric conversion portion having sensitivity in the visible band. Since the near infrared ray illumination light mostly has a component of visible light wavelength such as red in some parts, photoelectric conversion also occurs in a photoelectric conversion portion having sensitivity in the visible light band due to the near infrared ray illumination light. As a result, the amount of signal charge generated by the photoelectric conversion portion having sensitivity in the visible light band changes, color shift or the like occurs, and the quality of the obtained image deteriorates.
The present disclosure has been made based on such an insight, and provides an image pickup apparatus and a camera system capable of suppressing degradation of image quality due to invisible illumination light in an image pickup apparatus having a plurality of photoelectric conversion sections including a photoelectric conversion section having sensitivity in an invisible wavelength band. The following is a detailed description.
(Summary of the disclosure)
As an outline of the present disclosure, examples of an imaging apparatus and a camera system according to the present disclosure are shown below.
An imaging device according to claim 1 of the present disclosure includes a1 st pixel and a2 nd pixel. The 1 st pixel includes: a1 st photoelectric conversion section that generates a signal charge by photoelectric conversion and has sensitivity in the 1 st invisible band; and a1 st signal detection circuit connected to the 1 st photoelectric conversion unit. The 2 nd pixel includes: a2 nd photoelectric conversion unit which generates signal charges by photoelectric conversion and has sensitivity in the 2 nd wavelength band; and a2 nd signal detection circuit connected to the 2 nd photoelectric conversion unit. The exposure period of the 2 nd photoelectric conversion portion is not overlapped with the light emission period of the light which is generated by illumination and has a light emission peak in the 1 st band and is incident to the 1 st photoelectric conversion portion.
In such an imaging device, since light having a light emission peak in the 1 st wavelength band for imaging using the 1 st photoelectric conversion section, unexpected photoelectric conversion is likely to occur in the 2 nd photoelectric conversion section. By making the exposure period of the 2 nd photoelectric conversion portion and the light emission period of the light having the light emission peak in the 1 st wavelength band not overlap, even in the case where the light has a component that affects the photoelectric conversion of the 2 nd photoelectric conversion portion, unexpected signal charges are not generated in the 2 nd photoelectric conversion portion due to the light. This can suppress degradation of image quality.
For example, in the imaging device according to claim 2 of the present disclosure, in the imaging device according to claim 1, the 1 st pixel and the 2 nd pixel may be effective pixels, respectively.
In this way, the influence of the unexpected photoelectric conversion can be suppressed in the effective pixel directly affecting the output signal.
For example, in the imaging device according to claim 3 of the present disclosure, in the imaging device according to claim 1 or 2, the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit may be stacked.
Thus, a plurality of photoelectric conversion portions can be arranged in the same photosensitive region. Therefore, even when signals corresponding to a plurality of lights are output, the number of pixels can be increased, and image quality can be improved.
For example, in the imaging device according to claim 4 of the present disclosure, in the imaging device according to any one of claim 1 to claim 3, at least 1 voltage supply circuit may be further provided, and the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit may each include a pixel electrode, a counter electrode facing the pixel electrode, and a photoelectric conversion layer located between the pixel electrode and the counter electrode, and the sensitivity of at least one of the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit may be variable by changing a voltage applied between the pixel electrode and the counter electrode by the at least 1 voltage supply circuit.
Thus, the sensitivity at the time of image capturing using at least one of the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit can be adjusted by only changing the applied voltage.
For example, in the imaging device according to claim 5 of the present disclosure, in the imaging device according to claim 4, the at least one of the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit may be driven in a global shutter system in which an exposure period is defined by the change in the voltage applied between the pixel electrode and the counter electrode by the at least 1 voltage supply circuit.
This can suppress distortion of the image of the high-speed object at the time of image capturing using at least one of the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit.
For example, in the imaging device according to claim 6 of the present disclosure, in the imaging device according to claim 4, each of the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit may be driven in a global shutter system in which an exposure period is defined by the change in the voltage applied between the pixel electrode and the counter electrode by the at least 1 voltage supply circuit.
This can suppress distortion of the image of the high-speed object when the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit are used to perform image capturing.
For example, the imaging device according to claim 7 of the present disclosure may further include a 3 rd photoelectric conversion unit and a 3 rd signal detection circuit connected to the 3 rd photoelectric conversion unit in the imaging device according to any one of claim 1 to claim 6.
This can increase the types of signals that can be obtained by the photoelectric conversion units. For example, in the case of providing 3 photoelectric conversion portions, if each photoelectric conversion portion has sensitivity in each of red, green, and blue wavelength bands, a color image can be easily obtained. In the case where the imaging device further includes the 4 th photoelectric conversion unit, if each photoelectric conversion unit has sensitivity in the red, green, blue, and near infrared bands, a color image and a near infrared image can be easily obtained.
For example, in the imaging device according to claim 8 of the present disclosure, in the imaging device according to any one of claim 1 to claim 7, the 1 st band may be a band in the near infrared band, and the 2 nd band may be a band in the visible band.
Thus, a visible light image and a near infrared light image can be acquired by 1 imaging device.
For example, in the imaging device according to claim 9 of the present disclosure, in the imaging device according to claim 8, the exposure period of the 1 st photoelectric conversion unit may be shorter than the exposure period of the 2 nd photoelectric conversion unit.
Thereby, the exposure period for acquiring the near infrared image becomes short. The photoelectric conversion portion having sensitivity in the near infrared band is liable to generate dark current due to thermal excitation due to the narrow band gap of the photoelectric conversion material used. By shortening the exposure period for obtaining the near infrared image, even when dark current is easily generated, the influence of the dark current can be reduced, and deterioration of image quality can be suppressed.
For example, in the imaging device according to claim 10 of the present disclosure, in the imaging device according to any one of claim 1 to claim 7, the 1 st wavelength band may be a wavelength band within an ultraviolet wavelength band, and the 2 nd wavelength band may be a wavelength band within a visible light wavelength band.
Thus, a visible light image and an ultraviolet image can be obtained by 1 imaging device.
For example, in the imaging device according to claim 11 of the present disclosure, in the imaging device according to any one of claim 1 to claim 7, the 1 st band and the 2 nd band may be bands within a near infrared band.
Thus, images corresponding to near infrared rays having different wavelengths can be acquired by 1 imaging device.
For example, in the imaging device according to claim 12 of the present disclosure, in the imaging device according to any one of claim 1 to claim 11, the 2 nd photoelectric conversion unit may include a silicon photodiode.
This can simplify the structure of the imaging device.
A camera system according to claim 13 of the present disclosure includes: the imaging device according to any one of aspects 1 to 12; and an illumination device that emits light having a light emission peak in the 1 st wavelength band, the illumination device not emitting the light during the exposure of the 2 nd photoelectric conversion portion.
Thus, during the exposure period of the 2 nd photoelectric conversion portion, the light emitted from the illumination device does not enter the 2 nd photoelectric conversion portion, and thus no unexpected signal charge is generated in the 2 nd photoelectric conversion portion due to the light. Thus, light having a light emission peak in the 1 st wavelength band does not affect the output of an image captured by the 2 nd photoelectric conversion unit, and deterioration of image quality can be suppressed.
In the camera system according to claim 14 of the present disclosure, for example, in the camera system according to claim 13, the illumination device may emit the light in a period overlapping with an exposure period of the 1 st photoelectric conversion unit.
This allows the 1 st photoelectric conversion unit to capture the light emitted from the illumination device, thereby improving the quality of the captured image.
The present embodiment will be specifically described below with reference to the drawings.
The embodiments described below each show a general or specific example. The numerical values, shapes, materials, components, arrangement positions and connection modes of the components, steps, order of steps, and the like shown in the following embodiments are examples, and are not intended to limit the present disclosure. Among the components in the following embodiments, components not described in the independent claims are described as arbitrary components. In addition, each drawing is not necessarily shown in a strict manner. In each of the drawings, the same reference numerals are given to substantially the same components, and overlapping description may be omitted or simplified.
In the present specification, the terms indicating the relationship between elements and the terms indicating the shapes of the elements, and numerical ranges are not only expressions in strict sense, but also expressions that are substantially equivalent in terms of, for example, differences of several% degree.
In the present specification, the terms "upper" and "lower" are not used to refer to the upward direction (vertically upward) and the downward direction (vertically downward) in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the lamination order in the lamination structure. Specifically, the light receiving side of the imaging device is set to be "upper", and the opposite side to the light receiving side is set to be "lower". The terms "upper" and "lower" are merely used to designate the mutual arrangement of the components, and are not intended to limit the posture of the imaging device when in use. The terms "upper" and "lower" are applied not only to the case where 2 components are arranged with a space therebetween and there are other components between 2 components, but also to the case where 2 components are arranged in close contact with each other and 2 components are in contact with each other.
(Embodiment)
Hereinafter, an imaging device according to the present embodiment and a camera system including the imaging device and the illumination device will be described.
[ Camera System ]
First, a camera system according to the present embodiment will be described. Fig. 1 is a block diagram showing an example of the functional configuration of a camera system according to the present embodiment.
As shown in fig. 1, the camera system 1 includes an imaging device 100, an illumination device 200, and a control unit 300.
In the camera system 1, illumination light 602 emitted by the illumination apparatus 200 is reflected by the object 600. The reflected light 604 generated by the illumination light 602 being reflected by the object 600 is converted into electric charges by the photoelectric conversion portion of the image pickup device 100, and is extracted as an electric signal and picked up.
In the example shown in fig. 1, the imaging device 100, the illumination device 200, and the control unit 300 are shown as different functional blocks, but 2 or more of the imaging device 100, the illumination device 200, and the control unit 300 may be integrated. For example, the imaging device 100 may be provided with the illumination device 200.
The image pickup device 100 converts light incident on the camera system 1 into an electrical signal and outputs an image (image signal). The imaging device 100 includes a1 st photoelectric conversion unit 13a and a2 nd photoelectric conversion unit 13b. The 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b are, for example, photoelectric conversion elements, respectively. For example, light generated by illumination enters the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b. In the example shown in fig. 1, the light generated by illumination, which is incident on the 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b, is mainly reflected light generated by reflection of the object by illumination light emitted from the illumination device 200. The 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b generate signal charges by photoelectric conversion, respectively. The signal corresponding to the amount of the signal charge generated by each of the 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b is read out and output as an image signal from the image pickup device 100.
The 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b have sensitivity in, for example, mutually different wavelength bands. The 1 st photoelectric conversion portion 13a has sensitivity in the 1 st wavelength band which is invisible. The 2 nd photoelectric conversion portion 13b has sensitivity in the 2 nd band. The detailed configuration of the imaging device 100 will be described later. In the present specification, having sensitivity at a certain wavelength means that the external quantum efficiency at a certain wavelength is 1% or more.
The illumination device 200 irradiates illumination light to an object. The illumination device 200 emits at least light having a light emission peak in the 1 st wavelength band having sensitivity in the 1 st photoelectric conversion portion 13a as illumination light. The lighting device 200 has, for example, a 1 st light source 210a and a 2 nd light source 210b.
The 1 st light source 210a emits light including a component having a wavelength of at least a part of the 1 st wavelength band of which the 1 st photoelectric conversion portion 13a has sensitivity, for example. The 1 st light source 210a emits light having a light emission peak in the 1 st wavelength band, for example.
The 2 nd light source 210b emits light including a component having a wavelength of at least a part of the 2 nd wavelength band of which the 2 nd photoelectric conversion portion 13b has sensitivity, for example. The 2 nd light source 210b emits light having a light emission peak in the 2 nd wavelength band, for example.
The types of light sources used as the 1 st light source 210a and the 2 nd light source 210b are not particularly limited as long as they can emit light of a desired wavelength. The 1 st light source 210a and the 2 nd light source 210b are, for example, a halogen light source, an LED (LIGHT EMITTING Diode) light source, an organic EL (electroluminescence (Electro Luminescence)) light source, a laser Diode light source, or the like, respectively. In addition, a plurality of light sources having different emission wavelengths may be used in combination for the 1 st light source 210a and the 2 nd light source 210b.
The 1 st band is an invisible band as described above, and is, for example, a band included in an ultraviolet band or a near infrared band. Therefore, since the 1 st photoelectric conversion unit 13a can capture an image by using invisible light such as ultraviolet light or near infrared light, an image useful for anti-theft, inspection, or the like can be obtained. The 2 nd band is, for example, a band included in any one of an ultraviolet band, a visible light band, and a near infrared band. The 1 st photoelectric conversion unit 13a may have sensitivity in wavelengths other than the 1 st wavelength band. The 2 nd photoelectric conversion portion 13b may have sensitivity in wavelengths other than the 2 nd wavelength band.
Specifically, the 1 st band is a band in the near infrared band, and the 2 nd band is a band in the visible band. Accordingly, the 1 st light source 210a emits light having a light emission peak in the near infrared band. In addition, the 2 nd light source 210b emits light having a light emission peak in the visible light band. In this case, the 1 st light source 210a emits light, which is converted by the 1 st photoelectric conversion unit 13a having sensitivity in the near infrared band, and extracted and imaged as an electrical signal. The light emitted from the 2 nd light source 210b is converted by the 2 nd photoelectric conversion portion 13b having sensitivity in the visible light band, extracted as an electric signal, and imaged. This makes it possible to realize the imaging device 100 that extracts signals corresponding to visible light and near infrared light separately. Thus, for example, a visible light image and a near infrared image can be acquired.
In the present specification, the near infrared band means, for example, a band of 680nm to 3000 nm. The near infrared ray band may be a band of 700nm or more and 2000nm or less, or a band of 700nm or more and 1600nm or less. The visible light band is, for example, a band of 380nm or more and less than 680 nm. The ultraviolet band may be, for example, a band of 100nm or more and less than 380nm, or a band of 200nm or more and less than 380 nm. In this specification, electromagnetic waves including visible light, infrared light, and ultraviolet light are collectively referred to as "light" for convenience.
For example, the 1 st band may be a band in the ultraviolet band, and the 2 nd band may be a band in the visible band. This makes it possible to realize the imaging device 100 that extracts signals corresponding to visible light and ultraviolet light separately. Thus, for example, a visible light image and an ultraviolet image can be obtained.
For example, the 1 st band and the 2 nd band may be bands in the near infrared band. This makes it possible to realize the imaging device 100 that separately extracts signals corresponding to near infrared rays having different wavelengths. Therefore, for example, near infrared images of 2 kinds having different wavelengths can be obtained. For example, by generating a difference image using such 2 kinds of near infrared images, a near infrared image in which the influence of absorption of ambient light or moisture is reduced can be obtained.
In the case where at least one of the 1 st and 2 nd bands is a band in the near infrared band, the at least one band may be a band in a range of 820nm to 980 nm. Thus, as a light source of the illumination device 200 for irradiating illumination light, an inexpensive LED light source having an emission peak of 820nm or more and 980nm or less can be used.
The number of light sources included in the lighting device 200 is not limited to 2, and may be1 or 3 or more. For example, the lighting device 200 may be configured to include only the 1 st light source 210a as the light source. In this case, for example, the 2 nd photoelectric conversion portion 13b converts ambient light or reflected light from an external light source, which is reflected by an object, into electric charges. The 1 st light source 210a and the 2 nd light source 210b may not be provided in 1 lighting device, and the camera system 1 may include a plurality of lighting devices including a lighting device having the 1 st light source 210a and a lighting device having the 2 nd light source 210 b. The camera system 1 may not include the illumination device 200.
The control unit 300 is a control circuit that controls the operations of the imaging device 100 and the illumination device 200. The control unit 300 outputs various driving signals to the imaging device 100 and the illumination device 200, for example. The control unit 300 is implemented by a microcomputer, for example. The functions of the control unit 300 may be realized by a combination of a general-purpose processing circuit and software, or may be realized by hardware dedicated to such processing.
At least a part of the functions of the control unit 300, for example, a function of controlling the driving of the image pickup device 100 may be included in the image pickup device 100. That is, the control unit 300 may be provided as a control circuit or the like in the image pickup apparatus 100. Accordingly, the driving of peripheral circuits and pixels of the image pickup apparatus 100 described later may be performed under the control of the control unit 300 provided outside the image pickup apparatus 100, or under the control of a control circuit (control unit 300) provided in the image pickup apparatus 100.
[ Image pickup device ]
Next, details of the imaging device according to the present embodiment will be described.
Fig. 2 is a schematic diagram showing a schematic configuration of the imaging device according to the present embodiment. Fig. 2 schematically illustrates a photoelectric conversion unit of each pixel of the image pickup device 100 according to the present embodiment and a signal detection circuit connected thereto.
As shown in fig. 2, the image pickup apparatus 100 includes a 1 st photoelectric conversion unit 13a, a signal detection circuit 14a connected to the 1 st photoelectric conversion unit 13a, a 2 nd photoelectric conversion unit 13b, a signal detection circuit 14b connected to the 2 nd photoelectric conversion unit 13b, and a semiconductor substrate 20 provided with the signal detection circuit 14a and the signal detection circuit 14 b. The signal detection circuit 14a is an example of the 1 st signal detection circuit. The signal detection circuit 14b is an example of the 2 nd signal detection circuit.
The 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b are stacked above the semiconductor substrate 20. Thus, a plurality of photoelectric conversion portions can be arranged in the same photosensitive region. Therefore, even when signals corresponding to a plurality of lights are output, the number of pixels can be increased, and image quality can be improved. Fig. 2 shows the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b each having 4 pixels, but the number of pixels in the 1 st photoelectric conversion portion 13a and the number of pixels in the 2 nd photoelectric conversion portion 13b are not particularly limited. The number of pixels in the 1 st photoelectric conversion portion 13a may be the same as or different from the number of pixels in the 2 nd photoelectric conversion portion 13b. For example, fig. 2 illustrates an example in which the 2 nd photoelectric conversion portion 13b of 4 pixels is laminated on the 1 st photoelectric conversion portion 13a of 4 pixels, but the 2 nd photoelectric conversion portion 13b of 4 pixels may be laminated on the 1 st photoelectric conversion portion 13a of 1 pixel.
The 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b may each have sensitivity to at least any of visible light, near infrared light, and ultraviolet light. For example, a bayer array color filter may be provided above the 2 nd photoelectric conversion unit 13b having sensitivity in the entire visible light band, and each pixel provided in the 2 nd photoelectric conversion unit 13b may output a pixel signal corresponding to the intensity of red, blue, and green light in accordance with the corresponding color filter. For example, each pixel provided in the 1 st photoelectric conversion portion 13a having sensitivity in the near infrared ray band may output a pixel signal corresponding to the intensity of the near infrared ray. Thus, a color image corresponding to the signal charge of the 2 nd photoelectric conversion portion 13b can be obtained, and a near infrared line image corresponding to the signal charge of the 1 st photoelectric conversion portion 13a can be obtained.
The signal detection circuit 14a and the signal detection circuit 14b are formed on the same plane in the semiconductor substrate 20 in the example shown in fig. 2. The signal detection circuit 14a and the signal detection circuit 14b may be formed in an aligned manner on the same plane on the semiconductor substrate 20 as shown in fig. 2, or may be formed in different planes by being separated from each other vertically.
Next, a circuit configuration of the image pickup apparatus 100 according to the present embodiment will be described. Fig. 3A is a schematic diagram showing an exemplary circuit configuration of a pixel including the 1 st photoelectric conversion portion and a peripheral circuit in the image pickup device according to the present embodiment. Fig. 3B is a schematic diagram showing an exemplary circuit configuration of a pixel including the 2 nd photoelectric conversion portion and a peripheral circuit in the image pickup apparatus according to the present embodiment.
As shown in fig. 3A and 3B, the image pickup device 100 includes a plurality of pixels including a plurality of pixels 10a and a plurality of pixels 10B, and peripheral circuits. More specifically, the imaging device 100 includes a pixel array PA including a plurality of pixels 10a arranged in 2 dimensions and a plurality of pixels 10b arranged in 2 dimensions, and peripheral circuits. Fig. 3A and 3B schematically show an example of a matrix in which pixels 10a and 10B are arranged in 2 rows and 2 columns, respectively. The 1 st photoelectric conversion portion 13a and the signal detection circuit 14a constitute at least a part of the pixel 10a, and the 2 nd photoelectric conversion portion 13b and the signal detection circuit 14b constitute at least a part of the pixel 10 b. In the pixel array PA, as described above, the 1 st photoelectric conversion portion 13a of the pixel 10a and the 2 nd photoelectric conversion portion 13b of the pixel 10b are laminated. The number and arrangement of the pixels 10a and 10B in the image pickup device 100 are not limited to the examples shown in fig. 3A and 3B. In the present embodiment, the pixel 10a is an example of the 1 st pixel, and the pixel 10b is an example of the 2 nd pixel.
The peripheral circuit drives the pixel array PA, for example, and acquires an image based on the signal charges generated by the 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13 b. The peripheral circuits include, for example, a voltage supply circuit 32a connected to the pixel 10a, a reset voltage source 34a, a vertical scanning circuit 36a, a column signal processing circuit 37a, a horizontal signal reading circuit 38a, a voltage source connected to the power supply line 40a, and the like. The peripheral circuits include, for example, a voltage supply circuit 32b connected to the pixel 10b, a reset voltage source 34b, a vertical scanning circuit 36b, a column signal processing circuit 37b, a horizontal signal reading circuit 38b, and a voltage source connected to the power supply line 40 b. The image pickup apparatus 100 may further include a control circuit for controlling driving of peripheral circuits other than the image pickup apparatus itself, as a circuit included in the peripheral circuits.
The pixel 10a and the pixel 10b are, for example, effective pixels, respectively. Here, the effective pixel is a pixel actually used for outputting an image or a pixel used for sensing, and does not include an optical black pixel and a dummy pixel used for measuring dark noise.
The pixel 10a and the peripheral circuit connected to the pixel 10a shown in fig. 3A have the same circuit configuration as the pixel 10B and the peripheral circuit connected to the pixel 10B shown in fig. 3B, for example, in terms of functions. Referring to fig. 3A and 3B, a circuit configuration related to the pixel 10a having the 1 st photoelectric conversion portion 13A and the pixel 10B having the 2 nd photoelectric conversion portion 13B will be described.
Each pixel 10a has a1 st photoelectric conversion portion 13a and a signal detection circuit 14a. Each pixel 10b has a2 nd photoelectric conversion portion 13b and a signal detection circuit 14b. As will be described later with reference to the drawings, the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b each have a photoelectric conversion layer sandwiched between 2 electrodes facing each other, and receive incident light to generate signal charges. The 1 st photoelectric conversion unit 13a does not need to be an element that is independent for each pixel 10a, and for example, a part of the 1 st photoelectric conversion unit 13a may span a plurality of pixels 10a. The 2 nd photoelectric conversion portion 13b does not need to be an element that is independent for each pixel 10b, and for example, a part of the 2 nd photoelectric conversion portion 13b may extend across a plurality of pixels 10b.
The signal detection circuit 14a is a circuit for detecting the signal charge generated by the 1 st photoelectric conversion portion 13 a. The signal detection circuit 14b is a circuit that detects the signal charge generated by the 2 nd photoelectric conversion portion 13 b. In this example, the signal detection circuit 14a includes a signal detection transistor 24a and an address transistor 26a. The signal detection circuit 14b includes a signal detection transistor 24b and an address transistor 26b. The signal detection transistors 24a and 24b and the address transistors 26a and 26b are, for example, field Effect Transistors (FETs), and N-channel MOSFETs (Metal Oxide Semiconductor FIELD EFFECT transistors) are exemplified as the signal detection transistors 24a and 24b and the address transistors 26a and 26b, respectively. Each of the signal detection transistors 24a and 24b, the address transistors 26a and 26b, and the reset transistors 28a and 28b described later has a control terminal, an input terminal, and an output terminal. The control terminal is, for example, a gate. The input terminal is one of a drain and a source, for example, a drain. The output terminal is the other of the drain and the source, for example, the source.
As schematically shown in fig. 3A, the control terminal of the signal detection transistor 24a has an electrical connection with the 1 st photoelectric conversion portion 13A. The signal charges generated by the 1 st photoelectric conversion portion 13a are accumulated in a region including the charge accumulation node 41a located between the gate of the signal detection transistor 24a and the 1 st photoelectric conversion portion 13 a. As schematically shown in fig. 3B, the control terminal of the signal detection transistor 24B has an electrical connection with the 2 nd photoelectric conversion portion 13B. The signal charges generated by the 2 nd photoelectric conversion portion 13b are accumulated in a region including the charge accumulation node 41b located between the gate of the signal detection transistor 24b and the 2 nd photoelectric conversion portion 13 b. Here, the signal charge is a hole or an electron. The charge storage node is at least a part of a charge storage region storing signal charges, and is also called a "floating diffusion node". The detailed structure of the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b will be described later.
The 1 st photoelectric conversion portion 13a of each pixel 10a also has a connection to the sensitivity control line 42 a. In the configuration illustrated in fig. 3A, the sensitivity control line 42a is connected to the voltage supply circuit 32 a. The 2 nd photoelectric conversion portion 13b of each pixel 10b also has a connection to the sensitivity control line 42 b. In the configuration illustrated in fig. 3B, the sensitivity control line 42B is connected to the voltage supply circuit 32B. The voltage supply circuit is also referred to as a sensitivity control electrode supply circuit. The voltage supply circuits 32a and 32b are each configured to be capable of supplying at least 2 kinds of voltages.
The voltage supply circuit 32a supplies a voltage to the 1 st photoelectric conversion portion 13 a. Specifically, the voltage supply circuit 32a supplies a predetermined voltage to the 1 st photoelectric conversion unit 13a via the sensitivity control line 42a when the imaging device 100 is operated. The voltage supply circuit 32b supplies a voltage to the 2 nd photoelectric conversion unit 13 b. Specifically, the voltage supply circuit 32b supplies a predetermined voltage to the 2 nd photoelectric conversion unit 13b via the sensitivity control line 42b when the imaging device 100 is operated. The voltage supply circuits 32a and 32b are not limited to a specific power supply circuit, and may be circuits that generate a predetermined voltage or may be circuits that convert a voltage supplied from another power supply into a predetermined voltage. As will be described later, the voltage supplied from the voltage supply circuit 32a to the 1 st photoelectric conversion unit 13a is switched between a plurality of voltages different from each other, and the start and end of accumulation of the signal charge from the 1 st photoelectric conversion unit 13a to the charge accumulation node 41a are controlled. The voltage supplied from the voltage supply circuit 32b to the 2 nd photoelectric conversion unit 13b is switched between a plurality of voltages different from each other, and the start and end of accumulation of the signal charge from the 2 nd photoelectric conversion unit 13b to the charge accumulation node 41b are controlled. In other words, in the present embodiment, the voltage supplied from the voltage supply circuit 32a to the 1 st photoelectric conversion portion 13a and the voltage supplied from the voltage supply circuit 32b to the 2 nd photoelectric conversion portion 13b are switched, so that the electronic shutter operation is performed. An example of the operation of the image pickup apparatus 100 will be described later.
Each pixel 10a has a connection to a power supply line 40a that supplies a power supply voltage VDD. Each pixel 10b has a connection to a power supply line 40b that supplies a power supply voltage VDD. As shown in fig. 3A, an input terminal of the signal detection transistor 24a is connected to the power supply line 40 a. The signal detection transistor 24a amplifies and outputs the signal generated by the 1 st photoelectric conversion portion 13a by functioning as a source follower power supply through the power supply line 40 a. As shown in fig. 3B, an input terminal of the signal detection transistor 24B is connected to the power supply line 40B. The signal detection transistor 24b amplifies and outputs the signal generated by the 2 nd photoelectric conversion portion 13b, functioning as a source follower power supply via the power supply line 40 b.
An input terminal of the address transistor 26a is connected to an output terminal of the signal detection transistor 24 a. The output terminal of the address transistor 26a is connected to 1 of the plurality of vertical signal lines 47a arranged for each column of the pixels 10a in the pixel array PA. The control terminal of the address transistor 26a is connected to the address control line 46a, and the potential of the address control line 46a is controlled to selectively read the output of the signal detection transistor 24a to the corresponding vertical signal line 47 a.
The input terminal of the address transistor 26b is connected to the output terminal of the signal detection transistor 24 b. The output terminal of the address transistor 26b is connected to 1 of the plurality of vertical signal lines 47b arranged for each column of the pixels 10b in the pixel array PA. The control terminal of the address transistor 26b is connected to the address control line 46b, and the potential of the address control line 46b is controlled to selectively read the output of the signal detection transistor 24b to the corresponding vertical signal line 47 b.
In the example shown in fig. 3A, the address control line 46a is connected to the vertical scanning circuit 36 a. In the example shown in fig. 3B, the address control line 46B is connected to the vertical scanning circuit 36B. The vertical scanning circuit is also referred to as a "line scanning circuit". The vertical scanning circuit 36a applies a predetermined voltage to the address control line 46a to select a plurality of pixels 10a arranged in each row in units of rows. The vertical scanning circuit 36b applies a predetermined voltage to the address control line 46b to select a plurality of pixels 10b arranged in each row in units of rows. Thereby, readout of signals of the selected pixels 10a and 10b and reset of pixel electrodes described later are performed.
The vertical signal line 47a is a main signal line that transmits pixel signals from the plurality of pixels 10a of the pixel array PA to the peripheral circuit. The vertical signal line 47a is connected to a column signal processing circuit 37a. In addition, the vertical signal line 47b is a main signal line that transmits pixel signals from the plurality of pixels 10b of the pixel array PA to the peripheral circuit. The vertical signal line 47b is connected to a column signal processing circuit 37b. The column signal processing circuit is also referred to as a "row signal accumulation circuit". The column signal processing circuits 37a and 37b perform noise suppression signal processing typified by correlated double sampling, analog-digital conversion (AD conversion), and the like, respectively. As shown in fig. 3A, the column signal processing circuit 37a is provided corresponding to each column of the pixels 10a in the pixel array PA. The horizontal signal reading circuit 38a is connected to the column signal processing circuit 37a. As shown in fig. 3B, the column signal processing circuit 37B is provided corresponding to each column of the pixels 10B in the pixel array PA. The horizontal signal reading circuit 38b is connected to the column signal processing circuit 37b. The horizontal signal readout circuit is also referred to as a "column scanning circuit".
The horizontal signal reading circuit 38a sequentially reads out signals from the plurality of column signal processing circuits 37a to the horizontal common signal line 49 a. The horizontal signal reading circuit 38b sequentially reads out signals from the plurality of column signal processing circuits 37b to the horizontal common signal line 49 b.
In the configuration illustrated in fig. 3A, the pixel 10a has a reset transistor 28a. In addition, in the configuration illustrated in fig. 3B, the pixel 10B has a reset transistor 28B. The reset transistors 28a and 28b may be field effect transistors, for example, as the signal detection transistors 24a and 24b and the address transistors 26a and 26b, respectively. Hereinafter, an example in which an N-channel MOSFET is applied as the reset transistors 28a and 28b will be described unless otherwise specified.
As shown in fig. 3A, the reset transistor 28a is connected between a reset voltage line 44a that supplies a reset voltage Vr and the charge accumulation node 41 a. The control terminal of the reset transistor 28a is connected to the reset control line 48a, and the potential of the charge accumulation node 41a can be reset to the reset voltage Vr by controlling the potential of the reset control line 48 a. In this example, the reset control line 48a is connected to the vertical scanning circuit 36 a. Accordingly, the vertical scanning circuit 36a applies a predetermined voltage to the reset control line 48a, so that the plurality of pixels 10a arranged in each row can be reset on a row-by-row basis. As shown in fig. 3B, the reset transistor 28B is connected between a reset voltage line 44B for supplying the reset voltage Vr and the charge accumulation node 41B. The control terminal of the reset transistor 28b is connected to the reset control line 48b, and the potential of the charge accumulation node 41b can be reset to the reset voltage Vr by controlling the potential of the reset control line 48 b. In this example, the reset control line 48b is connected to the vertical scanning circuit 36 b. Accordingly, the vertical scanning circuit 36b applies a predetermined voltage to the reset control line 48b, so that the plurality of pixels 10b arranged in each row can be reset on a row-by-row basis.
In this example, a reset voltage line 44a that supplies a reset voltage Vr to the reset transistor 28a is connected to the reset voltage source 34 a. In addition, a reset voltage line 44b that supplies the reset voltage Vr to the reset transistor 28b is connected to the reset voltage source 34 b. The reset voltage source is also referred to as a "reset voltage supply circuit". The reset voltage sources 34a and 34b may be configured to supply a predetermined reset voltage Vr to the reset voltage lines 44a and 44b when the image pickup device 100 is operated, and are not limited to a specific power supply circuit as in the case of the voltage supply circuits 32a and 32b described above. The voltage supply circuits 32a and 32b and the reset voltage sources 34a and 34b may each be part of a single voltage supply circuit or may be independent individual voltage supply circuits. One or both of the voltage supply circuit 32a and the reset voltage source 34a may be part of the vertical scanning circuit 36 a. Alternatively, the sensitivity control voltage from the voltage supply circuit 32a and/or the reset voltage Vr from the reset voltage source 34a may be supplied to each pixel 10a via the vertical scanning circuit 36 a. One or both of the voltage supply circuit 32b and the reset voltage source 34b may be part of the vertical scanning circuit 36 b. Alternatively, the sensitivity control voltage from the voltage supply circuit 32b and/or the reset voltage Vr from the reset voltage source 34b may be supplied to each pixel 10b via the vertical scanning circuit 36 b.
As the reset voltage Vr, the power supply voltage VDD of the signal detection circuits 14a and 14b may be used. In this case, a voltage supply circuit (not shown in fig. 3A) that supplies a power supply voltage to each pixel 10a can be shared with the reset voltage source 34 a. In addition, since the power supply line 40a and the reset voltage line 44a can be shared, wiring in the pixel array PA can be simplified. Similarly, a voltage supply circuit (not shown in fig. 3B) that supplies a power supply voltage to each pixel 10B can be shared with the reset voltage source 34B. In addition, since the power supply line 40b and the reset voltage line 44b can be shared, wiring in the pixel array PA can be simplified. However, when mutually different voltages are used for the reset voltage Vr and the power supply voltages VDD of the signal detection circuits 14a and 14b, the image pickup apparatus 100 can be controlled more flexibly.
[ Device Structure of Pixel ]
Next, a cross-sectional structure of a pixel of the imaging device 100 according to the present embodiment will be described.
Fig. 4 is a cross-sectional view schematically showing an exemplary cross-sectional structure of the pixels 10a and 10b according to the present embodiment. In the configuration illustrated in fig. 4, the signal detection transistors 24a and 24b, the address transistors 26a and 26b, and the reset transistors 28a and 28b are formed on the semiconductor substrate 20. The semiconductor substrate 20 is not limited to a substrate in which the entire semiconductor substrate is a semiconductor. The semiconductor substrate 20 may be an insulating substrate or the like having a semiconductor layer provided on a surface on the side where the photosensitive region is formed. The semiconductor substrate 20 has a plurality of semiconductor layers, and the signal detection transistor 24a, the address transistor 26a, and the reset transistor 28a may be formed in different semiconductor layers from the signal detection transistor 24b, the address transistor 26b, and the reset transistor 28 b. Here, an example in which a P-type silicon (Si) substrate is used as the semiconductor substrate 20 will be described.
In fig. 4, an example in which the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b having the same size are arranged in the same region of the semiconductor substrate 20 in a plan view will be described.
The semiconductor substrate 20 has impurity regions 26s, 24d, 28d, and 28s, and element separation regions 20t for electrical separation between pixels. Here, the impurity regions 26s, 24d, 28d, and 28s are N-type regions. The element isolation region 20t is also provided between the impurity region 24d and the impurity region 28 d. The element isolation region 20t is formed by, for example, ion implantation of an acceptor based on a predetermined implantation condition.
The impurity regions 26s, 24d, 28d, and 28s are, for example, diffusion layers formed in the semiconductor substrate 20. As schematically shown in fig. 4, the signal detection transistors 24a and 24b include impurity regions 24s and 24d, respectively, and a gate electrode 24g. The gate electrode 24g is formed using a conductive material. The conductive material is, for example, polysilicon to which conductivity is imparted by doping impurities, but may be a metal material. The impurity region 24s functions as, for example, a source region of the signal detection transistors 24a and 24 b. The impurity region 24d functions as, for example, a drain region of the signal detection transistors 24a and 24 b. Channel regions of the signal detection transistors 24a and 24b are formed between the impurity regions 24s and 24 d.
Similarly, the address transistors 26a and 26B include impurity regions 26s and 24s, respectively, and a gate electrode 26g connected to an address control line 46a or 46B (see fig. 3A and 3B), which are not shown in fig. 4. The gate electrode 26g is formed using a conductive material. The conductive material is, for example, polysilicon to which conductivity is imparted by doping impurities, but may be a metal material. In this example, the signal detection transistor 24a and the address transistor 26a are electrically connected to each other through the shared impurity region 24 s. Similarly, the signal detection transistor 24b and the address transistor 26b are electrically connected to each other through the shared impurity region 24 s. The impurity region 26s functions as, for example, a source region of the address transistors 26a and 26 b. The impurity region 26s has a connection to a vertical signal line 47a or 47B (see fig. 3A and 3B) not shown in fig. 4.
The reset transistors 28a and 28B include impurity regions 28d and 28s, respectively, and a gate electrode 28g connected to a reset control line 48a or 48B (see fig. 3A and 3B) not shown in fig. 4. The gate electrode 28g is formed using a conductive material, for example. The conductive material is, for example, polysilicon to which conductivity is imparted by doping impurities, but may be a metal material. The impurity region 28s functions as, for example, a source region of the reset transistors 28a and 28 b. The impurity region 28s has a connection to a reset voltage line 44a or 44B (see fig. 3A and 3B) not shown in fig. 4. The impurity region 28d functions as, for example, a drain region of the reset transistors 28a and 28 b.
An interlayer insulating layer 50 is disposed on the semiconductor substrate 20 so as to cover the signal detection transistors 24a and 24b, the address transistors 26a and 26b, and the reset transistors 28a and 28 b. The interlayer insulating layer 50 is formed of an insulating material such as silicon oxide. As shown in fig. 4, wiring layers 56a and 56b may be disposed in the interlayer insulating layer 50. The wiring layers 56a and 56b are formed of a metal such as copper. The wiring layer 56a may include, for example, the wiring such as the vertical signal line 47a described above in a part thereof. The wiring layer 56b may include, for example, the wiring such as the vertical signal line 47b described above in a part thereof. The number of insulating layers in the interlayer insulating layer 50 and the number of layers included in the wiring layers 56a and 56b disposed in the interlayer insulating layer 50 can be arbitrarily set, and are not limited to the example shown in fig. 4.
The 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b described above are disposed on the interlayer insulating layer 50. In other words, in the present embodiment, a plurality of pixels 10a and a plurality of pixels 10B constituting the pixel array PA (see fig. 3A and 3B) are formed in the semiconductor substrate 20 and on the semiconductor substrate 20. A photosensitive region is formed by a plurality of pixels 10a and pixels 10b arranged in 2 dimensions on a semiconductor substrate 20. The photosensitive region is also referred to as a "pixel region". The distance between the adjacent 2 pixels 10a and the distance between the adjacent 2 pixels 10b may be, for example, about 2 μm. The distance between adjacent 2 pixels is also referred to as "pixel pitch".
In the present embodiment, light enters the 1 st and 2 nd photoelectric conversion portions 13a and 13b from above the 1 st and 2 nd photoelectric conversion portions 13a and 13b, in other words, from the opposite side to the semiconductor substrate 20 side.
The 1 st photoelectric conversion portion 13a includes a pixel electrode 11a, a counter electrode 12a, and a photoelectric conversion layer 15a disposed therebetween. In this example, the counter electrode 12a and the photoelectric conversion layer 15a are formed across the plurality of pixels 10 a. On the other hand, the pixel electrode 11a is provided for each pixel 10a, and is spatially separated from the pixel electrode 11a of the other adjacent pixel 10a, thereby being electrically separated from the pixel electrode 11a of the other pixel 10 a.
The 2 nd photoelectric conversion portion 13b includes a pixel electrode 11b, a counter electrode 12b, and a photoelectric conversion layer 15b disposed therebetween. In this example, the counter electrode 12b and the photoelectric conversion layer 15b are formed across the plurality of pixels 10 b. On the other hand, the pixel electrode 11b is provided for each pixel 10b, and is spatially separated from the pixel electrode 11b of the other adjacent pixel 10b, thereby being electrically separated from the pixel electrode 11b of the other pixel 10 b.
The 2 nd photoelectric conversion portion 13b is stacked above the 1 st photoelectric conversion portion 13a via an insulating layer 62. The light transmitted through the 2 nd photoelectric conversion portion 13b and the insulating layer 62 enters the 1 st photoelectric conversion portion 13 a. The 2 nd photoelectric conversion portion 13b and the insulating layer 62 transmit at least a part of the light of the wavelength to which the 1 st photoelectric conversion portion 13a has sensitivity. In this way, the light incident on the 1 st photoelectric conversion portion 13a passes through the 2 nd photoelectric conversion portion 13b. The light incident on the image pickup device 100 enters both the 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b. Therefore, if light of a wavelength band having sensitivity in one of the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b is incident, the light may also affect the other photoelectric conversion.
Further, a sealing layer, a color filter, a microlens, and the like may be provided above the 2 nd photoelectric conversion portion 13 b.
The pixel electrode 11a is an electrode for reading out the signal charge generated by the 1 st photoelectric conversion portion 13 a. At least 1 pixel electrode 11a is provided for each pixel 10 a. The pixel electrode 11a is electrically connected to the gate electrode 24g and the impurity region 28d of the signal detection transistor 24 a. The pixel electrode 11b is an electrode for reading out the signal charge generated by the 2 nd photoelectric conversion portion 13 b. At least 1 pixel electrode 11b is provided for each pixel 10 b. The pixel electrode 11b is electrically connected to the gate electrode 24g and the impurity region 28d of the signal detection transistor 24 b. The pixel electrode 11b is disposed on the 1 st photoelectric conversion portion 13a side of the photoelectric conversion layer 15 b.
The counter electrode 12a is disposed so as to face the pixel electrode 11a with the photoelectric conversion layer 15a interposed therebetween. The counter electrode 12a is disposed on the light-receiving side of the photoelectric conversion layer 15a, for example. Therefore, the light transmitted through the counter electrode 12a enters the photoelectric conversion layer 15 a. The counter electrode 12a is disposed, for example, on the side of the photoelectric conversion layer 15a closer to the 2 nd photoelectric conversion portion 13 b. Therefore, the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b are stacked so that the counter electrode 12a faces the pixel electrode 11 b. The counter electrode 12a and the pixel electrode 11b are adjacent to each other with the insulating layer 62 interposed therebetween.
The counter electrode 12b is disposed so as to face the pixel electrode 11b with the photoelectric conversion layer 15b interposed therebetween. The counter electrode 12b is disposed on the light-receiving side of the photoelectric conversion layer 15b, for example. Therefore, the light transmitted through the counter electrode 12b enters the photoelectric conversion layer 15 b.
The pixel electrode 11b, the counter electrode 12a, and the counter electrode 12b are transparent electrodes made of, for example, a transparent conductive material. By "transparent" in this specification is meant that at least a portion of the light in the wavelength range that is desired to be detected is transmitted, and it is not necessary that the light be transmitted throughout the entire wavelength range of visible light. For example, the counter electrode 12b transmits at least a part of the light having the wavelength of which the 1 st photoelectric conversion portion 13a has sensitivity and at least a part of the light having the wavelength of which the 2 nd photoelectric conversion portion 13b has sensitivity. For example, the pixel electrode 11b and the counter electrode 12a transmit at least a part of the light having the wavelength to which the 1 st photoelectric conversion portion 13a has sensitivity.
For example, a transparent conductive oxide (TRANSPARENT CONDUCTING OXIDE (TCO)) such as ITO, IZO, AZO, FTO, snO 2、TiO 2、ZnO 2 can be used as the transparent electrode.
The pixel electrode 11a is formed by using a conductive material. The conductive material is, for example, a metal such as aluminum or copper, a metal nitride, or polysilicon to which conductivity is imparted by doping impurities.
The pixel electrode 11a may be a light-shielding electrode. For example, by forming a TaN electrode having a thickness of 100nm as the pixel electrode 11a, sufficient light shielding property can be achieved. By using the pixel electrode 11a as a light-shielding electrode, incidence of light passing through the photoelectric conversion layer 15a to a channel region or an impurity region of a transistor (at least one of the signal detection transistors 24a and 24b, the address transistors 26a and 26b, and the reset transistors 28a and 28b in this example) formed on the semiconductor substrate 20 can be suppressed. A light shielding film may be formed in the interlayer insulating layer 50 by using the wiring layers 56a and 56 b. By suppressing incidence of light to a channel region of a transistor formed on the semiconductor substrate 20, variations in characteristics of the transistor (for example, variations in threshold voltage) and the like can be suppressed. In addition, by suppressing incidence of light to the impurity region formed in the semiconductor substrate 20, noise mixing due to unexpected photoelectric conversion in the impurity region can be suppressed. Thus, the incidence of light to the semiconductor substrate 20 is suppressed, which contributes to the improvement of the reliability of the imaging device 100. The pixel electrode 11a may be a transparent electrode.
The pixel electrode 11a and the counter electrode 12a may be arranged in a position that is changed from the arrangement shown in fig. 4. In this case, the pixel electrode 11a is a transparent electrode, and the counter electrode 12a may be formed using a conductive material, or may not be a transparent electrode. In this case, the plug 52a is disposed so as to penetrate the counter electrode 12a and the photoelectric conversion layer 15a.
The pixel electrode 11b and the counter electrode 12b may be arranged in a position that is changed from the arrangement shown in fig. 4. In this case, the plug 52b is also disposed so as to pass through the counter electrode 12b and the photoelectric conversion layer 15b.
The 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b may be arranged with their positions changed from those shown in fig. 4.
The photoelectric conversion layers 15a and 15b each receive incident light and generate hole-electron pairs. The photoelectric conversion layers 15a and 15b are each formed of, for example, an organic material. The photoelectric conversion layers 15a and 15b may each have a structure in which a plurality of layers are stacked. Specific examples of the material constituting the photoelectric conversion layers 15a and 15b will be described below.
As described with reference to fig. 3A, the counter electrode 12a has a connection with the sensitivity control line 42a connected to the voltage supply circuit 32 a. Here, the counter electrode 12a is formed across the plurality of pixels 10 a. Therefore, a sensitivity control voltage of a desired magnitude can be applied from the voltage supply circuit 32a to the plurality of pixels 10a at once via the sensitivity control line 42 a. In addition, as described with reference to fig. 3B, the counter electrode 12B has a connection with the sensitivity control line 42B connected to the voltage supply circuit 32B. Here, the counter electrode 12b is formed across the plurality of pixels 10 b. Therefore, a sensitivity control voltage of a desired magnitude can be applied from the voltage supply circuit 32b to the plurality of pixels 10b at once via the sensitivity control line 42 b. In addition, at least one of the counter electrodes 12a and 12b may be provided separately for each pixel 10a or 10b as long as a sensitivity control voltage of a desired magnitude can be applied from the voltage supply circuit 32a or 32 b. Similarly, at least one of the photoelectric conversion layers 15a and 15b may be provided separately for each pixel 10a or 10 b.
As will be described later, the voltage supply circuits 32a and 32b supply mutually different voltages to the counter electrode 12a or 12b in the exposure period and the non-exposure period, respectively. In the present specification, the term "exposure period" means a period for accumulating signal charges, which are one of positive and negative charges generated by photoelectric conversion of the 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b, in the charge accumulation region or the like, and may be also referred to as a "charge accumulation period". In the present specification, a period of time during which the imaging device is in operation and is outside the exposure period is referred to as a "non-exposure period". The "non-exposure period" is not limited to a period in which the incidence of the light to the 1 st photoelectric conversion portion 13a or the 2 nd photoelectric conversion portion 13b is blocked, and may include a period in which the light to the 1 st photoelectric conversion portion 13a or the 2 nd photoelectric conversion portion 13b is irradiated. The "non-exposure period" includes a period in which signal charges are unexpectedly accumulated in the charge accumulation region due to occurrence of parasitic sensitivity.
The "non-exposure period" includes a "read period" and a "reset period". The "readout period" is a period in which the signal detection circuits 14a and 14b read out signals corresponding to the amounts of signal charges generated by the 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b (i.e., the amounts of signal charges stored in the charge storage region), respectively. The "reset period" is a period in which the electric potential of the charge accumulation region in which the signal charges generated by the 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b are accumulated is reset. Specifically, in the "reset period", the potential of the charge accumulation region is reset to the reset voltage Vr.
In the present embodiment, "exposure period", "non-exposure period", "readout period" and "reset period" are defined for each of the pixels 10a and 10 b. Since the pixel 10a reads out a signal corresponding to the amount of the signal charge generated by the 1 st photoelectric conversion unit 13a, the "exposure period", "non-exposure period", "readout period", and "reset period" of the pixel 10a can be also referred to as the "exposure period", "non-exposure period", "readout period", and "reset period" of the 1 st photoelectric conversion unit 13 a. Since the pixel 10b reads out a signal corresponding to the amount of the signal charge generated by the 2 nd photoelectric conversion unit 13b, the "exposure period", "non-exposure period", "readout period", and "reset period" of the pixel 10b can be also referred to as the "exposure period", "non-exposure period", "readout period", and "reset period" of the 2 nd photoelectric conversion unit 13b. Details of each period will be described later.
By controlling the potential of the counter electrode 12a with respect to the potential of the pixel electrode 11a, either one of holes and electrons in the hole-electron pair generated in the photoelectric conversion layer 15a by photoelectric conversion can be collected as signal charges by the pixel electrode 11 a. For example, in the case of using holes as signal charges, holes can be selectively collected by the pixel electrode 11a by making the potential of the counter electrode 12a higher than that of the pixel electrode 11 a. Further, by controlling the potential of the counter electrode 12b with respect to the potential of the pixel electrode 11b, either one of holes and electrons in the hole-electron pair generated in the photoelectric conversion layer 15b by photoelectric conversion can be collected as signal charges by the pixel electrode 11 b. For example, in the case of using holes as signal charges, holes can be selectively collected by the pixel electrode 11b by making the potential of the counter electrode 12b higher than that of the pixel electrode 11 b. Hereinafter, a case of using holes as signal charges is exemplified. Of course, electrons can also be utilized as the signal charges. In this case, the potential of the counter electrode 12a is made lower than the pixel electrode 11a, and the potential of the counter electrode 12b is made lower than the pixel electrode 11 b.
By applying an appropriate bias voltage between the counter electrode 12a and the pixel electrode 11a, the pixel electrode 11a facing the counter electrode 12a collects one of positive and negative charges generated by photoelectric conversion in the photoelectric conversion layer 15 a. Further, by applying an appropriate bias voltage between the counter electrode 12b and the pixel electrode 11b, the pixel electrode 11b facing the counter electrode 12b collects one of positive and negative charges generated by photoelectric conversion in the photoelectric conversion layer 15 b.
The imaging device 100 includes an insulating layer 62 disposed between the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13 b. The insulating layer 62 electrically separates the 1 st photoelectric conversion portion 13a from the 2 nd photoelectric conversion portion 13 b. In the example shown in fig. 4, the pixel electrode 11a, the photoelectric conversion layer 15a, the counter electrode 12a, the insulating layer 62, the pixel electrode 11b, the photoelectric conversion layer 15b, and the counter electrode 12b are stacked in this order from the lower side. The insulating layer 62 is formed of a transparent insulating material. For example, the insulating layer 62 transmits at least a part of the light having the wavelength to which the 1 st photoelectric conversion portion 13a has sensitivity. As the insulating layer 62, for example, silicon oxynitride, aluminum oxide, or the like can be used.
As schematically shown in fig. 4, the pixel electrode 11a is connected to the gate electrode 24g of the signal detection transistor 24a via the plug 52a, the wiring 53a, and the contact plug 54 a. In other words, the gate of the signal detection transistor 24a has an electrical connection with the pixel electrode 11 a. The plug 52a, the wiring 53A, and the contact plug 54a constitute at least a part of the charge accumulation node 41a (see fig. 3A) between the signal detection transistor 24a and the 1 st photoelectric conversion portion 13A. The wiring 53a may be a part of the wiring layer 56 a. The pixel electrode 11a is also connected to the impurity region 28d of the reset transistor 28a via the plug 52a, the wiring 53a, and the contact plug 55 a. In the configuration illustrated in fig. 4, the gate electrode 24g of the signal detection transistor 24a, the plug 52a, the wiring 53a, the contact plugs 54a and 55a, and the impurity region 28d which is one of the source region and the drain region of the reset transistor 28a function as a charge accumulation region of the pixel 10a which accumulates signal charges collected by the pixel electrode 11 a.
The pixel electrode 11b is connected to the gate electrode 24g of the signal detection transistor 24b via the plug 52b, the wiring 53b, and the contact plug 54 b. In other words, the gate of the signal detection transistor 24b has an electrical connection with the pixel electrode 11 b. The plug 52b penetrates the 1 st photoelectric conversion portion 13a and the insulating layer 62. The plug 52B, the wiring 53B, and the contact plug 54B constitute at least a part of the charge accumulation node 41B (see fig. 3B) between the signal detection transistor 24B and the 2 nd photoelectric conversion portion 13B. The wiring 53b may be a part of the wiring layer 56 b. The pixel electrode 11b is also connected to the impurity region 28d of the reset transistor 28b via the plug 52b, the wiring 53b, and the contact plug 55 b. In the configuration illustrated in fig. 4, the gate electrode 24g, the plug 52b, the wiring 53b, the contact plugs 54b and 55b, and the impurity region 28d which is one of the source region and the drain region of the reset transistor 28b of the signal detection transistor 24b function as a charge accumulation region of the pixel 10b which accumulates signal charges collected by the pixel electrode 11 b.
The plugs 52a and 52b, the wirings 53a and 53b, and the contact plugs 54a, 54b, 55a, and 55b are formed using conductive materials, respectively. For example, the plugs 52a and 52b and the wirings 53a and 53b are each formed of a metal such as copper. For example, the contact plugs 54a, 54b, 55a, and 55b are each formed of polysilicon to which conductivity is imparted by doping impurities. The plugs 52a and 52b, the wirings 53a and 53b, and the contact plugs 54a, 54b, 55a, and 55b may be formed using the same material or different materials.
Further, an insulating coating 61b is formed around the plug 52 b. The insulating coating 61b is located between the plug 52b and the 1 st photoelectric conversion portion 13 a. The plug 52b is not in contact with the 1 st photoelectric conversion portion 13a, but is electrically insulated by the insulating coating 61b. The insulating coating 61b is formed using an insulating material such as silicon oxide or silicon nitride.
By collecting the signal charges by the pixel electrode 11a, a voltage corresponding to the amount of the signal charges accumulated in the charge accumulation region of the pixel 10a is applied to the gate of the signal detection transistor 24 a. The signal detection transistor 24a amplifies the voltage. The voltage amplified by the signal detection transistor 24a is selectively read out as a signal voltage via the address transistor 26 a. In addition, by collecting the signal charges by the pixel electrode 11b, a voltage corresponding to the amount of the signal charges accumulated in the charge accumulation region of the pixel 10b is applied to the gate of the signal detection transistor 24 b. The signal detection transistor 24b amplifies the voltage. The voltage amplified by the signal detection transistor 24b is selectively read out as a signal voltage via the address transistor 26 b.
The number of photoelectric conversion units included in the imaging device 100 is not particularly limited, and may be 2 or more. The imaging device according to the present embodiment may include 3 or more photoelectric conversion units. Fig. 5 is a schematic diagram showing the configuration of another imaging apparatus according to the present embodiment. Fig. 5 schematically illustrates a photoelectric conversion unit and a signal detection circuit included in the imaging device, and other components are not shown. Specifically, fig. 5 illustrates a pixel structure in a portion above the upper end portion of the interlayer insulating layer 50, and connection between the photoelectric conversion portion and the signal detection circuit.
As shown in fig. 5, the image pickup apparatus 110 is different from the image pickup apparatus 100 mainly in that photoelectric conversion units 13c and 13d and signal detection circuits 14c and 14d are further provided. Further, although not shown, the image pickup device 110 includes a reset transistor for resetting the photoelectric conversion units 13c and 13d and a peripheral circuit for acquiring an image based on signal charges generated by the photoelectric conversion units 13c and 13d, as in the image pickup device 100 described with reference to fig. 3A to 4. The photoelectric conversion units 13c and 13d are examples of the 3 rd photoelectric conversion unit. The signal detection circuits 14c and 14d are examples of the 3 rd signal detection circuit. The photoelectric conversion portion 13c and the signal detection circuit 14c may constitute a part of the pixel 10a or the pixel 10b, or may constitute at least a part of a pixel different from the pixel 10a and the pixel 10 b. The photoelectric conversion portion 13d and the signal detection circuit 14d may constitute a part of the pixel 10a or the pixel 10b, or may constitute at least a part of a pixel different from the pixel 10a and the pixel 10 b.
The photoelectric conversion portions 13c and 13d are stacked above the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13 b. Specifically, in the image pickup apparatus 110, the 1 st photoelectric conversion unit 13a, the 2 nd photoelectric conversion unit 13b, the photoelectric conversion unit 13c, and the photoelectric conversion unit 13d are stacked in this order from the lower side. The lamination order of the photoelectric conversion units is not particularly limited.
The 1 st photoelectric conversion portion 13a, the 2 nd photoelectric conversion portion 13b, the photoelectric conversion portion 13c, and the photoelectric conversion portion 13d have sensitivity in mutually different wavelength bands, for example.
An insulating layer 62a is disposed between the 2 nd photoelectric conversion portion 13b and the photoelectric conversion portion 13 c. The 2 nd photoelectric conversion portion 13b and the photoelectric conversion portion 13c are electrically insulated by the insulating layer 62a.
An insulating layer 62b is disposed between the photoelectric conversion portion 13c and the photoelectric conversion portion 13 d. The photoelectric conversion portion 13c and the photoelectric conversion portion 13d are electrically insulated by the insulating layer 62b.
The photoelectric conversion portion 13c includes a pixel electrode 11c, a counter electrode 12c disposed opposite to the pixel electrode 11c, and a photoelectric conversion layer 15c disposed between the pixel electrode 11c and the counter electrode 12 c.
The pixel electrode 11c is connected to the signal detection circuit 14c via a plug 52c or the like. The plug 52c penetrates the 1 st photoelectric conversion portion 13a, the 2 nd photoelectric conversion portion 13b, and the insulating layers 62 and 62a. An insulating coating 61c is formed around the plug 52 c. The insulating coating 61c is located between the plug 52c and the 1 st and 2 nd photoelectric conversion portions 13a and 13 b.
The photoelectric conversion portion 13d includes a pixel electrode 11d, a counter electrode 12d disposed opposite to the pixel electrode 11d, and a photoelectric conversion layer 15d disposed between the pixel electrode 11d and the counter electrode 12 d.
The pixel electrode 11d is connected to the signal detection circuit 14d via a plug 52d or the like. The plug 52d penetrates the 1 st photoelectric conversion portion 13a, the 2nd photoelectric conversion portion 13b, the photoelectric conversion portion 13c, and the insulating layers 62, 62a, and 62b. An insulating coating 61d is formed around the plug 52 d. The insulating coating 61d is located between the plug 52d and the 1 st photoelectric conversion portion 13a, the 2nd photoelectric conversion portion 13b, and the photoelectric conversion portion 13 c.
The image pickup device 110 can increase the types of signals that can be obtained by the photoelectric conversion units. Therefore, by adjusting the wavelength at which each photoelectric conversion portion has sensitivity, a color image or the like can be easily obtained.
In this way, when the imaging device 110 includes 3 or more photoelectric conversion units, light incident on the imaging device 110 is also incident on each photoelectric conversion unit. Therefore, if light of a wavelength band in which 1 photoelectric conversion portion has sensitivity is incident, the light may also affect photoelectric conversion of other photoelectric conversion portions.
[ Construction example of photoelectric conversion layer ]
Next, details of the photoelectric conversion layers 15a and 15b according to the present embodiment will be described.
As described above, in the 1 st photoelectric conversion portion 13a, by applying the bias voltage between the pixel electrode 11a and the counter electrode 12a by irradiating the photoelectric conversion layer 15a with light, one of positive and negative charges generated by the photoelectric conversion can be collected by the pixel electrode 11a, and the collected charges can be accumulated in the charge accumulation region. By using the photoelectric conversion layer 15a showing the photocurrent characteristics described below for the 1 st photoelectric conversion unit 13a and reducing the potential difference between the pixel electrode 11a and the counter electrode 12a to a certain extent, it is possible to suppress the movement of the signal charges already stored in the charge storage region to the counter electrode 12a via the photoelectric conversion layer 15 a. Further, it is possible to suppress further accumulation of signal charges in the charge accumulation region after the potential difference is reduced. That is, by controlling the magnitude of the bias voltage applied to the photoelectric conversion layer 15a, the global shutter function can be realized without providing an element such as a transfer transistor separately for each of the plurality of pixels as in the technique described in patent document 5. The 2 nd photoelectric conversion unit 13b can also realize a global shutter function by the same operation as the 1 st photoelectric conversion unit 13 a. An example of the operation of the imaging device 100 will be described later.
The photoelectric conversion layers 15a and 15b each include, for example, a semiconductor material. In this embodiment mode, for example, an organic semiconductor material is used as the semiconductor material.
At least one of the photoelectric conversion layers 15a and 15b contains, for example, naphthalocyanine represented by the following general formula (1). Hereinafter, tin naphthalocyanines represented by the following general formula (1) may be referred to simply as "tin naphthalocyanines".
[ Chemical 1]
In the general formula (1), R 1 to R 24 independently represent a hydrogen atom or a substituent. The substituent is not limited to a specific substituent. The substituents may be deuterium atoms, halogen atoms, alkyl groups (including cycloalkyl, bicycloalkyl, tricycloalkyl), alkenyl groups (including cycloalkenyl, bicycloalkenyl), alkynyl groups, aryl groups, heteroatom ring groups (which may also be referred to as heterocyclyl groups), cyano groups, hydroxy groups, nitro groups, carboxyl groups, alkoxy groups, aryloxy groups, siloxy groups, heterocyclyloxy groups, acyloxy groups, carbamoyloxy groups, alkoxycarbonyloxy groups, aryloxycarbonyloxy groups, amino groups (including anilino groups), ammonium groups, amido groups, aminocarbonylamino groups, alkoxycarbonylamino groups, aryloxycarbonylamino groups, sulfamoylamino groups, alkylsulfonylamino groups, arylsulfonylamino groups, mercapto groups, alkylthio groups, arylthio groups, heterocyclic thiol groups, sulfamoyl groups, sulfo groups, alkylsulfinyl groups, arylsulfinyl groups, alkylsulfonyl groups, arylsulfonyl groups, acyl groups, aryloxycarbonyl groups, alkoxycarbonyl groups, carbamoyl groups, arylazo groups, heterocyclylazo groups, imido groups, phosphino groups, phosphinyloxy groups, phosphinylamino groups, phosphonyl groups, silyl groups, ureido groups (-OH) 4364), or other substituents known as (OH) 4364, O (-OH) or (O) groups.
As the naphthalocyanine tin represented by the above general formula (1), commercially available products can be used. Alternatively, a naphthalocyanine represented by the above general formula (1) can be synthesized using a naphthalene derivative represented by the following general formula (2) as a starting material, as shown in patent document 6, for example. R 25 to R 30 in the general formula (2) may be the same substituent as R 1 to R 24 in the general formula (1).
[ Chemical 2]
In the naphthalocyanine tin represented by the above general formula (1), 8 or more of R 1 to R 24 may be hydrogen atoms or deuterium atoms, 16 or more of R 1 to R 24 may be hydrogen atoms or deuterium atoms, or all of them may be hydrogen atoms or deuterium atoms, from the viewpoint of easy control of the aggregation state of molecules. Further, the naphthalocyanine tin represented by the following formula (3) is advantageous from the viewpoint of easy synthesis.
[ Chemical 3]
The naphthalocyanine tin represented by the above general formula (1) has absorbability in a wavelength band of 200nm to 1100 nm. For example, as shown in FIG. 6, the naphthalocyanine tin represented by the above formula (3) has an absorption peak at a position having a wavelength of about 870 nm. Fig. 6 is a diagram showing an example of an absorption spectrum in the photoelectric conversion layer containing tin naphthalocyanine expressed by the above formula (3). In addition, in measuring the absorption spectrum, a sample in which a photoelectric conversion layer (thickness: 30 nm) was laminated on a quartz substrate was used.
As can be seen from fig. 6, the photoelectric conversion layer formed of a material containing naphthalocyanine tin has absorbability in the near infrared band. That is, by selecting a material containing tin naphthalocyanine as a material constituting at least one of the photoelectric conversion layers 15a and 15b, for example, a light sensor capable of detecting near infrared rays can be realized. In this embodiment, for example, the photoelectric conversion layer 15a contains tin naphthalocyanine. Instead of tin naphthalocyanine, naphthalocyanine derivatives in which the central metal is not tin but other metals such as silicon or germanium may be used. In addition, an axial ligand may be coordinated to the central metal of the naphthalocyanine derivative.
Fig. 7A is a cross-sectional view schematically showing an example of the structure of the photoelectric conversion layer 15a in the 1 st photoelectric conversion portion 13 a. Fig. 7B is a cross-sectional view schematically showing an example of the structure of the photoelectric conversion layer 15B in the 2 nd photoelectric conversion portion 13B. As shown in fig. 7A and 7B, the photoelectric conversion layer 15a and the photoelectric conversion layer 15B have, for example, the same laminated structure.
As shown in fig. 7A, the photoelectric conversion layer 15a has, for example, a hole blocking layer 150h, a photoelectric conversion structure 150, and an electron blocking layer 150e. The hole blocking layer 150h is disposed between the photoelectric conversion structure 150 and the counter electrode 12 a. The electron blocking layer 150e is disposed between the photoelectric conversion structure 150 and the pixel electrode 11 a.
As shown in fig. 7B, the photoelectric conversion layer 15B has, for example, a hole blocking layer 151h, a photoelectric conversion structure 151, and an electron blocking layer 151e. The hole blocking layer 151h is disposed between the photoelectric conversion structure 151 and the counter electrode 12 b. The electron blocking layer 151e is disposed between the photoelectric conversion structure 151 and the pixel electrode 11 b.
The photoelectric conversion structures 150 and 151 each include at least one of a p-type semiconductor and an n-type semiconductor.
As shown in fig. 7A, the photoelectric conversion structure 150 includes, for example, a p-type semiconductor layer 150p, an n-type semiconductor layer 150n, and a mixed layer 150m sandwiched between the p-type semiconductor layer 150p and the n-type semiconductor layer 150 n. The p-type semiconductor layer 150p is disposed between the electron blocking layer 150e and the mixed layer 150m, and has a function of photoelectric conversion and/or hole transport. The n-type semiconductor layer 150n is disposed between the hole blocking layer 150h and the mixed layer 150m, and has a function of photoelectric conversion and/or electron transport. As shown in fig. 7B, the photoelectric conversion structure 151 includes, for example, a p-type semiconductor layer 151p, an n-type semiconductor layer 151n, and a mixed layer 151m interposed between the p-type semiconductor layer 151p and the n-type semiconductor layer 151 n. The p-type semiconductor layer 151p is arranged between the electron blocking layer 151e and the mixed layer 151m, and has a function of photoelectric conversion and/or hole transport. The n-type semiconductor layer 151n is arranged between the hole blocking layer 151h and the mixed layer 151m, and has a function of photoelectric conversion and/or electron transport.
As described later, each of the mixed layers 150m and 151m may include at least one of a p-type semiconductor and an n-type semiconductor.
The p-type semiconductor layers 150p and 151p each include, for example, an organic p-type semiconductor. The n-type semiconductor layers 150n and 151n each include, for example, an organic n-type semiconductor. Thus, the photoelectric conversion structure 150 includes, for example: an organic photoelectric conversion material comprising naphthalocyanine tin represented by the general formula (1), and an organic p-type semiconductor and an organic n-type semiconductor.
The organic p-type semiconductor is a donor organic semiconductor, and is mainly represented by a hole transporting organic compound, and is an organic compound having a property of easily providing electrons. In more detail, the organic p-type semiconductor refers to an organic compound having a small ionization potential when 2 organic materials are used in contact. Therefore, any organic compound may be used as the donor organic compound as long as it is an organic compound having electron donating property. For example, a metal complex having a triarylamine compound, a benzidine compound, a pyrazoline compound, a styrylamine compound, a hydrazone compound, a tritane compound, a carbazole compound, a polysilane compound, a thiophene compound, a phthalocyanine compound, a naphthalocyanine compound, a subphthalocyanine compound, a cyanine compound, a merocyanine compound, an oxonol compound, a polyamine compound, an indole compound, a pyrrole compound, a pyrazole compound, a polyarylene compound, a condensed aromatic carbocyclic compound (naphthalene derivative, anthracene derivative, phenanthrene derivative, naphthacene derivative, pyrene derivative, perylene derivative, fluoranthene derivative), a nitrogen-containing heterocyclic compound as a ligand, or the like can be used. The donor organic semiconductor is not limited to this, and any organic compound having a smaller ionization potential than an organic compound used as an acceptor organic compound described later may be used as the donor organic semiconductor. The acceptor organic compound is also referred to as an "n-type organic compound". The above-mentioned naphthalocyanine tin is an example of an organic p-type semiconductor material.
The organic n-type semiconductor is an acceptor organic semiconductor, and is mainly represented by an electron-transporting organic compound, and is an organic compound having a property of easily accepting electrons. More specifically, the organic n-type semiconductor refers to an organic compound having a relatively high electron affinity when 2 organic compounds are brought into contact and used. Therefore, any organic compound may be used as the acceptor organic compound as long as it is an organic compound having an electron accepting property. For example, a 5-to 7-membered heterocyclic compound having a fullerene, a fullerene derivative, a condensed aromatic carbocyclic compound (naphthalene derivative, anthracene derivative, phenanthrene derivative, naphthacene derivative, pyrene derivative, perylene derivative, fluoranthene derivative), a nitrogen atom, an oxygen atom, a sulfur atom (for example, pyridine, pyrazine, pyrimidine, pyridazine, triazine, quinoline, quinoxaline, quinazoline, phthalazine, cinnoline, isoquinoline, pteridine, acridine, phenazine, phenanthroline, tetrazole, pyrazole, imidazole, thiazole, oxazole, indazole, benzimidazole, benzotriazole, benzoxazole, benzothiazole, carbazole, purine, triazolopyridazine, triazolopyrimidine, tetrazine, oxadiazole, imidazopyridine, pyrrolidine, pyrrolopyridine, thiadiazolopyridine, dibenzoazepine, triphenylazepine, etc.), a polyarylene compound, a fluorene compound, a cyclopentadiene compound, a silyl compound, a metal complex containing nitrogen as a ligand, and the like can be used. Further, the present invention is not limited to this, and as described above, an organic compound having electron affinity larger than that of an organic compound used as a donor organic compound may be used as an acceptor organic semiconductor. The donor organic compound is also referred to as a "p-type organic compound".
The mixed layers 150m and 151m may be bulk heterojunction structure layers including an organic p-type semiconductor and an organic n-type semiconductor, respectively, for example. In the case where the mixed layers 150m and 151m are formed as layers having a bulk heterojunction structure, tin naphthalocyanine expressed by the above general formula (1) can be used as the organic p-type semiconductor material. As the organic n-type semiconductor material, for example, fullerene and/or a fullerene derivative can be used.
The material constituting the p-type semiconductor layer 150p may be the same as the p-type semiconductor material contained in the mixed layer 150m from the viewpoint of improving the photoelectric conversion efficiency. The material constituting the p-type semiconductor layer 151p may be the same as the p-type semiconductor material contained in the mixed layer 151 m. Similarly, the material constituting the n-type semiconductor layer 150n may be the same as the n-type semiconductor material contained in the mixed layer 150 m. The material constituting the n-type semiconductor layer 151n may be the same as the n-type semiconductor material included in the mixed layer 151 m. The bulk heterojunction structure is described in detail in patent document 7 (japanese patent No. 5553727). For reference, the disclosure of japanese patent No. 5553727 is incorporated by reference in its entirety into the present specification.
By using an appropriate material in accordance with a wavelength band in which detection is desired, an imaging device having sensitivity in the desired wavelength band can be realized. In addition, the material used for the photoelectric conversion layers 15a and 15b is not limited to an organic semiconductor material. At least one of the photoelectric conversion layers 15a and 15b may include an inorganic semiconductor material such as amorphous silicon or a compound semiconductor as a p-type semiconductor and/or an n-type semiconductor. At least one of the photoelectric conversion layers 15a and 15b may include a layer made of an organic material and a layer made of an inorganic material.
Further, the photoelectric conversion layer having sensitivity in the near infrared ray band using tin naphthalocyanine is described above, but the materials contained in the photoelectric conversion layers 15a and 15b are not limited to the photoelectric conversion materials used in the near infrared ray band. The photoelectric conversion layer 15b can be a photoelectric conversion layer having sensitivity in the visible light range by using subphthalocyanine as a p-type semiconductor and using fullerene and/or a fullerene derivative as an n-type semiconductor, for example. At least one of the photoelectric conversion layers 15a and 15b can be a photoelectric conversion layer having sensitivity in the ultraviolet band by using copper phthalocyanine as a p-type semiconductor and fullerene C60 as an n-type semiconductor, for example.
The structure of the photoelectric conversion layers 15a and 15b is not limited to the above examples. For example, the photoelectric conversion layer 15a may not include at least 1 of the hole blocking layer 150h, the electron blocking layer 150e, the p-type semiconductor layer 150p, and the n-type semiconductor layer 150 n. The photoelectric conversion layer 15b may not include at least 1 of the hole blocking layer 151h, the electron blocking layer 151e, the p-type semiconductor layer 151p, and the n-type semiconductor layer 151 n.
[ Photocurrent characteristics in photoelectric conversion layer ]
Next, the photocurrent characteristics in the photoelectric conversion layers 15a and 15b will be described. The following description will be made on the photocurrent characteristics of the photoelectric conversion layer 15a of the 1 st photoelectric conversion unit 13a, but the photoelectric conversion layer 15b of the 2 nd photoelectric conversion unit 13b may have the same photocurrent characteristics. Therefore, the photocurrent characteristics of the photoelectric conversion layer 15b of the 2 nd photoelectric conversion unit 13b may be described by replacing the 1 st photoelectric conversion unit 13a and the peripheral circuits connected to the 1 st photoelectric conversion unit 13a described below with the 2 nd photoelectric conversion unit 13b and the peripheral circuits connected to the 2 nd photoelectric conversion unit 13b corresponding to the components.
Fig. 8 is a diagram showing an exemplary photocurrent characteristic of the photoelectric conversion layer 15 a. In fig. 8, a curve of a thick solid line shows an exemplary current-voltage characteristic (I-V characteristic) of the photoelectric conversion layer 15a in a state of irradiated light. In fig. 8, an example of the I-V characteristics of the photoelectric conversion layer 15a in the state where light is not irradiated is collectively shown by a thick dotted line. Fig. 8 shows an example in which a bulk heterojunction structure obtained by co-vapor deposition of tin naphthalocyanine and fullerene C60 is applied to the photoelectric conversion layer 15a, but the combination of materials for exhibiting the illustrated I-V characteristics is not particularly limited.
Fig. 8 shows a change in the current density flowing between the main surfaces when the bias voltage applied between the 2 main surfaces of the photoelectric conversion layer 15a is changed at a constant illuminance. In this specification, the forward direction and the reverse direction in the bias voltage are defined as follows. When the photoelectric conversion layer 15a has a junction structure of a layered p-type semiconductor and a layered n-type semiconductor, a bias voltage that makes the potential of the layer of the p-type semiconductor higher than that of the layer of the n-type semiconductor is defined as a forward bias voltage. On the other hand, a bias voltage that makes the potential of the layer of the p-type semiconductor lower than that of the layer of the n-type semiconductor is defined as a reverse bias voltage. In the case where the photoelectric conversion layer 15a has a bulk heterojunction structure, as schematically shown in fig. 1 of japanese patent No. 5553727, p-type semiconductors are present more than n-type semiconductors on one of the 2 main surfaces of the bulk heterojunction structure opposed to the electrode, and n-type semiconductors are present more than p-type semiconductors on the other surface. Therefore, a bias voltage that makes the potential on the main surface side where the p-type semiconductor appears more than the n-type semiconductor higher than the potential on the main surface side where the n-type semiconductor appears more than the p-type semiconductor is defined as a forward bias voltage. In the present embodiment, for example, the voltage at which the potential of the counter electrode 12a is higher than the potential of the pixel electrode 11a is set to be a reverse bias voltage. On the other hand, the voltage that makes the potential of the counter electrode 12a lower than the potential of the pixel electrode 11a is a forward bias voltage.
As shown in fig. 8, the photocurrent characteristics of the photoelectric conversion layer 15a are characterized by the 3 voltage ranges, that is, the 1 st to 3 rd voltage ranges, in outline. The 1 st voltage range is a reverse bias voltage range, and is a voltage range in which the absolute value of the output current density increases as the reverse bias voltage increases. The 1 st voltage range may be a voltage range in which photocurrent increases as the bias voltage applied between the main surfaces of the photoelectric conversion layer 15a increases. The 2 nd voltage range is a voltage range of the positive bias, and is a voltage range in which the output current density increases as the forward bias voltage increases. That is, the 2 nd voltage range is a voltage range in which the forward current increases as the bias voltage applied between the main surfaces of the photoelectric conversion layer 15a increases. The 3 rd voltage range is a voltage range between the 1 st voltage range and the 2 nd voltage range. As described above, the sensitivity of the 1 st photoelectric conversion unit 13a is changed by changing the bias voltage applied to the photoelectric conversion layer 15a by the voltage supply circuit 32 a. Thus, the sensitivity at the time of image capturing using the 1 st photoelectric conversion unit 13a can be adjusted only by changing the applied bias voltage.
For example, in the case where the applied bias voltage is changed between 2 voltage values in the 1 st voltage range, the sensitivity of the 1 st photoelectric conversion portion 13a changes because the absolute value of the output current density is different. In addition, when the applied bias voltage is changed between the voltage value in the 1 st voltage range and the voltage value in the 3 rd voltage range, the sensitivity of the 1 st photoelectric conversion portion 13a is similarly changed. In this case, the sensitivity in the 1 st photoelectric conversion portion 13a after the bias voltage of the voltage value in the 3 rd voltage range is applied is substantially zero.
As with the 1 st photoelectric conversion unit 13a, the sensitivity of the 2 nd photoelectric conversion unit 13b is variable by changing the bias voltage applied to the photoelectric conversion layer 15b by the voltage supply circuit 32 b.
The 1 st to 3 rd voltage ranges can be distinguished by the slope of the curve of the photocurrent characteristics when linear vertical and horizontal axes are used. For reference, in fig. 8, the average slope of the curve in each of the 1 st voltage range and the 2 nd voltage range is represented by a thin solid line L1 and a thin solid line L2, respectively. As illustrated in fig. 8, the rates of change of the output current densities in the 1 st voltage range, the 2 nd voltage range, and the 3 rd voltage range with respect to the increase in the bias voltage are different from each other. The 3 rd voltage range is defined as: a voltage range in which a change rate of the output current density with respect to the bias voltage is smaller than a change rate in the 1 st voltage range and a change rate in the 2 nd voltage range. Alternatively, the 3 rd voltage range may be determined based on the position of the rise (fall) in the curve representing the I-V characteristic. The 3 rd voltage range is, for example, larger than-1V and smaller than +1v. In the 3 rd voltage range, even if the bias voltage is changed, the current density between the principal surfaces of the photoelectric conversion layer 15a hardly changes. As illustrated in fig. 8, in the 3 rd voltage range, the absolute value of the current density is, for example, 100 μa/cm 2 or less.
[ Example of operation of imaging device ]
Next, an operation example of the imaging device 100 according to the present embodiment will be described. The operation example described below is specifically an operation example in the case where the image capturing apparatus 100 acquires an image.
Fig. 9 is a diagram for explaining an example of the operation of the imaging device according to the present embodiment. Fig. 9 also partially illustrates the operation of the illumination device 200 included in the camera system 1. Fig. 9 shows the timing of the falling (or rising) of the synchronization signal, the temporal change in the magnitude of the bias voltage applied to the photoelectric conversion layers 15a and 15B, the timing of the resetting and exposure in each row of the pixel array PA (see fig. 3A and 3B), and the timing of the light emission of the illumination device 200.
More specifically, the uppermost curve (a) in fig. 9 represents the timing of the falling (or rising) of the vertical synchronization signal Vss. The example shown in fig. 9 shows an example in which the vertical synchronization signal Vss corresponding to the pixel 10a and the vertical synchronization signal Vss corresponding to the pixel 10b fall (or rise) at the same timing. The graph of fig. 9 (b) shows the timing of the falling (or rising) of the horizontal synchronizing signal hs. The example shown in fig. 9 shows an example in which the horizontal synchronizing signal hs corresponding to the pixel 10a and the horizontal synchronizing signal hs corresponding to the pixel 10b fall (or rise) at the same timing. The vertical synchronization signal Vss and the horizontal synchronization signal hs may be at different timings in the pixel 10a and the pixel 10 b. Fig. 9 (c) shows an example of a temporal change in the voltage vb_b applied from the voltage supply circuit 32b to the counter electrode 12b via the sensitivity control line 42 b. In part (d) of fig. 9, a temporal change in the potential Φ_b of the counter electrode 12b when the potential of the pixel electrode 11b is used as a reference is shown. The double-headed arrow g3_b in the curve of the potential Φ_b indicates the above-described 3 rd voltage range in the photoelectric conversion layer 15 b. Fig. 9 (e) shows an example of a temporal change in the voltage vb_a applied from the voltage supply circuit 32a to the counter electrode 12a via the sensitivity control line 42 a. In part (f) of fig. 9, a temporal change in the potential Φ_a of the counter electrode 12a when the potential of the pixel electrode 11a is used as a reference is shown. The double-headed arrow g3_a in the curve of the potential Φ_a indicates the above-described 3 rd voltage range in the photoelectric conversion layer 15 a. Fig. 9 (g) schematically shows the timing of resetting and exposure in each row of the pixel array PA. Fig. 9 (h) schematically shows the timing of light emission and extinction of the lighting device 200. In fig. 9 (h), a graph l_b shows the timing of light emission and extinction of the 2 nd light source 210b, and a graph l_a shows the timing of light emission and extinction of the 1 st light source 210 a.
An example of the operation of the imaging apparatus 100 will be described below with reference to fig. 3A, 3B, 4, and 9. For simplicity, an operation example in the case where the number of rows of pixels included in the pixel array PA is 8 is described here. Specifically, in fig. 9 (g), the 4 th row from r0_b to r3_b is a pixel row of the pixel 10b having the 2 nd photoelectric conversion portion 13b, and the 4 th row from r4_a to r7_a is a pixel row of the pixel 10a having the 1 st photoelectric conversion portion 13 a. The 2 nd photoelectric conversion portion 13b of the R0-b-th row to the R3-b-th row is laminated on the 1 st photoelectric conversion portion 13a of the R4-a-th row to the R7-a-th row, for example, and is in a positional relationship overlapping the 1 st photoelectric conversion portion 13a of the R4-a-th row to the R7-a-th row in a plan view. The arrangement of the pixel rows shown in the diagram (g) of fig. 9 is not necessarily identical to the arrangement of the actual pixel rows, and the actual pixel arrangement is not particularly limited.
When acquiring an image, first, reset of the charge accumulation regions of the pixels 10a and 10b in the pixel array PA and readout of the pixel signals after the reset are performed. For example, as shown in fig. 9, based on the vertical synchronization signal Vss, reset of the plurality of pixels 10b belonging to the r0_b-th row is started (time t 0). The rectangle of the additional dot hatching in the graph (g) of fig. 9 schematically represents the signal readout period. The readout period may include a reset period for resetting the electric potentials of the charge accumulation regions of the pixels 10a and 10b in part thereof.
In resetting the pixel 10b belonging to the R0 b row, the address transistor 26b whose gate is connected to the address control line 46b is turned on by controlling the potential of the address control line 46b of the R0 b row, and the reset transistor 28b whose gate is connected to the reset control line 48b is turned on by controlling the potential of the reset control line 48b of the R0 b row. Thereby, the charge accumulation node 41b is connected to the reset voltage line 44b, and the reset voltage Vr is supplied to the charge accumulation region. That is, the potentials of the gate electrode 24g of the signal detection transistor 24b and the pixel electrode 11b of the 2 nd photoelectric conversion portion 13b are reset to the reset voltage Vr. Thereafter, the reset pixel signal is read out from the pixel 10b of the r0_b row via the vertical signal line 47 b. The pixel signal obtained at this time is a pixel signal corresponding to the magnitude of the reset voltage Vr. After the pixel signal is read out, the reset transistor 28b and the address transistor 26b are turned off. In addition, in the case of reading out a signal corresponding to the amount of signal charge stored in the pixel 10b in the previous frame, the pixel signal may be read out before reset.
In this example, as shown in fig. 9, the reset and readout of the pixels belonging to each of the r0_b to r3_b and r4_a to r7_a rows are sequentially performed in units of rows in accordance with the horizontal synchronizing signal hs. The time t0 to the time t4 are the reset period and the readout period of the pixel 10b, and the time t4 to the time t8 are the reset period and the readout period of the pixel 10 a. Hereinafter, the interval of the pulses of the horizontal synchronizing signal hs, in other words, the period from when a certain row is selected until the next row is selected is sometimes referred to as a "1H period". In this example, the period from time t0 to time t1 corresponds to a 1H period. The period 1H is the same length as the period of the timing of falling (or rising) of the horizontal synchronizing signal hs.
Resetting and reading of the pixel 10a in the R4-th to R7-th rows a are performed by the same method as the above-described pixel 10 b. Specifically, describing the example of the r4_a row, first, the address transistor 26a whose gate is connected to the address control line 46a is turned on by the control of the potential of the address control line 46a of the r4_a row, and further, the reset transistor 28a whose gate is connected to the reset control line 48a is turned on by the control of the potential of the reset control line 48a of the r4_a row. Thereby, the charge accumulation node 41a is connected to the reset voltage line 44a, and the reset voltage Vr is supplied to the charge accumulation region. That is, the potential of the gate electrode 24g of the signal detection transistor 24a and the pixel electrode 11a of the 1 st photoelectric conversion portion 13a is reset to the reset voltage Vr. Thereafter, the reset pixel signal is read out from the pixel 10a of the r4_a row via the vertical signal line 47 a. After the pixel signal is read out, the reset transistor 28a and the address transistor 26a are turned off. In addition, in the case of reading out a signal corresponding to the amount of signal charge stored in the pixel 10a in the previous frame, the pixel signal may be read out before reset.
As shown in fig. 9, in a period from the start of image acquisition to the end of the reset of all rows of the pixel array PA and the readout of the pixel signals (time t0 to t 8), the voltage v3_b is applied from the voltage supply circuit 32b to the counter electrode 12b so that the potential difference between the pixel electrode 11b and the counter electrode 12b falls within the 3 rd voltage range. In this period, the voltage v3_a is applied from the voltage supply circuit 32a to the counter electrode 12a so that the potential difference between the pixel electrode 11a and the counter electrode 12a falls within the 3 rd voltage range. That is, in a period from the start of image acquisition to the start of the exposure period of the pixel 10a belonging to the R4-th to R7-th rows (time t 9), the photoelectric conversion layers 15a and 15b of the 1 st and 2 nd photoelectric conversion units 13a and 13b are in a state where the bias voltage in the 3 rd voltage range is applied.
In a state where the bias voltage in the 3 rd voltage range is applied to the photoelectric conversion layers 15a and 15b, the movement of the signal charges from the photoelectric conversion layers 15a and 15b to the charge accumulation region hardly occurs. This is because, in a state where the bias voltage in the 3 rd voltage range is applied to the photoelectric conversion layers 15a and 15b, almost all positive and negative charges generated by the irradiation of light are quickly recombined and disappear before being collected by the pixel electrode 11a or 11 b. Therefore, even when light enters the photoelectric conversion layers 15a and 15b in a state where the bias voltage in the 3 rd voltage range is applied to the photoelectric conversion layers 15a and 15b, accumulation of signal charges into the charge accumulation region hardly occurs. Therefore, unexpected sensitivity is suppressed from occurring in a period other than the exposure period. Such unexpected sensitivity is also referred to as "parasitic sensitivity".
In fig. 9 (g), when a certain line (for example, the R0 b line) is focused on, a period indicated by a rectangle with a dot-dash and a rectangle with a diagonal line represents a non-exposure period. The voltage v3_a for applying the bias voltage of the 3 rd voltage range to the photoelectric conversion layer 15a and the voltage v3_b for applying the bias voltage of the 3 rd voltage range to the photoelectric conversion layer 15b are not limited to 0V.
Next, after the reset of all the rows of the pixel array PA and the readout of the pixel signals are completed, the exposure period of the pixels 10a belonging to the r4_a-th row to the r7_a-th row is started based on the horizontal synchronizing signal hs (time t 9). In fig. 9 (g), white rectangles schematically represent exposure periods in the respective rows. The voltage applied to the counter electrode 12a is switched to a voltage ve_a different from the voltage v3_a by the voltage supply circuit 32a, and the exposure period of the pixel 10a starts. The voltage ve_a is, for example, a voltage (for example, about 10V) such that the potential difference between the pixel electrode 11a and the counter electrode 12a falls within the above-described 1 st voltage range. By applying the voltage ve_a to the counter electrode 12a, the signal charges (holes in this embodiment) in the photoelectric conversion layer 15a are collected by the pixel electrode 11a and accumulated in the charge accumulation region including the charge accumulation node 41 a.
The voltage applied to the counter electrode 12a is switched again to the voltage v3_a by the voltage supply circuit 32a, and the exposure period of the pixels 10a belonging to the r4_a line to the r7_a line ends (time t 14). As described above, in the present embodiment, the voltage applied to the counter electrode 12a is switched between the voltage v3_a and the voltage ve_a, whereby the exposure period and the non-exposure period are switched. That is, the exposure period is defined by changing the voltage applied between the pixel electrode 11a and the counter electrode 12a by the voltage supply circuit 32a. As is clear from fig. 9, in this example, the start (time t 9) and end (time t 14) of the exposure period of the pixels 10a belonging to the R4-th to R7-th rows are common to all the pixels 10a included in the pixel array PA.
Next, after the exposure period of the pixels 10a belonging to the r4_a to r7_a rows is ended, the exposure period of the pixels 10b belonging to the r0_b to r3_b rows is started based on the horizontal synchronizing signal hs (time t 15). The voltage applied to the counter electrode 12b is switched to a voltage ve_b different from the voltage v3_b by the voltage supply circuit 32b, and the exposure period of the pixel 10b starts. The voltage ve_b is, for example, a voltage (for example, about 10V) such that the potential difference between the pixel electrode 11b and the counter electrode 12b falls within the above-described 1 st voltage range. By applying the voltage ve_b to the counter electrode 12b, the signal charges (holes in this embodiment) in the photoelectric conversion layer 15b are collected by the pixel electrode 11b and accumulated in the charge accumulation region including the charge accumulation node 41 b.
The voltage applied to the counter electrode 12b is switched again to the voltage v3_b by the voltage supply circuit 32b, and the exposure period of the pixels 10b belonging to the R0_b to R3_b rows ends (time t 29). As described above, in the present embodiment, the voltage applied to the counter electrode 12b is switched between the voltage v3_b and the voltage ve_b, whereby the exposure period and the non-exposure period are switched. That is, the exposure period is defined by changing the voltage applied between the pixel electrode 11b and the counter electrode 12b by the voltage supply circuit 32 b. As is clear from fig. 9, in this example, the start (time t 15) and end (time t 29) of the exposure period of the pixels 10b belonging to the R0-th to R3-th rows are common to all the pixels 10b included in the pixel array PA.
As described above, the operation described here is an example in which the global shutter method is applied to both the pixel 10a having the 1 st photoelectric conversion unit 13a and the pixel 10b having the 2 nd photoelectric conversion unit 13b in the image pickup device 100.
As shown in fig. 9, the illumination device 200 causes the 1 st light source 210a to emit light during a period from the start (time t 9) to the end (time t 14) of the exposure period of the pixel 10 a. That is, the 1 st light source 210a of the illumination device 200 emits light in a period overlapping with the exposure period of the pixel 10a including the 1 st photoelectric conversion portion 13 a. In this example, the light emission period of the 1 st light source 210a is the same period as the exposure period of the pixel 10 a. Thus, during the exposure period of the pixel 10a, the reflected light, which is the light emitted from the 1 st light source 210a and reflected by the object, enters the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13 b. In addition, the 1 st light source 210a is turned off during the non-exposure period of the pixel 10 a. Further, a white rectangle in the diagram (h) of fig. 9 schematically represents the light emission period of the light source. The light source turning-off period is schematically represented by a rectangle with diagonal lines in fig. 9 (h).
The illumination device 200 causes the 2 nd light source 210b to emit light during the period from the start (time t 15) to the end (time t 29) of the exposure period of the pixel 10 b. That is, the 2 nd light source 210b of the illumination device 200 emits light in a period overlapping with the exposure period of the pixel 10b including the 2 nd photoelectric conversion portion 13 b. In this example, the light emission period of the 2 nd light source 210b is the same period as the exposure period of the pixel 10 b. Thus, during the exposure period of the pixel 10b, the reflected light, which is the light emitted from the 2 nd light source 210b and reflected by the object, enters the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13 b. In addition, the 2 nd light source 210b is turned off during the non-exposure period of the pixel 10 b.
In the camera system 1, for example, the timing of light emission of the illumination device 200 is controlled by the control unit 300. The control unit 300 acquires a signal indicating the driving timing of a pixel in the image pickup device 100 from the image pickup device 100, for example, and controls the light emission of the illumination device 200 based on the acquired signal. The control unit 300 may output a signal for controlling the timing of the exposure period in the imaging device 100 and the timing of the light emission period in the illumination device 200 to the imaging device 100 and the illumination device 200.
In this way, the illumination device 200 lights the 1 st light source 210a and the 2 nd light source 210b so as to be linked to the exposure period of each of the pixels 10a and 10b, and emits light. In this way, since the 1 st photoelectric conversion unit 13a or the 2 nd photoelectric conversion unit 13b irradiates the subject with illumination light having a wavelength band with sensitivity during the exposure period, the image quality of the image captured by the image capturing apparatus 100 can be improved. In addition, since the illumination device 200 does not emit light during the non-exposure period of each of the pixels 10a and 10b, the lifetime of the 1 st light source 210a and the 2 nd light source 210b can be prolonged and energy can be reduced.
As shown in fig. 9, in this operation example, the exposure period (time t15 to time t 29) of the pixel 10b does not overlap with the light emission period (time t9 to time t 14) of the 1 st light source 210a in the illumination device 200. That is, the 1 st light source 210a does not emit light during the exposure period of the pixel 10 b. Therefore, the light of the 1 st light source 210a does not affect the photoelectric conversion of the 2 nd photoelectric conversion portion 13 b. For example, when the 1 st band is a band in the near infrared band and the 2 nd band is a band in the visible band, the 1 st light source 210a emits near infrared rays, but the light emitted by the near infrared light source may have a component of visible light in a part thereof. Even in such a case, since the 1 st light source 210a does not emit light during the exposure period of the pixel 10b, it is possible to suppress light of a component affecting the photoelectric conversion of the 2 nd photoelectric conversion portion 13b from entering the 2 nd photoelectric conversion portion 13b and generate unexpected signal charges in the 2 nd photoelectric conversion portion 13 b. As a result, for example, occurrence of color shift can be suppressed in the obtained image. Similarly, the exposure period (time t9 to time t 14) of the pixel 10a does not overlap with the light emission period (time t15 to time t 29) of the 2 nd light source 210b in the illumination device 200. This can suppress generation of unexpected signal charges in the 1 st photoelectric conversion portion 13 a.
In addition, unlike the above, when the light emitted from the near infrared light source does not have a component of visible light in a part, unexpected signal charges may be generated in the 2 nd photoelectric conversion portion 13 b. For example, the wavelength band in which the 2 nd photoelectric conversion portion 13b has sensitivity may include not only the 2 nd wavelength band in the visible light wavelength band but also extend to a part of the near infrared light wavelength band. Specifically, for example, the 2 nd photoelectric conversion portion 13b may have sensitivity even in a wavelength band of about 680nm to 720 nm. In this case, even if the 1 st light source 210a emits only near infrared rays having a composition of 700nm to 1100nm, if the near infrared rays are incident on the 2 nd photoelectric conversion portion 13b, photoelectric conversion may occur in the 2 nd photoelectric conversion portion 13 b. In this case, in this operation example, since the 1 st light source 210a does not emit light during the exposure period of the pixel 10b, it is possible to suppress the incidence of light of a component affecting the photoelectric conversion of the 2 nd photoelectric conversion portion 13b to the 2 nd photoelectric conversion portion 13b and generate unexpected signal charges in the 2 nd photoelectric conversion portion 13 b. As a result, for example, occurrence of color shift can be suppressed in the obtained image.
Next, based on the horizontal synchronizing signal hs, signal charges are read out from pixels belonging to each row of the pixel array PA. In this example, from time t31, signal charges are read out from pixels in each of rows belonging to the r0_b row to the r3_b row and the r4_a row to the r7_a row in order of row units. Hereinafter, a period from when a pixel belonging to a certain row is selected to when a pixel belonging to the row is selected again may be referred to as a "1V period". In this example, the period from time t0 to time t31 corresponds to a 1V period. The 1V period corresponds to, for example, 1 frame period. The 1V period is the same length as the period of the timing of the falling (or rising) of the vertical synchronization signal Vss.
When the signal charge is read out from the pixel 10b belonging to the r0_b row after the exposure period is ended, the address transistor 26b of the r0_b row is turned on. Thus, the pixel signal corresponding to the amount of signal charge accumulated in the charge accumulation region of the pixel 10b during the exposure period is output to the vertical signal line 47 b. The reset transistor 28b may be turned on to reset the pixel 10b, and the reset pixel signal may be read as needed, after the pixel signal is read. After the pixel signal is read out, or after the pixel 10b is reset, the address transistor 26b is turned off, and the reset transistor 28b is turned off if necessary. The same operation is sequentially performed for the pixels 10b belonging to each of the R1-R3-R b rows and the pixels 10a belonging to each of the R4-R7-R a rows.
After the exposure period of the pixel 10a in the R4-th to R7-th rows is completed, the pixel 10b is read out in the same manner as the pixel 10 b. Specifically, the following description describes an example of the r4_a row, and first, the address transistor 26a of the r4_a row is turned on. Thus, the pixel signal corresponding to the amount of signal charge accumulated in the charge accumulation region of the pixel 10a during the exposure period is output to the vertical signal line 47 a. The reset transistor 28a may be turned on to reset the pixel 10a, and the reset pixel signal may be read as needed, subsequent to the pixel signal reading. After the pixel signal is read out, or after the pixel 10a is reset, the address transistor 26a is turned off, and the reset transistor 28a is turned off if necessary. The same operation is sequentially performed for the pixels 10a belonging to each of the r5_a to r7_a rows in units of rows.
After the signal charges are read out from the pixels belonging to each row of the pixel array PA after the exposure period from time t31, a difference between the signal read out after the exposure period and the signal read out between time t0 and time t8 can be obtained, and a signal from which fixed noise is removed. In the case of resetting after reading out the pixel signal from t31 after the exposure period, the difference between the reading out of the pixel signal after the resetting and the reading out of the pixel signal before the resetting may be obtained, thereby obtaining a signal from which the fixed noise is removed. In this case, the pixel signal may not be read out after reset between time t0 and time t 8.
In the non-exposure period of the pixel 10a, the voltage v3_a is applied to the counter electrode 12a, and therefore the photoelectric conversion layer 15a of the 1 st photoelectric conversion portion 13a is in a state of being applied with the bias voltage in the 3 rd voltage range. In addition, since the voltage v3_b is applied to the counter electrode 12b during the non-exposure period of the pixel 10b, the photoelectric conversion layer 15b of the 2 nd photoelectric conversion portion 13b is in a state of being applied with the bias voltage in the 3 rd voltage range. Therefore, even in a state where light is incident on the photoelectric conversion layers 15a and 15b, further accumulation of signal charges into the charge accumulation region hardly occurs. Therefore, occurrence of noise due to unexpected charge mixing is suppressed.
In addition, from the viewpoint of suppressing further accumulation of signal charges in the charge accumulation region, it is also conceivable to end the exposure period by applying a voltage obtained by reversing the polarity of the above-described voltage ve_a to the counter electrode 12 a. However, if the polarity of the voltage applied to the counter electrode 12a is simply reversed, the already-stored signal charge may move to the counter electrode 12a via the photoelectric conversion layer 15 a. The movement of the signal charge from the charge accumulation region to the counter electrode 12a via the photoelectric conversion layer 15a is observed as a black dot in the acquired image, for example. That is, the movement of the signal charge from the charge accumulation region to the opposite electrode 12a via the photoelectric conversion layer 15a may cause negative parasitic sensitivity. The same applies to the counter electrode 12b, the polarity of the voltage ve_b is reversed, and the voltage is obtained.
In this example, since the voltages applied to the counter electrodes 12a and 12b are changed again to the voltages v3_a and v3_b after the end of the exposure period, the photoelectric conversion layers 15a and 15b after the end of the accumulation of the signal charges into the charge accumulation region are in a state where the bias voltage in the 3 rd voltage range is applied. In a state where the bias voltage in the 3 rd voltage range is applied, the movement of the signal charges already stored in the charge storage region to the counter electrode 12a via the photoelectric conversion layer 15a can be suppressed. Also, the movement of the signal charges already stored in the charge storage region to the counter electrode 12b via the photoelectric conversion layer 15b can be suppressed. In other words, by applying the bias voltage in the 3 rd voltage range to the photoelectric conversion layers 15a and 15b, the signal charges accumulated during the exposure period can be held in the charge accumulation region. That is, occurrence of negative parasitic sensitivity due to loss of signal charge from the charge accumulation region can be suppressed.
As described above, in the present embodiment, the start and end of the exposure period are controlled by the voltage vb_a applied to the counter electrode 12a and the voltage vb_b applied to the counter electrode 12 b. That is, according to the present embodiment, the function of the global shutter can be realized without providing transfer transistors or the like in each pixel 10a and each pixel 10 b. In the present embodiment, the electronic shutter is executed by the control of the voltages vb_a and vb_b, not by the transfer of the signal charge through the transfer transistor, and thus a higher-speed operation can be performed. In addition, since transfer transistors and the like are not required to be provided separately in each pixel 10a and each pixel 10b, miniaturization of the pixel is also facilitated.
As described above, in this operation example, the exposure period of the pixel 10b does not overlap with the light emission period of the light of the 1 st light source 210a having the light emission peak in the 1 st wavelength band, which is invisible and has the sensitivity, of the 1 st photoelectric conversion portion 13 a. Thus, the light of the 1 st light source 210a does not affect the photoelectric conversion of the 2 nd photoelectric conversion portion 13 b. Therefore, the image captured by using the 2 nd photoelectric conversion portion 13b is output in a state where light of a component that affects the photoelectric conversion of the 2 nd photoelectric conversion portion 13b is suppressed from entering the 2 nd photoelectric conversion portion 13b and unexpected signal charges are generated in the 2 nd photoelectric conversion portion 13 b. This makes it possible for the image pickup apparatus 100 to suppress degradation of image quality.
In this operation example, the exposure period of the pixel 10a is shorter than the exposure period of the pixel 10b. For example, when the 1 st photoelectric conversion portion 13a of the pixel 10a has sensitivity in the near infrared band, the band gap of the photoelectric conversion material used for the 1 st photoelectric conversion portion 13a is narrow, and thus a dark current is easily generated by thermal excitation. Therefore, by making the exposure period of the pixel 10a shorter than that of the pixel 10b, the influence of dark current can be reduced, and deterioration of image quality can be suppressed. In addition, since the light emission period of the illumination device 200 that emits illumination light during the exposure period of the pixel 10a can be shortened, power consumption can be reduced and the lifetime of the light source can be prolonged.
In this operation example, the readout and reset of the pixels belonging to each of the rows r0_b to r3_b and r4_a to r7_a are sequentially performed in row units, but the present invention is not limited to this. The readout and reset of the pixels 10b in the R0-b row to the R3-b row and the readout and reset of the pixels 10a in the R4-a row to the R7-a row may be performed in the overlapping period if the circuits for readout are independently configured.
In this operation example, the light emission period of the 1 st light source 210a and the exposure period of the pixel 10a may be overlapped with each other, or may not be the same period. Similarly, the light emission period of the 2 nd light source 210b and the exposure period of the pixel 10b may be different from each other as long as they overlap each other.
In this operation example, the 2 nd light source 210b may not emit light. For example, when the 2 nd photoelectric conversion portion 13b has sensitivity in the visible light band, it is easy to use the 2 nd photoelectric conversion portion 13b to perform image capturing by using ambient light.
In this operation example, the light having the emission peak in the 1 st wavelength band having the sensitivity in the 1 st photoelectric conversion portion 13a may be irradiated from a lighting device or the like other than the lighting device 200.
In this operation example, the exposure period of the pixel 10a may be the same as the exposure period of the pixel 10b, or may be longer than the exposure period of the pixel 10 b.
In addition, when the image pickup device 110 is used instead of the image pickup device 100, the image pickup device 110 also operates so that the light emission period of the 1 st light source 210a does not overlap with the exposure period of the pixels including the photoelectric conversion portions other than the 1 st photoelectric conversion portion 13 a.
Comparative example
Next, a comparative example of the operation of the image pickup apparatus 100 will be described. Fig. 10 is a diagram for explaining a comparative example of the operation of the imaging apparatus. Parts (a) to (h) of fig. 10 represent the same items as parts (a) to (h) of fig. 9.
First, reset of the charge accumulation regions of the pixels 10a and 10b in the pixel array PA and readout of the pixel signals after reset are performed. For example, as shown in fig. 10, based on the vertical synchronization signal Vss, reset of the plurality of pixels 10b belonging to the r0_b-th row is started (time t 0). Then, in accordance with the horizontal synchronizing signal hs, reset and readout of pixels belonging to each of the R0-b-th row to R3-b-th row and the R4-a-th row to R7-a-th row are sequentially performed in units of rows.
Next, in the process of resetting the charge accumulation regions of the pixels 10a and 10b in the pixel array PA and reading out the pixel signals after the resetting, the voltage supply circuit 32b switches the voltage applied to the counter electrode 12b to a voltage ve_b different from the voltage v3_b, thereby starting the exposure period of the pixels 10b belonging to the R0_b line to the R3_b line (time t 5). The 2 nd light source 210b starts light emission simultaneously with the start of the exposure period of the pixel 10b (time t 5).
Next, after the reset of all rows of the pixel array PA and the readout of the pixel signals are completed and during the exposure period of the pixel 10b, the voltage supply circuit 32a switches the voltage applied to the counter electrode 12a to a voltage ve_a different from the voltage V3_a based on the horizontal synchronizing signal hs, thereby starting the exposure period of the pixel 10a belonging to the R4_a row to the R7_a row (time t 9). The 1 st light source 210a starts light emission simultaneously with the start of the exposure period of the pixel 10a (time t 9). The time t9 at which the 1 st light source 210a starts to emit light is during the exposure period of the pixel 10 b. Therefore, during the exposure period of the pixel 10b, the light from the 1 st light source 210a enters the 2 nd photoelectric conversion portion 13b, and unexpected signal charges are easily generated in the 2 nd photoelectric conversion portion 13 b.
At time t9 when the exposure period of the pixel 10a is started, the 2 nd light source 210b emits light. Therefore, during the exposure period of the pixel 10a, the light from the 2 nd light source 210b enters the 1 st photoelectric conversion portion 13a, and unexpected signal charges are easily generated in the 1 st photoelectric conversion portion 13 a.
Then, the voltage supply circuit 32b switches the voltage applied to the counter electrode 12b to the voltage v3_b again, and the exposure period of the pixels 10b belonging to the R0_b to R3_b rows ends (time t 29). The 2 nd light source 210b ends light emission simultaneously with the end of the exposure period of the pixel 10b (time t 29).
After the end of the exposure period of the pixels 10b belonging to the R0-b row to the R3-b row, signal charges are read out from the pixels belonging to the rows of the pixel array PA. In this example, from time t31, signal charges are read out from pixels in each of rows belonging to the r0_b row to the r3_b row and the r4_a row to the r7_a row in order of row units.
Then, the voltage supply circuit 32a switches the voltage applied to the counter electrode 12a to the voltage v3_a again, and the exposure period of the pixels 10a belonging to the r4_a row to the r7_a row ends (time t 33). The 1 st light source 210a ends light emission simultaneously with the end of the exposure period of the pixel 10a (time t 33).
As described above, in the comparative example, the exposure period of the pixel 10b overlaps with the light emission period of the 1 st light source 210 a. Therefore, during the exposure period of the pixel 10b, the light from the 1 st light source 210a enters the 2 nd photoelectric conversion portion 13b, and unexpected signal charges are generated in the 2 nd photoelectric conversion portion 13 b. As a result, image quality degradation occurs in the image captured using the 2 nd photoelectric conversion unit 13 b.
For example, when the 1 st band is a band in the near infrared band and the 2 nd band is a band in the visible light band and the imaging device 100 acquires a visible light image and a near infrared image, a color filter may be provided above the 2 nd photoelectric conversion unit 13 b. The color filters include, for example, a color filter that transmits wavelengths of red and near infrared rays, a color filter that transmits wavelengths of green and near infrared rays, and a color filter that transmits wavelengths of blue and near infrared rays. These color filters are arranged in bayer arrangement in the photosensitive region, for example. In this case, the light emitted from the 1 st light source 210a has a light emission peak in the near infrared band, but may have a component in the red wavelength. Therefore, if the 1 st light source 210a emits light during the exposure period of the pixel 10b, the light of the 1 st light source 210a passing through the color filter transmitting the wavelengths of red and near infrared rays enters the 2 nd photoelectric conversion portion 13 b. As a result, unexpected signal charges are generated in the pixel 10b provided with the color filters transmitting the wavelengths of red and near infrared rays, causing color shift of the obtained image.
On the other hand, in the operation example of the image pickup apparatus 100 described above, the exposure period of the pixel 10b and the light emission period of the 1 st light source 210a do not overlap. Therefore, unexpected signal charges as in the comparative example are not generated, and degradation of image quality in the image captured by using the 2 nd photoelectric conversion portion 13b can be suppressed.
The above description has been given of an example in which a color filter is provided, but is not limited thereto. Since degradation of image quality occurs regardless of the presence or absence of a color filter, an effect of suppressing degradation of image quality can be obtained even if the image pickup device 100 is not provided with a color filter.
(Other embodiments)
The imaging device and the camera system according to the present disclosure have been described above based on the embodiments, but the present disclosure is not limited to these embodiments. The manner in which various modifications, which are conceivable to those skilled in the art, are made without departing from the gist of the present disclosure is also included in the scope of the present disclosure. In addition, the respective components in the plurality of embodiments may be arbitrarily combined within a range not departing from the gist of the present disclosure.
For example, in the above embodiment, the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b are laminated, but not limited thereto. For example, the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b may be arranged on the same plane above the semiconductor circuit board 20. Fig. 11 is a schematic diagram showing a schematic configuration of an imaging device according to modification 1. As shown in fig. 11, an imaging device 100a according to modification 1 differs from the imaging device 100 according to the embodiment in that the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b are arranged on the same plane. Even if the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b are arranged on the same plane, the light from the 1 st light source 210a may be incident on the 2 nd photoelectric conversion portion 13b, and thus the image pickup device 100a can suppress degradation of image quality by performing the same operation as the above-described operation example.
In the above-described embodiment, for example, the image pickup device 100 drives both the pixels 10a and 10b in the global shutter system, but the present invention is not limited thereto. The image pickup apparatus 100 may switch the driving of at least one of the pixels 10a and 10b from the global shutter mode to the rolling shutter mode in accordance with the subject. In the rolling shutter driving of the pixel 10a, the voltage applied to the counter electrode 12a by the voltage supply circuit 32a may be fixed to the voltage ve_a in both the exposure period and the non-exposure period. In this case, the exposure period can be defined by the time from the timing of resetting to the timing of reading out the signal in the charge accumulation region including the charge accumulation node 41 a. Similarly, in the rolling shutter driving of the pixel 10b, the voltage applied to the counter electrode 12b by the voltage supply circuit 32b may be fixed to the voltage ve_b in both the exposure period and the non-exposure period. At this time, the exposure period can be defined by the time from the timing of resetting to the reading of the signal in the charge accumulation region including the charge accumulation node 41 b.
For example, in the above embodiment, a circuit connected to the pixel 10a and a circuit connected to the pixel 10b may be partially shared. For example, at least one of the voltage supply circuits 32a and 32b, the reset voltage sources 34a and 34b, the vertical scanning circuits 36a and 36b, the horizontal signal reading circuits 38a and 38b, and the power supply lines 40a and 40b may be a shared circuit connected to both the pixel 10a and the pixel 10 b.
In the above embodiment, for example, the signal detection circuit 14a and the signal detection circuit 14b may share a part of circuit elements. For example, the signal detection circuit 14a and the signal detection circuit 14b may share circuit elements subsequent to the signal detection transistor or the address transistor by having a switch or the like capable of switching the connection to the charge accumulation node 41a and the charge accumulation node 41 b.
In the above embodiment, the signal detection transistors 24a and 24b, the address transistors 26a and 26b, and the reset transistors 28a and 28b are each N-channel MOSFETs, but the present invention is not limited thereto. At least 1 of the signal detection transistors 24a and 24b, the address transistors 26a and 26b, and the reset transistors 28a and 28b may also be P-channel MOSFETs. At least 1 of the signal detection transistors 24a and 24b, the address transistors 26a and 26b, and the reset transistors 28a and 28b may be other transistors such as bipolar transistors instead of field effect transistors.
In the above embodiment, the 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 13b are each configured to have a pair of electrodes and a photoelectric conversion layer sandwiched between the pair of electrodes, but the present invention is not limited thereto. For example, one of the 1 st photoelectric conversion unit 13a and the 2 nd photoelectric conversion unit 13b may be configured to have a photodiode provided on the semiconductor substrate 20.
Fig. 12 is a schematic diagram showing an exemplary circuit configuration of a pixel including a2 nd photoelectric conversion portion and a peripheral circuit in the image pickup device according to modification 2. In the following description of the image pickup apparatus 500 according to modification 2, description will be given centering on points of distinction from the image pickup apparatus 100 according to the embodiment, and description of common points will be omitted or simplified.
The imaging device 500 according to modification 2 differs from the imaging device 100 according to the embodiment in that the pixel 510b is provided instead of the pixel 10b and the voltage supply circuit 32b is not provided. The pixel 510b is configured to have the 2 nd photoelectric conversion portion 513b and the charge storage node 541b instead of the 2 nd photoelectric conversion portion 13b and the charge storage node 41b of the pixel 10b, and further to have the transfer transistor 25b. In this modification, the pixel 510b is an example of the 2 nd pixel.
The imaging device 500 according to modification 2 is disposed in the camera system 1 instead of the imaging device 100, for example.
As shown in fig. 12, the image pickup device 500 includes a pixel array PA including a plurality of pixels 510b arranged in a 2-dimensional shape. The circuit configuration of the plurality of pixels 10a of the image pickup device 500 is similar to that of the image pickup device 100, for example, and the configuration shown in fig. 3A can be applied.
Each pixel 510b includes a2 nd photoelectric conversion portion 513b, a signal detection circuit 14b, a transfer transistor 25b, and a reset transistor 28b. As will be described later with reference to the drawings, the 2 nd photoelectric conversion portion 513b has a photodiode provided on the semiconductor substrate 20, receives incident light, and generates signal charges. The 2 nd photoelectric conversion portion 513b has sensitivity in a wavelength band within a visible light wavelength band, for example.
In the pixel 510b, the signal detection circuit 14b detects the signal charge generated by the 2 nd photoelectric conversion portion 513 b.
The transfer transistor 25b may be a field effect transistor. An example of applying an N-channel MOSFET as the transfer transistor 25b will be described below unless otherwise specified. The transfer transistor 25b may be a P-channel MOSFET. The transfer transistor 25b may be other than a field effect transistor, such as a bipolar transistor.
As schematically shown in fig. 12, the input terminal of the transfer transistor 25b has an electrical connection with the 2 nd photoelectric conversion portion 513 b. Specifically, the input terminal of the transfer transistor 25b is connected to the cathode electrode of the photodiode of the 2 nd photoelectric conversion portion 513 b. An output terminal of the transfer transistor 25b is connected to the charge accumulation node 541 b. That is, the 2 nd photoelectric conversion portion 513b is connected to the charge accumulation node 541b via the transfer transistor 25 b. The control terminal of the transfer transistor 25b is connected to a transfer control line 43 b. By controlling the potential of the transfer control line 43b, the signal charge generated by the 2 nd photoelectric conversion unit 513b and stored in the 2 nd photoelectric conversion unit 513b is transferred to the charge storage region including the charge storage node 541 b. The charge accumulation region including the charge accumulation node 541b accumulates the signal charges transferred from the 2 nd photoelectric conversion portion 513 b.
The transfer control line 43b is connected to the vertical scanning circuit 36b for each pixel row. Therefore, by applying a predetermined voltage to the transfer control line 43b by the vertical scanning circuit 36b, the signal charges of the 2 nd photoelectric conversion portion 513b of the plurality of pixels 510b arranged in each row can be transferred to the charge accumulation node 541b in units of rows.
In the pixel 510b, a control terminal of the signal detection transistor 24b is connected to the charge accumulation node 541 b. The signal detection transistor 24b amplifies and outputs the signal charge transferred from the 2 nd photoelectric conversion portion 513b to the charge accumulation region including the charge accumulation node 541 b.
In the pixel 510b, the reset transistor 28b is connected between the reset voltage line 44b and the charge accumulation node 541 b. The control terminal of the reset transistor 28b is connected to the reset control line 48b, and the potential of the charge accumulation node 541b can be reset to the reset voltage Vr by controlling the potential of the reset control line 48 b. When the transfer transistor 25b is in the on state, the potential of the 2 nd photoelectric conversion portion 513b is reset simultaneously with the charge storage node 541 b.
Next, a cross-sectional structure of a pixel of the imaging device 500 according to modification 2 will be described. Fig. 13 is a cross-sectional view schematically showing an exemplary cross-sectional structure of the pixels 10a and 510b according to modification 2.
As shown in fig. 13, the 2 nd photoelectric conversion portion 513b and the transfer transistor 25b are formed on the semiconductor substrate 20. Further, the signal detection transistor 24b, the address transistor 26b, and the reset transistor 28b are formed on the semiconductor substrate 20 at positions not shown in the cross section shown in fig. 13.
The semiconductor substrate 20 has impurity regions 25d and 513s. Here, the impurity regions 25d and 513s are N-type regions. The impurity regions 25d and 513s are, for example, diffusion layers formed in the semiconductor substrate 20.
The 2 nd photoelectric conversion portion 513b includes, for example, an impurity region 513s, and is an embedded silicon photodiode formed on the semiconductor substrate 20. The impurity region 513s is provided for each pixel 510 b.
The transfer transistor 25b includes an impurity region 25d, a part of the impurity region 513s, and a gate electrode 25g connected to a transfer control line 43b (see fig. 12) not shown in fig. 13. The gate electrode 25g is formed using a conductive material. The conductive material is, for example, polysilicon to which conductivity is imparted by doping impurities, but may be a metal material.
In the imaging device 500, a contact plug 57b and a wiring 58b are formed in the interlayer insulating layer 50. The contact plug 57b is formed of, for example, polysilicon to which conductivity is imparted by doping impurities. The wiring 58b is formed of a metal such as copper. The impurity region 25d is connected to one end of the contact plug 57 b. The other end of the contact plug 57b is connected to the wiring 58b. The contact plug 57b and the wiring 58b constitute a part of the charge accumulation node 541b (see fig. 12). The wiring 58b may be part of the wiring layer 56 b. In the configuration illustrated in fig. 13, the wiring 58b, the contact plug 57b, and the impurity region 25d function as a charge accumulation region of the pixel 510b to which the signal charge of the 2 nd photoelectric conversion portion 513b is transferred.
In the imaging device 500, the 1 st photoelectric conversion portion 13a is stacked above the 2 nd photoelectric conversion portion 513b via the interlayer insulating layer 50. The 1 st photoelectric conversion portion 13a overlaps with the charge accumulation region connected to the 2 nd photoelectric conversion portion 513b in a plan view. The 1 st photoelectric conversion portion 13a and the 2 nd photoelectric conversion portion 513b may not overlap each other in a plan view.
In the imaging device 500, the pixel electrode 11a of the 1 st photoelectric conversion portion 13a is, for example, a transparent electrode. In the example shown in fig. 13, the pixel electrode 11a overlaps the 2 nd photoelectric conversion portion 513b in a plan view, and therefore, the pixel electrode 11a is preferably a transparent electrode. In the case where the pixel electrode 11a and the 2 nd photoelectric conversion portion 513b do not overlap in plan view, the pixel electrode 11a may be an opaque electrode made of metal or the like. The light transmitted through the 1 st photoelectric conversion portion 13a and the interlayer insulating layer 50 enters the 2 nd photoelectric conversion portion 513 b. The 1 st photoelectric conversion portion 13a and the interlayer insulating layer 50 transmit at least a part of the light having the wavelength to which the 2 nd photoelectric conversion portion 513b has sensitivity.
Next, an example of the operation of the imaging device 500 according to modification 2 will be described. The operation example described below is specifically an operation example in the case where the image capturing apparatus 500 acquires an image. In the description of the operation example of the image pickup apparatus 500, description will be given centering on points of distinction from the operation example of the image pickup apparatus 100, and description of common points will be omitted or simplified.
Fig. 14 is a diagram for explaining an example of the operation of the imaging device 500 according to modification 2. Parts (a), (b) and (e) to (h) of fig. 14 represent the same items as parts (a), (b) and (e) to (h) of fig. 9. Fig. 14 (c) is a graph showing an example of a time change in the voltage Vtg applied to the control terminal of the transfer transistor 25b by the transfer control line 43 b. The transfer transistor 25b is turned off when the voltage Vtg applied to the control terminal is VL, and is turned on when the voltage Vtg applied to the control terminal is VH.
In this operation example, the readout period and exposure period of the signal of the pixel 10a are at the same timing as those of the pixel 10a in the operation example of the image pickup device 100. In this operation example, the readout period and exposure period of the signal of the pixel 510b are at the same timing as those of the pixel 10b of the operation example of the image pickup apparatus 100.
In this operation example, the same operation as in the operation example of the image pickup apparatus 100 described with reference to fig. 9 is performed until time t 14. Further, until time t14, voltage Vtg applied to the control terminal of transfer transistor 25b is voltage VL. Next, after the exposure period of the pixel 10a belonging to the r4_a to the r7_a rows is ended, the exposure period of the pixel 510b belonging to the r0_b to the r3_b rows is started based on the horizontal synchronizing signal hs (time t 15). The vertical scanning circuit 36b temporarily switches the voltage Vtg applied to the control terminal of the transfer transistor 25b from the voltage VL to the voltage VH, and the exposure period of the pixel 510b starts. Thereby, the transfer transistor 25b is temporarily turned on. At this time, the reset transistor 28b is also turned on, and the electric potential of the charge accumulation region of the pixel 510b and the 2 nd photoelectric conversion portion 513b is reset. The transfer transistor 25b is turned off again, and the signal charge generated by the light reception of the 2 nd photoelectric conversion unit 513b is accumulated in the 2 nd photoelectric conversion unit 513b without being transferred to the charge accumulation node 541 b. In addition, during the exposure period of the pixel 510b, the reset transistor 28b is also turned off. In the example shown in fig. 14, the exposure period starts at the timing when the transfer transistor 25b is turned on, but the timing when the transfer transistor 25b is turned off after being turned on may be set as the start of the exposure period.
Next, the voltage Vtg applied to the control terminal of the transfer transistor 25b is temporarily switched from the voltage VL to the voltage VH again by the vertical scanning circuit 36b, and the exposure period of the pixel 510b ends (time t 29). Thereby, the transfer transistor 25b is temporarily turned on, and the signal charge stored in the 2 nd photoelectric conversion portion 513b is transferred to the charge storage region including the charge storage node 541b via the transfer transistor 25 b. The reset transistor 28b is turned off from the end of the exposure of the pixel 510b to the readout period of the signal, and the signal charges transferred from the 2 nd photoelectric conversion portion 513b to the charge accumulation region of the pixel 510b and accumulated in the charge accumulation region are sequentially read out during the readout period of the signal of the pixel 510 b. In the example shown in fig. 14, the exposure period is ended at the timing when the transfer transistor 25b is turned on and then turned off, but the timing when the transfer transistor 25b is turned on may be set as the end of the exposure period.
As shown in fig. 14, the illumination device 200 causes the 1 st light source 210a to emit light during a period from the start (time t 9) to the end (time t 14) of the exposure period of the pixel 10 a. That is, the 1 st light source 210a of the illumination device 200 emits light in a period overlapping with the exposure period of the pixel 10a including the 1 st photoelectric conversion portion 13 a. In this example, the light emission period of the 1 st light source 210a is the same period as the exposure period of the pixel 10 a. Thus, during the exposure period of the pixel 10a, the reflected light, which is the light emitted from the 1 st light source 210a and reflected by the object, enters the 1 st photoelectric conversion portion 13a and the 2nd photoelectric conversion portion 513 b. In addition, the 1 st light source 210a is turned off during the non-exposure period of the pixel 10 a.
In addition, the illumination device 200 causes the 2nd light source 210b to emit light during the period from the start (time t 15) to the end (time t 29) of the exposure period of the pixel 510 b. That is, the 2nd light source 210b of the illumination device 200 emits light in a period overlapping with the exposure period of the pixel 510b including the 2nd photoelectric conversion portion 513 b. In this example, the light emission period of the 2nd light source 210b is the same period as the exposure period of the pixel 510 b. Thus, during the exposure period of the pixel 510b, the reflected light generated by the 2nd light source 210b and reflected by the object is incident on the 1 st photoelectric conversion portion 13a and the 2nd photoelectric conversion portion 513 b. In addition, the 2nd light source 210b is turned off during the non-exposure period of the pixel 510 b.
As described above, in the operation example of the image pickup apparatus 500, the exposure period (time t15 to time t 29) of the pixel 510b does not overlap with the light emission period (time t9 to time t 14) of the 1 st light source 210a in the illumination apparatus 200, as in the operation example of the image pickup apparatus 100. That is, the 1 st light source 210a does not emit light during the exposure period of the pixel 510 b. Therefore, the light of the 1 st light source 210a does not affect the photoelectric conversion of the 2 nd photoelectric conversion portion 513 b. This suppresses incidence of light of a component affecting the photoelectric conversion of the 2 nd photoelectric conversion portion 513b into the 2 nd photoelectric conversion portion 513b, and generates unexpected signal charges in the 2 nd photoelectric conversion portion 513 b. This makes it possible for the imaging device 500 to suppress degradation of image quality.
Industrial applicability
The imaging device according to the present disclosure is applicable to, for example, an image sensor. The imaging device according to the present disclosure can be used for medical cameras, robot cameras, security cameras, cameras mounted on vehicles, and the like.
Reference numerals illustrate:
1 Camera System
10A, 10b, 510b pixels
11A, 11b, 11c, 11d pixel electrode
12A, 12b, 12c, 12d counter electrodes
13A 1 st photoelectric conversion portion
13B, 513b 2 nd photoelectric conversion portion
13C, 13d photoelectric conversion part
14A, 14b, 14c, 14d signal detection circuit
15A, 15b, 15c, 15d photoelectric conversion layer
20 Semiconductor substrate
20T element separation region
24A, 24b signal detection transistor
24D, 24s, 25d, 26s, 28d, 28s, 513s impurity regions
24G, 25g, 26g, 28g gate electrode
25B transfer transistor
26A, 26b address transistors
28A, 28b reset transistors
32A, 32b voltage supply circuit
34A, 34b reset voltage source
36A, 36b vertical scanning circuit
37A, 37b column signal processing circuit
38A, 38b horizontal signal readout circuit
40A, 40b power supply line
41A, 41b, 541b charge accumulating nodes
42A, 42b sensitivity control line
43B transfer control line
44A, 44b reset voltage line
46A, 46b address control lines
47A, 47b vertical signal line
48A, 48b reset control line
49A, 49b horizontal common signal line
50 Interlayer insulating layer
52A, 52b, 52c, 52d plugs
53A, 53b, 58b wiring
54A, 54b, 55a, 55b, 57b contact plugs
56A, 56b wiring layers
61B, 61c, 61d insulating coating
62. 62A, 62b insulating layer
100. 100A, 110, 500 camera device
150. 151 Photoelectric conversion structure
150E, 151e electron blocking layer
150H, 151h hole blocking layer
150M, 151m mixed layer
150N, 151n n semiconductor layers
150P, 151p p semiconductor layers
200 Lighting device
210A 1 st light source
210B light source 2
300 Control part
600 Subject
602 Illumination light
604 Reflected light
PA pixel array
Claims (15)
1. An imaging device is provided with:
1 st pixel; and
The pixel number 2 is a pixel number,
The 1 st pixel includes:
A1 st photoelectric conversion section that generates a signal charge by photoelectric conversion and has sensitivity in the 1 st invisible band; and
A1 st signal detection circuit connected to the 1 st photoelectric conversion unit,
The 2 nd pixel includes:
a2 nd photoelectric conversion unit which generates signal charges by photoelectric conversion and has sensitivity in the 2 nd wavelength band; and
A 2 nd signal detection circuit connected to the 2 nd photoelectric conversion section,
The exposure period of the 2 nd photoelectric conversion portion is not overlapped with the light emission period of the light which is generated by illumination and has a light emission peak in the 1 st band and is incident to the 1 st photoelectric conversion portion.
2. The image pickup apparatus according to claim 1,
The 1 st pixel and the 2 nd pixel are effective pixels, respectively.
3. The image pickup apparatus according to claim 1,
The 1 st photoelectric conversion portion and the 2 nd photoelectric conversion portion are laminated.
4. The image pickup apparatus according to claim 2,
The 1 st photoelectric conversion portion and the 2 nd photoelectric conversion portion are laminated.
5. The image pickup apparatus according to any one of claim 1 to 4,
The image pickup apparatus is further provided with at least 1 voltage supply circuit,
The 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit each include:
A pixel electrode;
A counter electrode facing the pixel electrode; and
A photoelectric conversion layer between the pixel electrode and the counter electrode,
The sensitivity of at least one of the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit is variable by changing the voltage applied between the pixel electrode and the counter electrode by the at least 1 voltage supply circuit.
6. The image pickup apparatus according to claim 5,
The at least one of the 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit is driven in a global shutter system in which the change in the voltage applied between the pixel electrode and the counter electrode by the at least 1 voltage supply circuit defines an exposure period.
7. The image pickup apparatus according to claim 5,
The 1 st photoelectric conversion unit and the 2 nd photoelectric conversion unit are each driven in a global shutter system in which the exposure period is defined by the change in the voltage applied between the pixel electrode and the counter electrode by the at least 1 voltage supply circuit.
8. The image pickup apparatus according to any one of claims 1 to 4, further comprising:
a 3 rd photoelectric conversion unit; and
And a 3 rd signal detection circuit connected to the 3 rd photoelectric conversion unit.
9. The image pickup apparatus according to any one of claim 1 to 4,
The 1 st band is a band in the near infrared band,
The 2 nd band is a band within the visible light band.
10. The image pickup apparatus according to claim 9,
The exposure period of the 1 st photoelectric conversion portion is shorter than the exposure period of the 2 nd photoelectric conversion portion.
11. The image pickup apparatus according to any one of claim 1 to 4,
The 1 st band is a band within the ultraviolet band,
The 2 nd band is a band within the visible light band.
12. The image pickup apparatus according to any one of claim 1 to 4,
The 1 st band and the 2 nd band are bands within a near infrared band, respectively.
13. The image pickup apparatus according to any one of claim 1 to 4,
The 2 nd photoelectric conversion portion includes a silicon photodiode.
14. A camera system is provided with:
the image pickup apparatus according to any one of claims 1 to 4; and
A lighting device for emitting light having a light emission peak in the 1 st wavelength band,
The illumination device does not emit the light during the exposure period of the 2 nd photoelectric conversion portion.
15. A camera system as in claim 14,
The illumination device emits the light in a period overlapping with an exposure period of the 1 st photoelectric conversion portion.
Applications Claiming Priority (4)
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JP2021-196519 | 2021-12-02 | ||
JP2022131170 | 2022-08-19 | ||
JP2022-131170 | 2022-08-19 | ||
PCT/JP2022/041784 WO2023100613A1 (en) | 2021-12-02 | 2022-11-09 | Imaging device and camera system |
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CN118266230A true CN118266230A (en) | 2024-06-28 |
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