CN117218119B - Quality detection method and system for wafer production - Google Patents

Quality detection method and system for wafer production Download PDF

Info

Publication number
CN117218119B
CN117218119B CN202311472329.3A CN202311472329A CN117218119B CN 117218119 B CN117218119 B CN 117218119B CN 202311472329 A CN202311472329 A CN 202311472329A CN 117218119 B CN117218119 B CN 117218119B
Authority
CN
China
Prior art keywords
wafer
surface type
parameter
production
model
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202311472329.3A
Other languages
Chinese (zh)
Other versions
CN117218119A (en
Inventor
解树平
顾伟中
刘威
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Ruifei Photoelectric Technology Co ltd
Original Assignee
Suzhou Ruifei Photoelectric Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Ruifei Photoelectric Technology Co ltd filed Critical Suzhou Ruifei Photoelectric Technology Co ltd
Priority to CN202311472329.3A priority Critical patent/CN117218119B/en
Publication of CN117218119A publication Critical patent/CN117218119A/en
Application granted granted Critical
Publication of CN117218119B publication Critical patent/CN117218119B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/30Computing systems specially adapted for manufacturing

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention provides a quality detection method and a system for wafer production, which relate to the technical field of quality detection and comprise the following steps: acquiring three-dimensional surface type parameter information of a target wafer, performing visual modeling, generating a wafer three-dimensional surface type model, acquiring a wafer production design drawing, determining the wafer surface type design parameter information, generating a standard wafer three-dimensional surface type model, performing traversal comparison to obtain wafer surface type parameter comparison information, formulating wafer surface type analysis factors including three-dimensional contour errors PV, RMS, surface flaws, curvature, contour slope and size analysis, performing classification fitting analysis to obtain a wafer multi-factor quality detection result, performing optimization analysis to determine a wafer production optimization parameter scheme, and performing optimization production. The invention solves the technical problems that the traditional wafer quality detection method usually only pays attention to a single factor, lacks comprehensiveness and comprehensiveness, has more manual intervention and has subjective experience influence, so that the quality detection accuracy is lower.

Description

Quality detection method and system for wafer production
Technical Field
The invention relates to the technical field of quality detection, in particular to a quality detection method and a quality detection system for wafer production.
Background
Wafer production is a critical link in the semiconductor industry, has a decisive influence on the manufacturing quality and performance of electronic equipment, and is continuously evolving along with the rapid development of technology, for example, the rise of nanotechnology brings new opportunities for wafer production, and nanomaterials have unique excellent properties, such as better conductivity, thermal stability and optical performance, and smaller-sized wafers can be prepared by utilizing the nanotechnology, so that the integration level and the power consumption efficiency of chips are improved. As wafer production evolves, the quality inspection requirements for wafers are also becoming increasingly stringent.
The conventional wafer quality detection method usually used today has certain drawbacks, and the conventional wafer quality detection method usually only focuses on a single factor, lacks comprehensiveness and comprehensiveness, has more manual intervention, and has subjective experience influence, so that the quality detection accuracy is low. Therefore, there is some space for the quality inspection of wafer production to be improved.
Disclosure of Invention
The quality detection method and the system for wafer production are provided, and the technical problems that the traditional wafer quality detection method usually only focuses on a single factor, lacks comprehensiveness and comprehensiveness, is more in manual intervention, has the influence of subjective experience, and is low in quality detection accuracy are solved.
In view of the foregoing, the present application provides a quality inspection method and system for wafer production.
In a first aspect of the present disclosure, a quality inspection method for wafer production is provided, the method comprising: acquiring three-dimensional surface type parameter information of a target wafer through curved surface three-dimensional surface type detection equipment, and performing visual modeling based on the three-dimensional surface type parameter information to generate a wafer three-dimensional surface type model; acquiring a wafer production design drawing, and determining wafer surface type design parameter information according to the wafer production design drawing; generating a standard wafer three-dimensional surface model based on the wafer surface design parameter information; performing traversal comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model to obtain wafer surface model parameter comparison information; formulating wafer surface type analysis factors, wherein the wafer surface type analysis factors comprise three-dimensional contour errors PV, RMS, surface flaws, curvature, contour slope and size analysis; classifying, fitting and analyzing the wafer surface type parameter comparison information based on the wafer surface type analysis factors to obtain a wafer multi-factor quality detection result; and carrying out optimization analysis based on the wafer multi-factor quality detection result, determining a wafer production optimization parameter scheme, and carrying out optimized production on the target wafer according to the wafer production optimization parameter scheme.
In another aspect of the present disclosure, there is provided a quality inspection system for wafer production, the system for use in the above method, the system comprising: the visual modeling unit is used for acquiring three-dimensional surface type parameter information of the target wafer through curved surface three-dimensional surface type detection equipment, performing visual modeling based on the three-dimensional surface type parameter information and generating a wafer three-dimensional surface type model; the parameter information acquisition unit is used for acquiring a wafer production design drawing and determining wafer surface type design parameter information according to the wafer production design drawing; the model building unit is used for generating a standard wafer three-dimensional surface model based on the wafer surface design parameter information; the traversal comparison unit is used for carrying out traversal comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model to obtain wafer surface model parameter comparison information; the factor making unit is used for making wafer surface type analysis factors including three-dimensional contour errors PV, RMS, surface flaws, curvature, contour slope and size analysis; the fitting analysis unit is used for carrying out classified fitting analysis on the wafer surface type parameter comparison information based on the wafer surface type analysis factors to obtain wafer multi-factor quality detection results; and the optimized production unit is used for carrying out optimized analysis based on the wafer multi-factor quality detection result, determining a wafer production optimized parameter scheme and carrying out optimized production on the target wafer according to the wafer production optimized parameter scheme.
One or more technical solutions provided in the present application have at least the following technical effects or advantages:
acquiring three-dimensional surface type parameter information of a target wafer, performing visual modeling, generating a wafer three-dimensional surface type model, acquiring a wafer production design drawing, determining the wafer surface type design parameter information, generating a standard wafer three-dimensional surface type model, performing traversal comparison to obtain wafer surface type parameter comparison information, formulating wafer surface type analysis factors including three-dimensional contour errors PV, RMS, surface flaws, curvature, contour slope and size analysis, performing classification fitting analysis, obtaining a wafer multi-factor quality detection result, performing optimization analysis, determining a wafer production optimization parameter scheme, and performing optimization production on the target wafer. The method solves the technical problems that the traditional wafer quality detection method usually only pays attention to single factors, lacks comprehensiveness and comprehensiveness, has more manual intervention and has influence of subjective experience, so that the quality detection accuracy is lower, realizes the multidimensional evaluation of the wafer surface type analysis factors, realizes the comprehensive evaluation of the wafer quality, eliminates the influence of subjective experience through digital modeling and comparison analysis, is more objective and accurate in quality evaluation, and achieves the technical effect of improving the quality detection accuracy.
The foregoing description is only an overview of the technical solutions of the present application, and may be implemented according to the content of the specification in order to make the technical means of the present application more clearly understood, and in order to make the above-mentioned and other objects, features and advantages of the present application more clearly understood, the following detailed description of the present application will be given.
Drawings
Fig. 1 is a schematic flow chart of a quality inspection method for wafer production according to an embodiment of the present application;
fig. 2 is a schematic flow chart of obtaining three-dimensional surface type parameter information of a target wafer in a quality inspection method for wafer production according to an embodiment of the present application;
fig. 3 is a schematic flow chart of a wafer multi-factor quality detection result obtained in a quality detection method for wafer production according to an embodiment of the present application;
fig. 4 is a schematic diagram of a possible structure of a quality inspection system for wafer production according to an embodiment of the present application.
Reference numerals illustrate: the visual modeling unit 10, the parameter information acquisition unit 20, the model construction unit 30, the traversal comparison unit 40, the factor making unit 50, the fitting analysis unit 60 and the optimization production unit 70.
Detailed Description
The quality detection method for wafer production solves the technical problems that the traditional wafer quality detection method usually only focuses on single factors, lacks comprehensiveness and comprehensiveness, is subjected to more manual intervention, has the influence of subjective experience, and is low in quality detection accuracy, multi-dimensional assessment of wafer surface type analysis factors is achieved, comprehensive assessment of wafer quality is achieved, influence of subjective experience is eliminated through digital modeling and comparison analysis, and the technical effect of improving quality detection accuracy is achieved.
Having described the basic principles of the present application, various non-limiting embodiments of the present application will now be described in detail with reference to the accompanying drawings.
Example 1
As shown in fig. 1, an embodiment of the present application provides a quality inspection method for wafer production, the method including:
step S100: acquiring three-dimensional surface type parameter information of a target wafer through curved surface three-dimensional surface type detection equipment, and performing visual modeling based on the three-dimensional surface type parameter information to generate a wafer three-dimensional surface type model;
further, as shown in fig. 2, step S100 of the present application includes:
step S110: acquiring a curved surface visual detection module according to the curved surface three-dimensional surface type detection equipment, and performing multi-view detection on the target wafer through the curved surface visual detection module to obtain a wafer multi-view structured light pattern set;
specifically, according to the curved surface three-dimensional surface type detection device, namely the curved surface three-dimensional surface type detector, a curved surface visual detection module is obtained, and the module is used for part of a curved surface three-dimensional surface type detection device or system, including a camera, a light source, an image acquisition and processing unit and the like, and can detect and analyze optical characteristics of the surface of an object. The curved surface visual detection module is used for carrying out multi-view detection on the target wafer, namely, one surface is measured at multiple angles at the same time, and the images at the multiple angles can provide more comprehensive surface information and depth information, so that the shape and structure of the wafer can be accurately captured. In the multi-view detection process, a plurality of specially encoded structured lights are projected onto a wafer to be detected by a grating, two cameras forming a certain included angle synchronously acquire corresponding images, the images reflect the shape and structure of the surface of an object, and a multi-view structured light pattern set of the wafer is obtained through the multi-view detection, and the patterns provide a data basis for subsequent image processing and face reconstruction.
In one embodiment, step S120: filtering the wafer multi-view structured light pattern set to obtain a standard wafer multi-view structured light pattern set, which specifically may include:
step S121: performing wavelet decomposition on the image signals of the wafer multi-view structured light pattern set to obtain wafer image signal wavelet coefficients;
step S122: performing threshold quantization based on the wafer image signal wavelet coefficient, and determining a wafer image signal wavelet selection threshold;
step S123: intercepting the wafer image signal wavelet coefficient according to the wafer image signal wavelet selection threshold, and setting zero for a noise signal smaller than the wafer image signal wavelet selection threshold to obtain effective image signal information larger than the wafer image signal wavelet selection threshold;
step S124: and carrying out filtering reconstruction on the effective image signal information to obtain the standard wafer multi-view structured light pattern set.
Specifically, each image signal in the multi-view structured light pattern set of the wafer is input into a wavelet transform, such as a discrete wavelet transform (Discrete Wavelet Transform, DWT), a wavelet decomposition operation is performed to decompose the original image signal into a series of different frequency band wavelet coefficients, including low frequency and high frequency portions. The wavelet coefficients of the wafer image signals are extracted from the coefficients after wavelet decomposition, and the coefficients contain the variation and detail information of the image signals in different frequency ranges, so that the characteristics and the quality of the wafer surface can be described.
And carrying out statistical analysis on the wavelet coefficients, determining distribution conditions and characteristics of the wavelet coefficients through statistical indexes such as a calculation method and an average value, selecting a proper threshold according to preset conditions according to the result of the statistical analysis, for example, setting the threshold to be 60% of the result of the statistical analysis, and carrying out threshold selection by combining the characteristics and the characteristics of the wafer image so as to realize the requirements of balancing noise suppression and signal retention in a proper range.
And comparing the wavelet coefficient of the wafer image signal with a selected threshold value, setting the wavelet coefficient smaller than the threshold value to be zero, and retaining the wavelet coefficient larger than the threshold value. By zeroing out wavelet coefficients less than a threshold, noise or unimportant signal components can be removed, preserving important effective image signal information; the truncated wavelet coefficients represent signal components with significant peaks or structural features after selecting the threshold, which components correspond to the actual texture, detail and structural information of the wafer surface.
According to the requirements and application scenes, a proper filtering method is selected to reconstruct data, such as mean filtering, median filtering, gaussian filtering and the like, a filtering window with a fixed size is defined by taking mean filtering as an example, the window is slid on an image, the average value of pixels in each window is taken as the value of the reconstructed pixels, and therefore noise is effectively reduced. The obtained effective image signal information is input into a selected filtering method for filtering treatment, noise is removed in the filtering process, the image is smoothed, and important details and characteristics are reserved. The reconstruction process generates filtered image signals in which noise is reduced while wafer structure and features are preserved, which form a multi-view structured light pattern set for a standard wafer.
Through the steps, the effective image signal information is filtered and reconstructed, the interference of noise can be reduced, the image quality is improved, and meanwhile, the structure and the characteristics of the wafer are reserved, so that the multi-view structured light pattern set of the standard wafer is clearer and more reliable, and a more accurate and reliable data basis is provided for subsequent surface analysis and quality evaluation.
In one embodiment, step S130: constructing an attention mechanism constraint module, and processing the standard wafer multi-view structured light pattern set by using the attention mechanism constraint module to obtain a wafer multi-view foreground structured light pattern set, wherein the method specifically comprises the following steps of:
step S131: acquiring a standard plane type gray level image of the target wafer;
step S132: carrying out gray level distribution identification on the standard surface type gray level image to obtain a wafer surface type gray level interval serving as a surface type foreground characteristic;
step S133: acquiring a wafer detection environment gray level image, and carrying out gray level distribution identification on the wafer detection environment gray level image to obtain a planar background characteristic;
step S134: and constructing the attention mechanism constraint module based on the surface foreground features and the surface background features.
Specifically, a target wafer is photographed in a forward direction or in an oblique direction to obtain a gray image of the surface of the target wafer, the photographed color image is subjected to gray processing and converted into a single-channel gray image, and the image can provide key visual information for further analysis and processing.
And (3) carrying out gray level distribution analysis on the standard plane gray level image by calculating the number of pixels of each gray level in the image, determining a gray level interval of the wafer plane according to a gray level distribution analysis result, and selecting a gray level range with a large number of pixels as a plane foreground characteristic, namely, representing the gray level interval of the main part of the wafer surface. And determining a proper threshold value to represent the surface type foreground characteristic of the wafer according to the gray distribution recognition result, wherein the threshold value can be selected according to actual requirements and an image processing target, for example, the threshold value can be determined according to a method of adding or subtracting standard deviation of a certain multiple from a characteristic point and an average value of a gray histogram. And extracting foreground characteristic areas of the wafer surface type from the standard surface type gray level image by using the determined gray level area or threshold value, namely marking pixels in the gray level area as the foreground, wherein the characteristics are used for describing and comparing the gray level difference of the wafer surface.
And acquiring gray images in the actual environment of wafer detection, so as to ensure that the background images with and without wafer test lights are acquired simultaneously under the same illumination condition. And carrying out gray level distribution analysis on the acquired wafer detection environment gray level image to know the distribution condition of each gray level in the image. And determining the background characteristics of the wafer surface type according to the gray distribution analysis result, for example, selecting a gray level range with a large number of pixels or a high density as the background characteristics of the surface type. And determining a proper threshold value to represent the background characteristic of the wafer surface type according to the gray distribution identification result, the actual requirement and the image processing requirement. And extracting a planar background characteristic region from the wafer detection environment gray level image by using a gray level interval or a threshold value, namely marking pixels in the background characteristic range as the background.
According to the surface foreground features and the surface background features, corresponding feature information including gray scale, texture, edges and the like is extracted from the wafer image, the surface foreground features and the surface background features are fused through weighted fusion to form comprehensive feature representation, attention distribution is calculated according to the fused feature representation, the attention distribution indicates which areas are more important or need more attention in surface analysis, and according to the attention distribution, a constraint module is designed to strengthen or limit the analysis and optimization of the surface of the wafer and comprises operations of a filter, a weighting function, transformation and the like so as to process the foreground and the background of the surface. The constructed attention mechanism constraint module is applied to the analysis and optimization process of the wafer surface type, and the surface type result can be influenced by adjusting weight, filtering information or adjusting an analysis method and the like.
Inputting the multi-view structured light pattern set of the standard wafer into an attention mechanism constraint module, wherein the attention mechanism constraint module processes the multi-view structured light pattern set of the standard wafer according to an algorithm of the attention mechanism constraint module, and the processing comprises the steps of selecting and adjusting the weight of an image, focusing on a specific area, inhibiting background interference and the like so as to highlight morphological characteristics of a target wafer. After the processing of the attention mechanism, multi-view foreground structure light pattern sets of the wafer are obtained, the pattern sets emphasize important areas and details of the wafer, and form information of the target wafer is provided more clearly and accurately.
Step S140: and carrying out space reconstruction calculation on the wafer multi-view foreground structure light pattern set based on a reconstruction algorithm to obtain the three-dimensional surface type parameter information.
Specifically, according to actual requirements and application scenes, space reconstruction calculation is performed based on a reconstruction algorithm, and exemplary, the geometric shape of the surface of the wafer in a three-dimensional space is deduced according to texture difference, phase change or parallax information among images, a three-dimensional surface model of the wafer is obtained through the space reconstruction calculation, required three-dimensional surface shape parameter information such as curvature, average surface deviation, contour shape and the like is extracted from the model and used for describing and evaluating the surface state and quality of the wafer, and further quality detection, analysis and optimized production are facilitated.
Based on the obtained three-dimensional surface model parameter information, a computer graphics technology is used to perform visual modeling by inputting the parameter information into modeling software, such as AutoCAD (Autodesk Computer Aided Design, automatic computer aided design software, industry standard software for creating and editing two-dimensional and three-dimensional geometric figures), the modeling process comprises point cloud processing, curved surface reconstruction, polygon grid generation and the like, and in the modeling process, a three-dimensional surface model of a wafer is generated according to the three-dimensional surface model parameter information of the wafer, and is a virtual three-dimensional object for representing the surface shape and geometric features of the wafer.
Step S200: acquiring a wafer production design drawing, and determining wafer surface type design parameter information according to the wafer production design drawing;
specifically, a wafer production design drawing, which is a drawing describing in detail the shape, size, and structure of a wafer, including parameters such as the diameter, thickness, flatness, relief, edge curvature, etc., is obtained from a wafer manufacturer, a design engineer, etc. The production design diagram of the wafer is read and analyzed, the design requirements of the wafer surface type are understood, the flatness tolerance, the dimension tolerance and other surface type related parameter values of the wafer are determined according to the design requirements, and the wafer surface type design parameter information is determined according to the parameter values, so that the subsequent quality detection and analysis process can be facilitated, and the production of the wafer meets the design requirements.
Step S300: generating a standard wafer three-dimensional surface model based on the wafer surface design parameter information;
specifically, based on the wafer surface design parameter information, the geometric shape and size of the standard wafer are determined, including the diameter, thickness, flatness, curvature and the like of the wafer, and a virtual model is created according to the parameters by adopting the same software, so as to simulate the geometric shape and structure of the standard wafer.
During modeling, parameters and shapes of the model are adjusted to ensure that the model conforms to the wafer surface design parameter information, for example, mathematical functions or custom algorithms can be used to control curvature, surface relief, and other geometric features of the model. After adjustment and optimization, a three-dimensional surface model is generated, and the model is used as a reference of the surface model of a standard wafer and is used for comparing and analyzing the surface model of an actual wafer.
Step S400: performing traversal comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model to obtain wafer surface model parameter comparison information;
further, step S400 of the present application includes:
step S410: performing comparison reference point selection on the standard wafer three-dimensional surface model, and determining a model comparison reference point;
Step S420: performing feature point matching on the three-dimensional surface model of the wafer based on the model comparison reference points to obtain surface model matching points;
step S430: acquiring a space mapping relation between the model comparison datum point and the surface model registration point;
step S440: and carrying out superposition comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model based on the space mapping relation.
Specifically, the reference position of the fiducial point combines the following factors: the fiducial should have well-defined and easily identifiable features to ensure that it can be found accurately in the different models; feature locations on or at the bottom of the wafer are preferred because the bottom of the wafer is typically flat and stable; the fiducial should be as centered as possible on the wafer or represent the global morphological features of the wafer. For example, the bottom of the wafer can be selected as a reference point for model registration for accurate alignment.
Registration is performed in the standard wafer three-dimensional surface model based on the selected fiducial points, for example by adjusting and converting the coordinate system of the model, to align the fiducial points with corresponding positions in the model to be compared. According to the registered three-dimensional surface model of the standard wafer, the matching degree between the two models is calculated, the model is accurately matched with the model to be compared, and according to a matching result, the optimal feature matching is screened out and used as a matching point.
The method comprises the steps of obtaining coordinate positions of a model comparison datum point and a plane model registration point in space, calculating coordinate offset between the reference point and the plane model registration point, establishing a corresponding space transformation model according to the coordinate offset, performing geometric transformation operations including translation, rotation, scaling, affine transformation and the like, determining unknown parameters in the space transformation model through a parameter estimation method by utilizing coordinate data of the registration point, such as a least square method, and optimizing a fitting result through minimizing residual errors. Based on the spatial transformation model and the optimized parameters, a spatial mapping relationship between the model alignment reference point and the planar model alignment point is calculated and extracted, the mapping relationship describing how to transform from the reference point to the coordinates of the alignment point.
And according to the acquired space mapping relation and parameters, carrying out coordinate transformation on each point in the wafer model to be compared so as to realize registration with the standard model, superposing the converted wafer model to be compared with the standard wafer model, and displaying the superposition in a three-dimensional space in a transparency mode or representing the difference of the two models in a color coding mode and the like. The surface morphology, dimensional deviation and other geometric features of the wafer are evaluated by observing the local and global consistency of the superimposed models and analyzing the differences and similarities between the models.
In the superposition comparison process, the surface type parameter difference between the actual wafer and the standard wafer is calculated according to the matching result, wherein the surface type parameter difference comprises average surface deviation, contour error, curvature difference, size difference and the like, and wafer surface type parameter comparison information is generated according to the comparison result, and the information describes the difference and deviation degree of the actual wafer and the standard wafer on the surface type and can be used for subsequent quality analysis and optimization.
Step S500: formulating wafer surface type analysis factors, wherein the wafer surface type analysis factors comprise three-dimensional contour errors PV, RMS, surface flaws, curvature, contour slope and size analysis;
specifically, wafer surface profile analysis factors are formulated for analyzing and evaluating the surface profile of the wafer, wherein the three-dimensional profile error (Profile Variation, PV) describes the maximum fluctuation range of the wafer surface height value for evaluating the surface flatness of the wafer; root Mean Square error (RMS) calculates the Root Mean Square value of the wafer surface height value, reflecting the overall smoothness and curvature variation of the wafer surface; surface flaws refer to defects, contaminations or damages on the surface of a wafer, such as scratches, bubbles, cracks, etc., which affect the appearance quality and performance of the wafer; the curvature is used for evaluating the bending property and the convexity of the wafer by measuring the change condition of the curvature of the surface of the wafer; the profile slope describes the slope change condition of the profile line of the surface of the wafer, and plays an important role in measuring the inclination degree of a curved surface and improving the local morphology; dimensional analysis is used to evaluate dimensional characteristics of the wafer surface, including measurement and analysis of parameters such as diameter, thickness, flatness, etc. The wafer surface type analysis factors provide surface type information of different angles, and the quality and performance of the wafer can be comprehensively evaluated.
Step S600: classifying, fitting and analyzing the wafer surface type parameter comparison information based on the wafer surface type analysis factors to obtain a wafer multi-factor quality detection result;
further, as shown in fig. 3, step S600 of the present application includes:
step S610: performing association analysis based on the wafer surface type analysis factors and the wafer surface type parameter comparison information, and constructing a surface type factor parameter mapping space;
step S620: inputting the wafer surface type analysis factors into the surface type factor parameter mapping space in sequence for matching classification, and outputting surface type factor associated parameter information;
step S630: determining a surface type factor calculation rule according to the wafer surface type analysis factors;
step S640: and respectively carrying out fitting calculation on the surface type factor associated parameter information based on the surface type factor calculation rule to obtain the wafer multi-factor quality detection result.
Specifically, the surface analysis factors include flatness, curvature, size, etc., which are associated with corresponding relevant calculation parameters for different analysis factors. Carrying out association analysis on the comparison information of the surface type analysis factors and the surface type parameters, analyzing the relation, dependence or trend between different surface type analysis factors and the surface type parameters, quantifying the analysis result by using a statistical method, and constructing a surface type factor parameter mapping space according to the association analysis result, wherein the mapping space describes the association relation between different surface type analysis factors and corresponding surface type parameters.
The wafer surface type analysis factors are sequentially input into a surface type factor parameter mapping space in sequence, the input surface type analysis factors are compared and classified with the association modes or the matching conditions in the mapping space according to the surface type factor parameter mapping space, and according to the result of matching classification, the associated parameter information is extracted from the classification corresponding to each input wafer surface type analysis factor, and the result is output. And obtaining the associated parameter information of the wafer surface type analysis factors according to the output matching result, wherein the information comprises specific numerical values, ranges and categories and is used for determining the associated relation among different surface type analysis factors.
According to the existing surface type analysis factors including geometric parameters such as the size, thickness, flatness and curvature of the wafer, corresponding calculation rules are designed, including basic geometric calculation formulas and mathematical algorithms related to complex shapes and curves, so that the calculation results can be ensured to accurately reflect the surface type characteristics of the wafer. Illustratively, according to the relation between the surface type factors, how to jointly calculate or deduce new surface type factors is considered, for example, derivative parameters such as curvature or radial deviation are calculated through known geometric parameters, the accuracy and applicability of the designed calculation rule are verified according to the existing data and experiments, and if problems or improvement spaces are found, adjustment and optimization can be performed.
According to the previously determined surface type factor calculation rule, preparing a calculation formula corresponding to each surface type factor, providing surface type factor association parameter information as input to the corresponding surface type factor calculation rule, carrying out fitting calculation on each surface type factor association parameter information according to the surface type factor calculation rule, and illustratively, selecting parameter information related to the surface type factor according to the surface type factor calculation rule, selecting a proper fitting algorithm according to characteristics and requirements of the surface type factor, such as a linear regression method, a polynomial fitting method, a Gaussian process regression method and the like, carrying out parameter estimation on the selected fitting algorithm to obtain a best fit curve, obtaining a fitting calculation result, obtaining a multi-factor quality detection result according to the fitting calculation result, wherein the result can be a score of an evaluation index of each surface type factor, a relation between the surface type factors or an overall evaluation result, and is used for providing comprehensive surface type quality evaluation.
Step S700: and carrying out optimization analysis based on the wafer multi-factor quality detection result, determining a wafer production optimization parameter scheme, and carrying out optimized production on the target wafer according to the wafer production optimization parameter scheme.
Further, step S700 of the present application includes:
step S710: obtaining the type of the quality parameters of the substandard wafers and the degree of the substandard parameters to be optimized according to the multi-factor quality detection result of the wafers;
step S720: determining the wafer quality optimization control requirement based on the type of the unqualified wafer quality parameter and the degree to be optimized of the unqualified parameter;
step S730: constructing a wafer production control database, wherein the wafer production control database comprises wafer production control parameters and wafer production quality information;
step S740: and performing traversal matching optimization in the wafer production control database based on the wafer quality optimization control requirement to generate the wafer production optimization parameter scheme.
Specifically, analyzing the multi-factor quality detection result of the wafer, identifying indexes which do not meet the set standard, and determining the quality parameter types of the wafer which do not meet the standard, wherein the parameter types comprise different parameter types such as flatness, curvature, size, parallelism and the like. And for each unqualified parameter, evaluating the degree of the parameter to be optimized by comparing the difference between the actual value and the target value according to the set standard, the process requirement, the product requirement and the like.
Analyzing the type of the unqualified wafer quality parameters, knowing the influence degree and importance of each parameter on the product quality, determining the optimizing emergency degree of each unqualified parameter according to the evaluation result of the degree to be optimized, wherein the higher degree to be optimized indicates that the deviation of the parameter value from the target value is larger, the more urgent optimizing control is needed, and determining the requirement of the optimizing control of the wafer quality according to the type of the unqualified wafer quality parameters and the degree to be optimized, including determining which controlling measures need to be taken and at which stage to intervene.
Constructing a wafer production control database based on data in the wafer production process, wherein the data comprises wafer production control parameters and wafer production quality information, and the wafer production control parameters comprise process parameters, equipment settings, environmental factors, such as temperature, humidity, pressure, speed, and the like, which influence the wafer production process; the wafer production quality information comprises quality indexes such as the size, the shape, the surface quality, the defect rate, the impurity content and the like of the wafer, and is used for evaluating the quality and the performance of the wafer.
The data sources for constructing the wafer production control database include various approaches such as actual collection, sample testing, history, etc., wherein the collected history data may be data collected during wafer production over a period of time, such as data collected over a month and a quarter, for analysis and optimization of the database construction. The magnitude of the data collected depends on the scale of wafer production and the collection requirements, and enough samples need to be collected to represent the entire production process and data distribution.
It is noted that prior to constructing the wafer production control database, preprocessing of the collected data is required, including data cleaning, outlier removal, filling of missing data, data normalization, etc., to ensure the quality and availability of the data. The obtained wafer production control database can intensively manage and store wafer production control parameters and quality information, help optimize the production process, improve the quality control, and provide decision support, quality tracing and other functions.
According to the wafer quality optimization control requirement, defining the target of the required optimization, including reducing the defect rate, improving the dimensional accuracy, improving the surface flatness and the like, traversing the adjustable control parameters including the process parameters, the equipment setting, the environmental factors and the like in a wafer production control database according to the targets, matching the traversed control parameters with the wafer production quality information, screening out the proper control parameter combination according to the optimization target, and generating an optimized parameter scheme of the wafer production according to the matching and screening results.
And evaluating and verifying the generated optimized parameter scheme, verifying whether the evaluation scheme is feasible in actual production or not through simulation experiments, field tests or temporary application, adjusting and optimizing the generated parameter scheme according to the evaluation result and determining the final wafer production optimized parameter scheme through multiple times of adjustment and verification.
Through the steps, an optimized parameter scheme which meets the wafer quality optimization control requirement can be generated, so that the optimization of the wafer production process can be realized, the quality level is improved, and the product requirement is met.
In summary, the quality detection method and system for wafer production provided by the embodiments of the present application have the following technical effects:
Acquiring three-dimensional surface type parameter information of a target wafer, performing visual modeling, generating a wafer three-dimensional surface type model, acquiring a wafer production design drawing, determining the wafer surface type design parameter information, generating a standard wafer three-dimensional surface type model, performing traversal comparison to obtain wafer surface type parameter comparison information, formulating wafer surface type analysis factors including three-dimensional contour errors PV, RMS, surface flaws, curvature, contour slope and size analysis, performing classification fitting analysis, obtaining a wafer multi-factor quality detection result, performing optimization analysis, determining a wafer production optimization parameter scheme, and performing optimization production on the target wafer.
The method solves the technical problems that the traditional wafer quality detection method usually only pays attention to single factors, lacks comprehensiveness and comprehensiveness, has more manual intervention and has influence of subjective experience, so that the quality detection accuracy is lower, realizes the multidimensional evaluation of the wafer surface type analysis factors, realizes the comprehensive evaluation of the wafer quality, eliminates the influence of subjective experience through digital modeling and comparison analysis, is more objective and accurate in quality evaluation, and achieves the technical effect of improving the quality detection accuracy.
Example two
Based on the same inventive concept as the quality inspection method for wafer production in the foregoing embodiments, as shown in fig. 4, the present application provides a quality inspection system for wafer production, the system comprising:
the visual modeling unit 10 is used for acquiring three-dimensional surface type parameter information of the target wafer through curved surface three-dimensional surface type detection equipment, performing visual modeling based on the three-dimensional surface type parameter information and generating a wafer three-dimensional surface type model;
a parameter information obtaining unit 20, where the parameter information obtaining unit 20 is configured to obtain a wafer production design drawing, and determine wafer surface type design parameter information according to the wafer production design drawing;
a model building unit 30, where the model building unit 30 is configured to generate a standard wafer three-dimensional surface model based on the wafer surface design parameter information;
the traversal comparison unit 40 is configured to perform traversal comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model, so as to obtain wafer surface type parameter comparison information;
a factor formulation unit 50, wherein the factor formulation unit 50 is configured to formulate wafer surface type analysis factors, and the wafer surface type analysis factors include three-dimensional contour errors PV, RMS, surface flaws, curvatures, contour slopes, and dimensional analysis;
The fitting analysis unit 60 is configured to perform classification fitting analysis on the wafer surface type parameter comparison information based on the wafer surface type analysis factors, so as to obtain a wafer multi-factor quality detection result;
and the optimized production unit 70 is used for performing optimized analysis based on the wafer multi-factor quality detection result, determining a wafer production optimized parameter scheme, and performing optimized production on the target wafer according to the wafer production optimized parameter scheme.
Further, the system further comprises:
the multi-view detection unit is used for acquiring a curved surface visual detection module according to the curved surface three-dimensional surface type detection equipment, and carrying out multi-view detection on the target wafer through the curved surface visual detection module to obtain a wafer multi-view structured light pattern set;
the filtering unit is used for filtering the wafer multi-view structured light pattern set to obtain a standard wafer multi-view structured light pattern set;
the processing unit is used for constructing an attention mechanism constraint module, and processing the standard wafer multi-view structured light pattern set by using the attention mechanism constraint module to obtain a wafer multi-view foreground structured light pattern set;
And the reconstruction calculation unit is used for carrying out space reconstruction calculation on the wafer multi-view foreground structure light pattern set based on a reconstruction algorithm to acquire the three-dimensional surface type parameter information.
Further, the system further comprises:
the wavelet decomposition unit is used for carrying out wavelet decomposition on the image signals of the wafer multi-view structured light pattern set to obtain wafer image signal wavelet coefficients;
the threshold value quantization unit is used for carrying out threshold value quantization based on the wafer image signal wavelet coefficient and determining a wafer image signal wavelet selection threshold value;
the intercepting unit is used for intercepting the wafer image signal wavelet coefficient according to the wafer image signal wavelet selection threshold value, setting zero for a noise signal smaller than the wafer image signal wavelet selection threshold value, and acquiring effective image signal information larger than the wafer image signal wavelet selection threshold value;
and the filtering reconstruction unit is used for carrying out filtering reconstruction on the effective image signal information to obtain the standard wafer multi-view structured light pattern set.
Further, the system further comprises:
the gray image acquisition unit is used for acquiring a standard plane gray image of the target wafer;
The foreground feature acquisition unit is used for carrying out gray level distribution identification on the standard surface type gray level image to obtain a wafer surface type gray level interval which is used as a surface type foreground feature;
the distribution identification unit is used for acquiring a wafer detection environment gray level image, and carrying out gray level distribution identification on the wafer detection environment gray level image to obtain a plane type background characteristic;
and the constraint module construction unit is used for constructing the attention mechanism constraint module based on the face foreground features and the face background features.
Further, the system further comprises:
the correlation analysis unit is used for performing correlation analysis based on the wafer surface type analysis factors and the wafer surface type parameter comparison information, and constructing a surface type factor parameter mapping space;
the matching classification unit is used for sequentially inputting the wafer surface type analysis factors into the surface type factor parameter mapping space for matching classification and outputting surface type factor associated parameter information;
the calculation rule determining unit is used for determining a surface type factor calculation rule according to the wafer surface type analysis factors;
and the fitting calculation unit is used for respectively carrying out fitting calculation on the surface type factor associated parameter information based on the surface type factor calculation rule to obtain the wafer multi-factor quality detection result.
Further, the system further comprises:
the reference point selection unit is used for selecting the reference point for comparing the model of the three-dimensional surface of the standard wafer and determining a model comparison reference point;
the characteristic point matching unit is used for carrying out characteristic point matching on the three-dimensional surface model of the wafer based on the model comparison reference point to obtain surface model matching points;
the mapping relation acquisition unit is used for acquiring a spatial mapping relation between the model comparison reference point and the surface model registration point;
and the superposition comparison unit is used for carrying out superposition comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model based on the space mapping relation.
Further, the system further comprises:
the non-standard parameter acquisition unit is used for acquiring the type of the non-standard wafer quality parameter and the degree of optimization of the non-standard parameter according to the wafer multi-factor quality detection result;
the control demand determining unit is used for determining the wafer quality optimization control demand based on the type of the unqualified wafer quality parameter and the degree to which the unqualified wafer quality parameter is to be optimized;
the database construction unit is used for constructing a wafer production control database, and the wafer production control database comprises wafer production control parameters and wafer production quality information;
And the matching optimizing unit is used for performing traversal matching optimizing in the wafer production control database based on the wafer quality optimizing control requirement to generate the wafer production optimizing parameter scheme.
From the foregoing detailed description of the quality inspection method for wafer production, those skilled in the art will clearly understand that the quality inspection method and system for wafer production in this embodiment, for the apparatus disclosed in the embodiments, the description is relatively simple, and the relevant points refer to the description of the method section.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (6)

1. A quality inspection method for wafer production, the method comprising:
Acquiring three-dimensional surface type parameter information of a target wafer through curved surface three-dimensional surface type detection equipment, and performing visual modeling based on the three-dimensional surface type parameter information to generate a wafer three-dimensional surface type model;
acquiring a wafer production design drawing, and determining wafer surface type design parameter information according to the wafer production design drawing;
generating a standard wafer three-dimensional surface model based on the wafer surface design parameter information;
performing traversal comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model to obtain wafer surface model parameter comparison information;
formulating wafer surface type analysis factors, wherein the wafer surface type analysis factors comprise three-dimensional contour errors PV, RMS, surface flaws, curvature, contour slope and size analysis;
classifying, fitting and analyzing the wafer surface type parameter comparison information based on the wafer surface type analysis factors to obtain a wafer multi-factor quality detection result;
performing optimization analysis based on the wafer multi-factor quality detection result, determining a wafer production optimization parameter scheme, and performing optimized production on the target wafer according to the wafer production optimization parameter scheme;
the obtaining the three-dimensional surface type parameter information of the target wafer includes:
Acquiring a curved surface visual detection module according to the curved surface three-dimensional surface type detection equipment, and performing multi-view detection on the target wafer through the curved surface visual detection module to obtain a wafer multi-view structured light pattern set;
filtering the wafer multi-view structured light pattern set to obtain a standard wafer multi-view structured light pattern set;
constructing an attention mechanism constraint module, and processing the standard wafer multi-view structured light pattern set by using the attention mechanism constraint module to obtain a wafer multi-view foreground structured light pattern set;
performing space reconstruction calculation on the wafer multi-view foreground structure light pattern set based on a reconstruction algorithm to acquire the three-dimensional surface type parameter information;
the obtaining a standard wafer multi-view structured light pattern set includes:
performing wavelet decomposition on the image signals of the wafer multi-view structured light pattern set to obtain wafer image signal wavelet coefficients;
performing threshold quantization based on the wafer image signal wavelet coefficient, and determining a wafer image signal wavelet selection threshold;
intercepting the wafer image signal wavelet coefficient according to the wafer image signal wavelet selection threshold, and setting zero for a noise signal smaller than the wafer image signal wavelet selection threshold to obtain effective image signal information larger than the wafer image signal wavelet selection threshold;
And carrying out filtering reconstruction on the effective image signal information to obtain the standard wafer multi-view structured light pattern set.
2. The method of claim 1, wherein the constructing an attention mechanism constraint module comprises:
acquiring a standard plane type gray level image of the target wafer;
carrying out gray level distribution identification on the standard surface type gray level image to obtain a wafer surface type gray level interval serving as a surface type foreground characteristic;
acquiring a wafer detection environment gray level image, and carrying out gray level distribution identification on the wafer detection environment gray level image to obtain a planar background characteristic;
and constructing the attention mechanism constraint module based on the surface foreground features and the surface background features.
3. The method of claim 1, wherein obtaining wafer multi-factor quality inspection results comprises:
performing association analysis based on the wafer surface type analysis factors and the wafer surface type parameter comparison information, and constructing a surface type factor parameter mapping space;
inputting the wafer surface type analysis factors into the surface type factor parameter mapping space in sequence for matching classification, and outputting surface type factor associated parameter information;
Determining a surface type factor calculation rule according to the wafer surface type analysis factors;
and respectively carrying out fitting calculation on the surface type factor associated parameter information based on the surface type factor calculation rule to obtain the wafer multi-factor quality detection result.
4. The method of claim 1, wherein said performing a traversal comparison of said wafer three-dimensional surface model with said standard wafer three-dimensional surface model comprises:
performing comparison reference point selection on the standard wafer three-dimensional surface model, and determining a model comparison reference point;
performing feature point matching on the three-dimensional surface model of the wafer based on the model comparison reference points to obtain surface model matching points;
acquiring a space mapping relation between the model comparison datum point and the surface model registration point;
and carrying out superposition comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model based on the space mapping relation.
5. The method of claim 1, wherein determining a wafer production optimization parameter recipe comprises:
obtaining the type of the quality parameters of the substandard wafers and the degree of the substandard parameters to be optimized according to the multi-factor quality detection result of the wafers;
Determining the wafer quality optimization control requirement based on the type of the unqualified wafer quality parameter and the degree to be optimized of the unqualified parameter;
constructing a wafer production control database, wherein the wafer production control database comprises wafer production control parameters and wafer production quality information;
and performing traversal matching optimization in the wafer production control database based on the wafer quality optimization control requirement to generate the wafer production optimization parameter scheme.
6. A quality inspection system for wafer production, for implementing the quality inspection method for wafer production of any one of claims 1-5, comprising:
the visual modeling unit is used for acquiring three-dimensional surface type parameter information of the target wafer through curved surface three-dimensional surface type detection equipment, performing visual modeling based on the three-dimensional surface type parameter information and generating a wafer three-dimensional surface type model;
the parameter information acquisition unit is used for acquiring a wafer production design drawing and determining wafer surface type design parameter information according to the wafer production design drawing;
the model building unit is used for generating a standard wafer three-dimensional surface model based on the wafer surface design parameter information;
The traversal comparison unit is used for carrying out traversal comparison on the wafer three-dimensional surface model and the standard wafer three-dimensional surface model to obtain wafer surface model parameter comparison information;
the factor making unit is used for making wafer surface type analysis factors including three-dimensional contour errors PV, RMS, surface flaws, curvature, contour slope and size analysis;
the fitting analysis unit is used for carrying out classified fitting analysis on the wafer surface type parameter comparison information based on the wafer surface type analysis factors to obtain wafer multi-factor quality detection results;
and the optimized production unit is used for carrying out optimized analysis based on the wafer multi-factor quality detection result, determining a wafer production optimized parameter scheme and carrying out optimized production on the target wafer according to the wafer production optimized parameter scheme.
CN202311472329.3A 2023-11-07 2023-11-07 Quality detection method and system for wafer production Active CN117218119B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311472329.3A CN117218119B (en) 2023-11-07 2023-11-07 Quality detection method and system for wafer production

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311472329.3A CN117218119B (en) 2023-11-07 2023-11-07 Quality detection method and system for wafer production

Publications (2)

Publication Number Publication Date
CN117218119A CN117218119A (en) 2023-12-12
CN117218119B true CN117218119B (en) 2024-01-26

Family

ID=89041095

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311472329.3A Active CN117218119B (en) 2023-11-07 2023-11-07 Quality detection method and system for wafer production

Country Status (1)

Country Link
CN (1) CN117218119B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118229686A (en) * 2024-05-24 2024-06-21 苏州高视半导体技术有限公司 Method for detecting pattern defects and related product

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018040099A1 (en) * 2016-08-31 2018-03-08 深圳市唯特视科技有限公司 Three-dimensional face reconstruction method based on grayscale and depth information
CN114813757A (en) * 2022-05-19 2022-07-29 昆山缔微致精密电子有限公司 Full-angle appearance detection method and device for plastic product
CN116525517A (en) * 2023-06-19 2023-08-01 苏州鸿安机械股份有限公司 Positioning control method and system for conveying semiconductor wafers
CN116758045A (en) * 2023-07-05 2023-09-15 日照鲁光电子科技有限公司 Surface defect detection method and system for semiconductor light-emitting diode

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018040099A1 (en) * 2016-08-31 2018-03-08 深圳市唯特视科技有限公司 Three-dimensional face reconstruction method based on grayscale and depth information
CN114813757A (en) * 2022-05-19 2022-07-29 昆山缔微致精密电子有限公司 Full-angle appearance detection method and device for plastic product
CN116525517A (en) * 2023-06-19 2023-08-01 苏州鸿安机械股份有限公司 Positioning control method and system for conveying semiconductor wafers
CN116758045A (en) * 2023-07-05 2023-09-15 日照鲁光电子科技有限公司 Surface defect detection method and system for semiconductor light-emitting diode

Also Published As

Publication number Publication date
CN117218119A (en) 2023-12-12

Similar Documents

Publication Publication Date Title
CN109242828B (en) Three-dimensional defect detection method for 3D printed product based on grating projection multistep phase shift method
CN117218119B (en) Quality detection method and system for wafer production
CN114041168A (en) Automated 360-degree dense point object inspection
CN110335234B (en) Three-dimensional change detection method based on antique LiDAR point cloud
JP7037876B2 (en) Use of 3D vision in automated industrial inspection
CN111412842B (en) Method, device and system for measuring cross-sectional dimension of wall surface
CN109532021A (en) The molten product layer-by-layer detection method of defect of 3D printing based on the actinic abnormal point of structure
CN104713885A (en) Structured light-assisted binocular measuring method for on-line detection of PCB
WO2013061976A1 (en) Shape inspection method and device
CN114202470A (en) Three-dimensional reconstruction and automatic defect identification method for main bolt hole threads of pressure vessel
CN112116576A (en) Defect detection method based on polarization structure light imaging and improved Mask R-CNN
US10620135B2 (en) Identifying a source of nuisance defects on a wafer
CN112469962B (en) Methods, systems, and computer program products for CDSEM metrology of 3D-NAND
Amir et al. High precision laser scanning of metallic surfaces
CN116433672B (en) Silicon wafer surface quality detection method based on image processing
CN115100116A (en) Plate defect detection method based on three-dimensional point cloud
CN116152697A (en) Three-dimensional model measuring method and related device for concrete structure cracks
CN111524193A (en) Method and device for measuring two-dimensional size of object
CN114926360A (en) Image noise reduction processing working method based on noise estimation
Belhaoua et al. Estimation of 3D reconstruction errors in a stereo-vision system
RU2791416C1 (en) Method for three-dimensional reconstruction of the thread of the holes for the studs of the main connector of the reactor pressure vessel and automatic identification of defects
CN117495867B (en) Visual detection method and system for precision of small-module gear
Zhang et al. Deformation visual inspection of industrial parts with image sequence
CN116977331B (en) 3D model surface detection method based on machine vision
CN117173364B (en) Slicing and plotting method and system based on building three-dimensional plotting

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant