CN115498757A - Power management chip, power management method, electronic equipment and vehicle - Google Patents
Power management chip, power management method, electronic equipment and vehicle Download PDFInfo
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- CN115498757A CN115498757A CN202211438706.7A CN202211438706A CN115498757A CN 115498757 A CN115498757 A CN 115498757A CN 202211438706 A CN202211438706 A CN 202211438706A CN 115498757 A CN115498757 A CN 115498757A
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- power
- rail
- power rail
- management chip
- module
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
- H02J9/068—Electronic means for switching from one power supply to another power supply, e.g. to avoid parallel connection
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- Emergency Management (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Sources (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a power management chip, a power management method, electronic equipment and a vehicle. Therefore, when the master power rail and/or the internal backup power rail break down, the power supply module connected into the power management chip is connected with the power utilization module through the corresponding external backup power rail, and when the master power rail and/or the external backup power rail break down, the power supply module connected into the power management chip is connected with the power utilization module through the corresponding internal backup power rail. The two dimensions of internal or external backup ensure the normal use of the power supply rail, obviously improve the system robustness of the power supply management chip, and effectively avoid the consistency caused by only internally configuring a plurality of power supply rails with consistent process parameters.
Description
Technical Field
The invention relates to the technical field of power supplies, in particular to a power supply management chip, a power supply management method, electronic equipment and a vehicle.
Background
Power management chip (PMIC) power rail (power rail) damage often causes irreversible damage, making the entire chip unusable. However, in the current power supply design process, only the working state of the power supply rail is monitored, and when the power supply rail fails, the SOC chip is notified, an alarm is given and the power supply rail is replaced by related workers. These protection measures for the power supply cannot guarantee the timely repair of the power supply, and affect the reliability and stability of the product. For products with functional safety requirements, a serious safety and reliability problem can be caused.
Disclosure of Invention
In order to solve the above problems, embodiments of the present invention provide a power management chip, a power management method, an electronic device, and a vehicle.
According to a first aspect of the present invention, there is provided a power management chip, comprising: the power supply management chip is used for providing power for the power supply module and the power utilization module; the master power rail is provided with at least one internal backup power rail, is connected with the master power rail and is used for connecting a power supply module accessed to the power management chip with a power utilization module when the master power rail and/or the external backup power rail break down; the master power rail is provided with at least one external backup power rail, is connected with the master power rail and is used for connecting a power supply module accessed to the power management chip with a power utilization module when the master power rail and/or the internal backup power rail break down; wherein the external backup power rail is configured on an external integrated circuit having different process parameters than the power management chip.
According to an embodiment of the invention, the primary power rail is connected in parallel with the internal backup power rail and the external backup power rail configured for this primary power rail.
According to an embodiment of the present invention, the power management chip interacts with the external integrated circuit through a general purpose input output interface.
According to an embodiment of the present invention, the master power rail is configured with two or more external backup power rails, the two or more external backup power rails are configured on different external integrated circuits, and the two external integrated circuits have different process parameters.
According to an embodiment of the present invention, at least one of the following process parameters of the chip configuring the external backup power rail and the power management chip is different: package, power rail implementation and transistor circuit dimensions.
According to an embodiment of the present invention, the power management chip is a system-on-chip.
According to a second aspect of the present invention, there is also provided a power management method, the method comprising: detecting the connection state of a power supply module connected to a power management chip and a power utilization module; under the condition that the connection state shows that the connection is abnormal, switching and connecting the power supply module and a power rail of the power utilization module; wherein the power module and the power-using module are configured to be connectable by one of: the power management chip comprises a main backup power rail, at least one internal backup power rail and at least one external backup power rail, wherein the external backup power rail is configured on an external integrated circuit with different process parameters from the power management chip.
According to an embodiment of the present invention, the switching the power rail connecting the power supply module and the power consumption module includes: determining a first power rail currently used to connect the power supply module and the power consuming module; configuring a power rail for connecting the power supply module and the power utilization module as a second power rail outside the first power rail according to a set switching rule; wherein the first power rail and the second power rail are each one of a master power rail, at least one internal backup power rail, and at least one external backup power rail.
According to the third aspect of the present invention, there is also provided an electronic device, which includes the above power management chip.
According to a fourth aspect of the present invention, there is also provided a vehicle including the above electronic apparatus.
In the power management chip, the power management method, the electronic device and the vehicle of the embodiment of the invention, at least one internal backup power rail and at least one external backup power rail are configured for one master power rail of the power management chip, and the external backup power rail is configured on an external integrated circuit with different process parameters from the power management chip. Therefore, when the master power rail and/or the internal backup power rail break down, the power supply module connected into the power management chip is connected with the power utilization module through the corresponding external backup power rail, and when the master power rail and/or the external backup power rail break down, the power supply module connected into the power management chip is connected with the power utilization module through the corresponding internal backup power rail. Two dimensions are backed up from the inside or the outside to ensure the normal use of the power supply rail, the system robustness of the power supply management chip is obviously improved, and the consistency caused by only configuring a plurality of power supply rails with consistent process parameters from the inside is effectively avoided.
It is to be understood that the teachings of the present invention need not achieve all of the above-described benefits, but that certain embodiments may achieve certain technical benefits and other embodiments of the invention may achieve benefits not mentioned above.
Drawings
The above and other objects, features and advantages of exemplary embodiments of the present invention will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the invention are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which:
in the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.
FIG. 1 is a schematic diagram illustrating a component structure of a power management chip according to an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating a component structure of a power management chip in an application example of the embodiment of the present invention;
fig. 3 shows a schematic implementation flow diagram of a power management method according to an embodiment of the present invention.
Detailed Description
The principles and spirit of the present invention will be described with reference to a number of exemplary embodiments. It is understood that these embodiments are given only to enable those skilled in the art to better understand and to implement the present invention, and do not limit the scope of the present invention in any way. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
The technical scheme of the invention is further elaborated by combining the attached drawings and specific embodiments.
Fig. 1 shows a schematic diagram of a composition structure of a power management chip according to an embodiment of the present invention.
Referring to fig. 1, a PMIC1 according to an embodiment of the present invention includes at least one primary Power rail Power _1, where the primary Power rail Power _1 is used to connect a Power module (not shown) connected to the PMIC to a Power module (not shown). The primary Power rail Power rail _1 configures at least one internal backup Power rail Power rail _1 \ u backup _intand at least one external backup Power rail Power rail _1 \ u backup _ext. The external backup Power rail Power rail _1 back up u ext is configured on an external integrated circuit with different process parameters with a Power management chip.
It should be noted that the external integrated Circuit configured with the external backup Power rail _1_backup _extmay be a simple external Circuit, or another Power management chip PMIC2 having different process parameters from the Power management chip PMIC 1.
In this embodiment of the present invention, the process parameters of the power management chip PMIC2 configuring the external backup power rail and the power management chip PMIC1 may be different by at least one of the following:
1. the power management chip PMIC2 and the power management chip PMIC1 are packaged differently, and the different packages may include: DIP (dual pin carrier package), BQFP (quad flat package with bump), FQFP (fine pitch quad flat package with small pin center distance), CQFP (quad flat package with guard ring), PLCC (plastic leaded chip carrier), QTCP (quad pin carrier package) and SIP (single in-line package), etc.;
2. the power management chip PMIC2 and the power management chip PMIC1 have different power rail implementation structures, and the power rail implementation structures can comprise Buck circuits, boost circuits and the like;
3. the sizes of the transistor circuits of the power management chip PMIC2 and the power management chip PMIC1 are different, for example: the sizes of the transistor circuits of the power management chip PMIC2 and the power management chip PMIC1 may be one of 22nm, 28nm, 40nm, and the like, respectively. Here, the size of the transistor circuit of the power management chip may also be referred to as the etching size of the power management chip.
<xnotran> , Power rail _1_backup_Int Power rail _1 , Power rail _1 , . </xnotran> The external backup Power rail Power rail _1 back u ext is connected with the primary Power rail Power rail _1 and used for connecting a Power supply module connected to the Power management chip with the Power utilization module when the primary Power rail fails.
It should be noted here that a first power rail currently used for connecting the power supply module and the power utilization module may be determined, and when the first power rail fails, the power rail used for connecting the power supply module and the power utilization module may be configured as a second power rail other than the first power rail according to a set switching rule. The first power rail and the second power rail are each one of a master power rail, at least one internal backup power rail, and at least one external backup power rail. For example, when the first Power rail currently used for connecting the Power supply module and the Power-using module is the primary Power rail _1, when the primary Power rail _1 fails, the Power supply module connected to the Power management chip can be preferentially connected with the Power utilization module through the internal backup Power rail 1 back. The Power supply module connected to the Power management chip may also be preferentially connected to the Power utilization module through the external backup Power source Power rail _1 back up ext, and the Power management chip may be configured according to requirements in the actual application process, which is not limited in the present invention.
Fig. 2 is a schematic diagram illustrating a composition structure of a power management chip in an application example of the embodiment of the present invention.
Referring to fig. 2, IN an application example of the embodiment of the present invention, the power management Chip receives a System signal VSYS of a Chip driven by the PMIC1 through the IN pin, and the Chip driven by the PMIC1 may be an SOC (System on Chip). Here, EN _1 and EN _ N are also used to receive control signals of the system of chips driven by PMIC1, for example: SYS _ Signal1, SYS _ SignalX, and the like.
GPIO _1 to GPIO _Nare interaction channels of the power management chip PMIC1 and an external Circuit (external Circuit) or the power management chip PMIC2. Power rail _ 1-Power rail _ X are X primary Power rails configured for the PMIC 1. Power rail _1 \ u back up \ u Int-Power rail _ X _ back up _ Int are respectively main shares Power rail Power _1~ Power rail X configuration. Power rail _1 \_backup _ext ~ Power rail _ X _ backup _ ext are external backup Power rails configured for the primary Power rails Power rail _1~ Power rail _ X respectively. Power rail _1 is connected in parallel with power rail _1 \ u backup \, ext and power rail _1 \ u backup \, int. Similarly, power rail _ X is connected with power rail _ X _ backup _ ext and power rail _ X _ backup _ Int in parallel. Here, int represents inside, ext represents outside.
When detecting internal power supply rail and going wrong, can switch to through internal signal control and be connected power module and power module that will correspond the power management chip that inserts through inside backup power supply rail, or communicate through I2C agreement and external circuit or PMIC2, control is connected power module and power module that will correspond the power management chip that inserts through outside backup power supply rail.
Therefore, a common power management chip is avoided from the source, the power rail is used as a backup of the internal power rail in the chip, the problem of hardware random failure is effectively avoided, meanwhile, redundant external power rail backup is carried out on integrated circuits with different process parameters outside the chip, and the consistency failure of the internal power rail of the power management chip caused by the conditions of high temperature and the like is effectively avoided. The system robustness of the power management chip is obviously enhanced, and the safety level index of the computing function can be effectively optimized.
In this embodiment of the present invention, the first and second, power rail _1 of master Power rail and internal backup Power rail configured for the master Power rail Power rail _1 \\/backup _Intand external backup Power rail Power rail _1 _/backup _extare connected in parallel. The Power rail of the master Power rail Power _ X is connected in parallel with the internal backup Power rail Power _ X _ backup _ Int and the external backup Power rail Power _ X _ backup _ ext which are configured for the master Power rail.
In this embodiment of the present invention, the power management chip PMIC1 interacts with the external integrated Circuit Output Circuit or PMIC2 through GPIO (General-Purpose Input/Output), for example: GPIO _0 and GPIO _1 in fig. 2.
In order to further improve the reliability of the power management chip, in another embodiment of the present invention, two or more external backup power rails are configured for one master power rail, the two or more external backup power rails are configured on different external integrated circuits, and the two external integrated circuits have different process parameters.
It should be noted that, in the embodiment of the present invention, an internal backup power rail and an external power rail may be configured for each primary power rail, and the number of the internal backup power rails configured for each primary power rail and the number of the external power rails configured for each primary power rail may also be the same. Of course, the internal backup power rails and the external power rails with different process parameters and quantities may be configured for different primary power rails according to actual requirements such as reliability of the power rails.
In this embodiment of the present invention, the power management chip is a system-on-chip.
Fig. 3 is a schematic diagram illustrating an implementation flow of the power management method according to the embodiment of the present invention.
Referring to fig. 3, the power management method according to the embodiment of the present invention at least includes the following operation flows:
operation 301 detects a connection state of a power supply module and a power utilization module connected to the power management chip.
In operation 302, in a case that the connection state shows a connection abnormality, a power rail connecting the power supply module and the power consuming module is switched. Wherein the power supply module and the power utilization module are configured to be connectable by one of: the power management chip comprises a main backup power rail, at least one internal backup power rail and at least one external backup power rail, wherein the external backup power rail is configured on an external integrated circuit with different process parameters from the power management chip.
In this embodiment of the present invention, the switching of the power rail connecting the power supply module and the power consumption module includes: determining a first power rail currently used for connecting a power supply module and a power utilization module; configuring a power rail for connecting the power supply module and the power utilization module as a second power rail outside the first power rail according to a set switching rule; the first power rail and the second power rail are each one of a master power rail, at least one internal backup power rail, and at least one external backup power rail.
Other specific implementation details of the operation 301 and the operation 302 are similar to those of the electric management chip in the embodiment shown in fig. 1 and fig. 2, and are not described again here.
In the power management chip, the power management method, the electronic device and the vehicle of the embodiment of the invention, at least one internal backup power rail and at least one external backup power rail are configured for one master power rail of the power management chip, and the external backup power rail is configured on an external integrated circuit with different process parameters from the power management chip. Therefore, when the master power rail and/or the internal backup power rail break down, the power supply module connected into the power management chip is connected with the power utilization module through the corresponding external backup power rail, and when the master power rail and/or the external backup power rail break down, the power supply module connected into the power management chip is connected with the power utilization module through the corresponding internal backup power rail. The two dimensions of internal or external backup ensure the normal use of the power supply rail, obviously improve the system robustness of the power supply management chip, and effectively avoid the consistency caused by only internally configuring a plurality of power supply rails with consistent process parameters.
Similarly, based on the above power management chip and power management method, an embodiment of the present invention further provides an electronic device, where the electronic device includes the above power management chip.
Further, based on the power management chip and the power management method, an embodiment of the present invention further provides a vehicle, where the vehicle includes the electronic device.
Here, it should be noted that: the above description of the embodiments of the electronic device and the vehicle is similar to the foregoing description of the embodiments of the power management chip and the power management method shown in fig. 1 to 3, and has similar beneficial effects to the foregoing embodiments of the power management chip and the power management method shown in fig. 1 to 3, and therefore, no further description is given. For technical details that are not disclosed in the embodiments of the electronic device and the vehicle of the present invention, please refer to the description of the power management chip and the power management method shown in fig. 1 to 3 of the present invention for brevity, and therefore, detailed description thereof is omitted.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a component of' 8230; \8230;" does not exclude the presence of another like element in a process, method, article, or apparatus that comprises the element.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described device embodiments are merely illustrative, for example, the division of a unit is only one logical function division, and there may be other division ways in actual implementation, such as: multiple units or components may be combined, or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the coupling, direct coupling or communication connection between the components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between the devices or units may be electrical, mechanical or in other forms.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units; can be located in one place or distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, all the functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately regarded as one unit, or two or more units may be integrated into one unit; the integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
Those of ordinary skill in the art will understand that: all or part of the steps for realizing the method embodiments can be completed by hardware related to program instructions, the program can be stored in a computer readable storage medium, and the program executes the steps comprising the method embodiments when executed; and the aforementioned storage medium includes: various media that can store program codes, such as a removable Memory device, a Read Only Memory (ROM), a magnetic disk, or an optical disk.
Alternatively, the integrated unit of the present invention may be stored in a computer-readable storage medium if it is implemented in the form of a software functional module and sold or used as a separate product. Based on such understanding, the technical solutions of the embodiments of the present invention may be essentially implemented or a part contributing to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the methods of the embodiments of the present invention. And the aforementioned storage medium includes: a removable storage device, a ROM, a magnetic or optical disk, or other various media that can store program code.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and shall cover the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A power management chip, the power management chip comprising:
the power supply management chip is used for providing power for the power supply module and the power utilization module;
the master power rail is provided with at least one internal backup power rail, is connected with the master power rail and is used for connecting a power supply module accessed to the power management chip with a power utilization module when the master power rail and/or the external backup power rail break down;
the master power rail is provided with at least one external backup power rail, is connected with the master power rail and is used for connecting a power supply module accessed to the power management chip with a power utilization module when the master power rail and/or the internal backup power rail break down;
wherein the external backup power rail is configured on an external integrated circuit having different process parameters than the power management chip.
2. The power management chip of claim 1, the primary power rail being connected in parallel with the internal backup power rail and the external backup power rail configured for this primary power rail.
3. The power management chip of claim 1, the power management chip interacting with the external integrated circuit through a general purpose input output interface.
4. The power management chip of claim 1, the master power rail configured with two or more external backup power rails configured on different external integrated circuits, and the two external integrated circuits having different process parameters.
5. The power management chip of any of claims 1-4, wherein the chip configuring the external backup power rail differs from the power management chip in at least one of the following process parameters: package, power rail implementation and transistor circuit dimensions.
6. The power management chip of any of claims 1-4, which is a system-on-chip.
7. A method of power management, the method comprising:
detecting the connection state of a power supply module connected to a power management chip and a power utilization module;
under the condition that the connection state shows that the connection is abnormal, switching and connecting the power supply module and a power rail of the power utilization module;
wherein the power supply module and the power consuming module are configured to be connectable by one of: the power management chip comprises a main backup power rail, at least one internal backup power rail and at least one external backup power rail, wherein the external backup power rail is configured on an external integrated circuit with different process parameters from the power management chip.
8. The method of claim 7, the switching a power rail connecting the power module and the powered module, comprising:
determining a first power rail currently used to connect the power module with the power-consuming module;
configuring a power rail for connecting the power supply module and the power utilization module as a second power rail outside the first power rail according to a set switching rule;
wherein the first power rail and the second power rail are each one of a master power rail, at least one internal backup power rail, and at least one external backup power rail.
9. An electronic device comprising the power management chip of any one of claims 1-6.
10. A vehicle comprising the electronic device of claim 9.
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| CN202211438706.7A CN115498757B (en) | 2022-11-17 | 2022-11-17 | Power management chip, power management method, electronic equipment and vehicle |
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| CN202211438706.7A CN115498757B (en) | 2022-11-17 | 2022-11-17 | Power management chip, power management method, electronic equipment and vehicle |
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| CN115498757B CN115498757B (en) | 2023-02-21 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101771291A (en) * | 2009-01-07 | 2010-07-07 | 四零四科技股份有限公司 | Low-voltage double-power supply loop device and control method thereof |
| CN106826825A (en) * | 2017-02-13 | 2017-06-13 | 哈尔滨工业大学深圳研究生院 | A kind of many mechanical arm controlled in wireless cabinets and many mechanical arm control systems |
| CN217767435U (en) * | 2021-12-28 | 2022-11-08 | 北京奇兵智能科技有限公司 | Profibus bus double-channel redundant communication module |
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2022
- 2022-11-17 CN CN202211438706.7A patent/CN115498757B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101771291A (en) * | 2009-01-07 | 2010-07-07 | 四零四科技股份有限公司 | Low-voltage double-power supply loop device and control method thereof |
| CN106826825A (en) * | 2017-02-13 | 2017-06-13 | 哈尔滨工业大学深圳研究生院 | A kind of many mechanical arm controlled in wireless cabinets and many mechanical arm control systems |
| CN217767435U (en) * | 2021-12-28 | 2022-11-08 | 北京奇兵智能科技有限公司 | Profibus bus double-channel redundant communication module |
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