CN110687961A - DC level adjusting circuit - Google Patents
DC level adjusting circuit Download PDFInfo
- Publication number
- CN110687961A CN110687961A CN201911095597.1A CN201911095597A CN110687961A CN 110687961 A CN110687961 A CN 110687961A CN 201911095597 A CN201911095597 A CN 201911095597A CN 110687961 A CN110687961 A CN 110687961A
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- electrode
- triode
- pwm signal
- resistor
- correspondingly
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- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims abstract description 14
- 230000001105 regulatory effect Effects 0.000 claims abstract description 6
- 239000003990 capacitor Substances 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 229910044991 metal oxide Inorganic materials 0.000 abstract description 2
- 150000004706 metal oxides Chemical class 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000003321 amplification Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60R—VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
- B60R1/00—Optical viewing arrangements; Real-time viewing arrangements for drivers or passengers using optical image capturing systems, e.g. cameras or video systems specially adapted for use in or on vehicles
- B60R1/02—Rear-view mirror arrangements
- B60R1/08—Rear-view mirror arrangements involving special optical features, e.g. avoiding blind spots, e.g. convex mirrors; Side-by-side associations of rear-view and other mirrors
- B60R1/083—Anti-glare mirrors, e.g. "day-night" mirrors
- B60R1/088—Anti-glare mirrors, e.g. "day-night" mirrors using a cell of electrically changeable optical characteristic, e.g. liquid-crystal or electrochromic mirrors
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Multimedia (AREA)
- Mechanical Engineering (AREA)
- Amplifiers (AREA)
Abstract
The embodiment of the invention provides a direct current level regulating circuit, which comprises an MOS (metal oxide semiconductor) tube S, a triode Q and a PWM (pulse width modulation) signal generating module, wherein: the base electrode, the collector electrode and the emitter electrode of the triode Q are respectively and correspondingly connected with the output end of the PWM signal generation module, the grid electrode of the MOS tube S and the ground end GND, and the base electrode and the emitter electrode are also connected through a first resistor R1; the source electrode and the drain electrode of the MOS tube S are respectively and correspondingly connected to an external power supply and the output end of the direct-current level regulating circuit, and the source electrode and the grid electrode of the MOS tube S are also connected through a second resistor R2; the triode Q is correspondingly in a conducting state, an amplifying state or a cut-off state according to the PWM signal provided by the PWM signal generating module, and the MOS tube S is correspondingly in an incomplete conducting state when the triode Q is in the amplifying state. In the embodiment, the MOS transistor S and the triode Q are arranged, and the duty ratio of the PWM signal is changed to realize the dynamic adjustment of the direct current level; and the circuit elements are few, so that the production cost is reduced.
Description
Technical Field
The embodiment of the invention relates to the technical field of current regulation circuits, in particular to a direct current level regulation circuit.
Background
At present, in a streaming media electronic rearview mirror system, the transmittance and the reflectivity of electronic rearview mirror glass need to be adjusted by adjusting different direct current level values, so that the automatic anti-dazzle function is realized. The required power current of control circuit of anti-dazzle glass is generally great, can't use singlechip direct drive control, therefore current regulating circuit includes integrated chip usually, presets the resistance value of pin through adjusting integrated chip to change the direct current level value of integrated chip output, but current integrated chip's cost is generally higher, has increased manufacturing cost.
Disclosure of Invention
The technical problem to be solved by the embodiments of the present invention is to provide a dc level adjusting circuit, which can effectively reduce the cost.
In order to solve the above technical problem, an embodiment of the present invention provides the following technical solutions: the utility model provides a direct current level control circuit, includes MOS pipe S, triode Q and PWM signal generation module, wherein:
the base electrode, the collector electrode and the emitter electrode of the triode Q are respectively and correspondingly connected with the output end of the PWM signal generation module, the grid electrode of the MOS tube S and the ground end GND, and the base electrode and the emitter electrode are also connected through a first resistor R1;
the source electrode and the drain electrode of the MOS tube S are respectively and correspondingly connected to an external power supply and the output end of the direct current level regulating circuit, and the source electrode and the grid electrode of the MOS tube S are also connected through a second resistor R2;
the triode Q is correspondingly in a conducting state, an amplifying state or a cut-off state according to the PWM signal provided by the PWM signal generating module, and the MOS tube S is correspondingly in an incomplete conducting state when the triode Q is in the amplifying state.
Further, the dc level adjusting circuit further includes a first capacitor C1 connected in parallel with the second resistor R2.
Further, the drain of the MOS transistor S is also connected to the ground GND through a second capacitor C2.
Further, the base of the transistor Q is connected to the output end of the PWM signal generating module through a third resistor R3.
Further, the collector of the triode Q is also connected to the gate of the MOS transistor S through a fourth resistor R4.
Further, the PWM signal generation module is a PWM chip.
After the technical scheme is adopted, the embodiment of the invention at least has the following beneficial effects: in the embodiment of the invention, the base electrode, the collector electrode and the emitter electrode of the triode Q are respectively and correspondingly connected with the output end of the PWM signal generation module, the grid electrode and the ground end GND of the MOS tube S, and the source electrode and the drain electrode of the MOS tube S are respectively and correspondingly connected with the external power supply and the output end, so that the triode Q can work in an amplification state only by sending out a proper PWM control signal through the PWM signal generation module, and the MOS tube S also can work in an incomplete conduction state correspondingly at the moment, and when the duty ratio of the PWM control signal is dynamically changed, the base electrode current and the collector electrode current of the triode Q can be synchronously and dynamically changed along with the PWM control signal, further, the voltage drop between the grid electrode and the source electrode of the MOS tube S is dynamically changed, and finally, the voltage output by the drain electrode of the MOS tube S can. The embodiment of the invention has less circuit elements and effectively reduces the production cost.
Drawings
Fig. 1 is a circuit diagram of an alternative embodiment of a dc level regulator of the present invention.
Detailed Description
The present application will now be described in further detail with reference to the accompanying drawings and specific examples. It should be understood that the following illustrative embodiments and description are only intended to explain the present invention, and are not intended to limit the present invention, and features of the embodiments and examples in the present application may be combined with each other without conflict.
As shown in fig. 1, an alternative embodiment of the present invention provides a dc level adjusting circuit, which includes a MOS transistor S, a transistor Q, and a PWM signal generating module 1, wherein:
the base electrode, the collector electrode and the emitter electrode of the triode Q are respectively and correspondingly connected with the output end of the PWM signal generation module 1, the grid electrode of the MOS tube S and the ground end GND, and the base electrode and the emitter electrode are also connected through a first resistor R1;
the source electrode and the drain electrode of the MOS tube S are respectively and correspondingly connected to an external power supply 3 and the output end of the direct current level regulating circuit, and the source electrode and the grid electrode of the MOS tube S are also connected through a second resistor R2;
the triode Q is correspondingly in a conducting state, an amplifying state or a cut-off state according to the PWM signal provided by the PWM signal generating module 1, and the MOS tube S is correspondingly in an incomplete conducting state when the triode Q is in the amplifying state.
In the embodiment of the invention, the base electrode, the collector electrode and the emitter electrode of the triode Q are respectively and correspondingly connected with the output end of the PWM signal generation module 1, the grid electrode and the ground end GND of the MOS tube S, the source electrode and the drain electrode of the MOS tube S are respectively and correspondingly connected with the external power supply 3 and the output end, the triode Q can work in an amplification state only by sending out a proper PWM control signal through the PWM signal generation module 1, and at the moment, the MOS tube S also works in an incomplete conduction state correspondingly, when the duty ratio of the PWM control signal is dynamically changed, the base current and the collector current of the triode Q can be synchronously and dynamically changed along with the PWM control signal, so that the voltage drop between the grid electrode and the source electrode of the MOS tube S is dynamically changed, and finally, the voltage output by the drain electrode of the MOS tube S can be synchronously and dynamically changed. The embodiment of the invention has less circuit elements and effectively reduces the production cost.
The embodiment of the invention has the following specific working principle: when the PWM control signal is at a high level and a low level, the on and off of the triode Q are correspondingly controlled; when the triode Q is conducted and works in the amplification region, when the duty ratio of the PWM control signal is increased, the base voltage of the triode Q is increased, the base current is also increased, and according to the principle of the triode Q, the collector current of the triode Q is also increased along with the base current, so that the voltage drop on a collector is increased, and finally the collector voltage of the triode is reduced, namely the input voltage of an S grid electrode of an MOS (metal oxide semiconductor) tube is reduced; according to the working principle of the MOS transistor S, the voltage input by the external power supply 3 is output to the gate of the MOS transistor S after the voltage drop is generated by the third resistor R3, and when the voltage difference between the gate and the source of the MOS transistor S dynamically changes within the predetermined threshold range of the voltage difference between the gate and the source when the MOS transistor S is not completely turned on, the voltage input by the external power supply 3 will generate a voltage drop in the MOS transistor S and be output from the drain of the MOS transistor S, and the voltage drop generated in the MOS transistor S will dynamically change with the voltage difference between the gate and the source of the MOS transistor S, that is, the voltage output by the drain of the MOS transistor S dynamically changes; however, the voltage of the source electrode of the MOS transistor S is always constant, so that the input voltage of the grid electrode of the MOS transistor S is controlled by changing the duty ratio of the PWM control signal, and the dynamic adjustment of the direct current level is realized; and the circuit elements are few, so that the production cost is reduced.
In an optional embodiment of the present invention, the dc level adjusting circuit further comprises a first capacitor C1 connected in parallel with the second resistor R2. In this embodiment, the first capacitor C1 is further connected in parallel to the two ends of the second resistor R2, so that the ac component in the external power supply 3 is effectively filtered, and the stability of the circuit is improved.
In yet another alternative embodiment of the present invention, the drain of the MOS transistor S is further connected to the ground GND through a second capacitor C2. The drain electrode of the MOS transistor S is connected to the ground end GND through the second capacitor C2, noise waves can be effectively filtered through the second capacitor C2, the reliability of the circuit is improved, and the stability of the output direct current level is guaranteed.
In another alternative embodiment of the present invention, the base of the transistor Q is connected to the output terminal of the PWM signal generating module 1 through a third resistor R3. In this embodiment, by providing the third resistor R3, the third resistor R3 not only can effectively limit the current of the circuit, but also can adjust the amplitude of the PWM control signal inputted to the base of the transistor Q.
In yet another alternative embodiment of the present invention, the collector of the transistor Q is further connected to the gate of the MOS transistor S through a fourth resistor R4. In this embodiment, by providing the fourth resistor R4, the fourth resistor R4 can effectively control the amplitude of the PWM control signal inputted to the gate of the MOS transistor S.
In an optional embodiment of the present invention, the PWM signal generation module 1 is a PWM chip. The PWM signal generating module 1 of this embodiment uses a PWM chip, which is beneficial to simplifying the circuit structure and has relatively low cost.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (6)
1. The utility model provides a direct current level control circuit which characterized in that, includes MOS pipe S, triode Q and PWM signal generation module, wherein:
the base electrode, the collector electrode and the emitter electrode of the triode Q are respectively and correspondingly connected with the output end of the PWM signal generation module, the grid electrode of the MOS tube S and the ground end GND, and the base electrode and the emitter electrode are also connected through a first resistor R1;
the source electrode and the drain electrode of the MOS tube S are respectively and correspondingly connected to an external power supply and the output end of the direct current level regulating circuit, and the source electrode and the grid electrode of the MOS tube S are also connected through a second resistor R2;
the triode Q is correspondingly in a conducting state, an amplifying state or a cut-off state according to the PWM signal provided by the PWM signal generating module, and the MOS tube S is correspondingly in an incomplete conducting state when the triode Q is in the amplifying state.
2. The dc level adjustment circuit of claim 1, further comprising a first capacitor C1 connected in parallel with the second resistor R2.
3. The dc level adjustment circuit of claim 1, wherein the drain of the MOS transistor S is further connected to a ground terminal GND through a second capacitor C2.
4. The dc level adjustment circuit of claim 1, wherein the base of the transistor Q is connected to the output terminal of the PWM signal generation module through a third resistor R3.
5. The dc level adjustment circuit of claim 1, wherein the collector of the transistor Q is further connected to the gate of the MOS transistor S through a fourth resistor R4.
6. The dc level adjustment circuit of claim 1, wherein the PWM signal generation module is a PWM chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911095597.1A CN110687961A (en) | 2019-11-11 | 2019-11-11 | DC level adjusting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911095597.1A CN110687961A (en) | 2019-11-11 | 2019-11-11 | DC level adjusting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110687961A true CN110687961A (en) | 2020-01-14 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911095597.1A Pending CN110687961A (en) | 2019-11-11 | 2019-11-11 | DC level adjusting circuit |
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| Country | Link |
|---|---|
| CN (1) | CN110687961A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202159473U (en) * | 2011-06-30 | 2012-03-07 | Tcl集团股份有限公司 | Application circuit protecting output of pulse width modulating circuit |
| CN103401209A (en) * | 2013-08-02 | 2013-11-20 | 广州视源电子科技股份有限公司 | LED backlight short-circuit protection circuit |
| CN203352552U (en) * | 2013-06-27 | 2013-12-18 | 南京奥联汽车电子电器股份有限公司 | Large current on-off control circuit |
| CN103561527A (en) * | 2013-11-19 | 2014-02-05 | 神龙汽车有限公司 | Dual-function LED drive circuit |
| CN210835776U (en) * | 2019-11-11 | 2020-06-23 | 深圳市豪恩汽车电子装备股份有限公司 | DC level adjusting circuit |
-
2019
- 2019-11-11 CN CN201911095597.1A patent/CN110687961A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202159473U (en) * | 2011-06-30 | 2012-03-07 | Tcl集团股份有限公司 | Application circuit protecting output of pulse width modulating circuit |
| CN203352552U (en) * | 2013-06-27 | 2013-12-18 | 南京奥联汽车电子电器股份有限公司 | Large current on-off control circuit |
| CN103401209A (en) * | 2013-08-02 | 2013-11-20 | 广州视源电子科技股份有限公司 | LED backlight short-circuit protection circuit |
| CN103561527A (en) * | 2013-11-19 | 2014-02-05 | 神龙汽车有限公司 | Dual-function LED drive circuit |
| CN210835776U (en) * | 2019-11-11 | 2020-06-23 | 深圳市豪恩汽车电子装备股份有限公司 | DC level adjusting circuit |
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