CN110321640A - A kind of domain DRC processing method of integrated circuit conversion process - Google Patents

A kind of domain DRC processing method of integrated circuit conversion process Download PDF

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Publication number
CN110321640A
CN110321640A CN201910607637.XA CN201910607637A CN110321640A CN 110321640 A CN110321640 A CN 110321640A CN 201910607637 A CN201910607637 A CN 201910607637A CN 110321640 A CN110321640 A CN 110321640A
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CN
China
Prior art keywords
drc
technique
gds file
layer set
cell
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910607637.XA
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Chinese (zh)
Inventor
陈宏冰
姜志强
余有勇
陶磊
李小辉
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Sichuan Changhong Electric Co Ltd
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Sichuan Changhong Electric Co Ltd
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Publication date
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Priority to CN201910607637.XA priority Critical patent/CN110321640A/en
Publication of CN110321640A publication Critical patent/CN110321640A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Architecture (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The invention discloses a kind of domain DRC processing methods of integrated circuit conversion process, comprising: the territory unit that the design library of A. export A technique needs to modify to GDS file X checks GDS file X using the DRC inspection of B technique；B. the layer set C for meeting inspection in GDS file X and ungratified layer set D are filtered out；C. the design library for creating B technique, imported into the CELL E in the design library of B technique for the layer set C in the GDS file X；D. the layer set D to the DRC for meeting B technique adjusted in GDS file X is checked, and is output to GDS file Y；Method of the invention can handle the domain DRC problem of integrated circuit conversion manufacturing process with mass, avoid repainting domain or one by one artificial treatment DRC, working efficiency is greatly improved.

Description

A kind of domain DRC processing method of integrated circuit conversion process
Technical field
The present invention relates to integrated circuit back-end design field, in particular to a kind of domain of integrated circuit conversion process DRC processing method.
Background technique
In hybrid digital-analog integrated circuit design process, considers to reduce digital circuit power consumption and area etc., can encounter It needs ready-made entire design being transformed into the problem of being redesigned in smaller characteristic size technique.In general, digital section The design for dividing domain that can be quickly completed conversion process by APR, but the domain modification after analog portion domain conversion process Become extremely complex, hundreds of DRC problem can be encountered, but is all often some simple spacing and line width problem.It can be with Again simulation layout design is carried out with B technique, or modified one by one for DRC problem, but both methods requires It takes a significant amount of time and energy, is unable to complete in a short time.
Summary of the invention
It is insufficient in above-mentioned background technique the purpose of the present invention is overcoming, a kind of domain of integrated circuit conversion process is provided DRC processing method can be handled the domain DRC problem of integrated circuit conversion manufacturing process with mass, avoid repainting domain Or artificial treatment DRC one by one, working efficiency is greatly improved.
In order to reach above-mentioned technical effect, the present invention takes following technical scheme:
A kind of domain DRC processing method of integrated circuit conversion process, comprising the following steps:
A. the design library for exporting A technique needs the territory unit modified to GDS file (graph data stream file) X, uses B The DRC inspection of technique is designed regular inspection to GDS file X；
B. the layer set C for meeting DRC inspection in GDS file X and the layer set D for being unsatisfactory for DRC inspection are filtered out；
C. the design library for creating B technique, the layer set C in the GDS file X is imported into the design library of B technique CELL E；
D. by grammer operation, the layer set D in GDS file X is adjusted, the DRC for being allowed to meet B technique is checked, and defeated Layer set D adjusted to GDS file Y out；
E. the data in GDS file Y are read in the CELL F in the design library of B technique；
F. merging CELL E and CELL F in the design library of B technique is CELL G；
G. the DRC for executing B technique of the CELL G in the design library of B technique is checked, the process flow if meeting DRC and checking Terminate.
Further, in the step G further include: return step D continues to adjust if being unsatisfactory for DRC and checking, until full Until sufficient DRC is checked.
Compared with prior art, the present invention have it is below the utility model has the advantages that
The domain DRC processing method of integrated circuit conversion process of the invention can handle integrated circuit conversion with mass The domain DRC problem of manufacturing process, avoids repainting domain or one by one artificial treatment DRC, working efficiency can be greatly improved.
Detailed description of the invention
Fig. 1 is the flow diagram of the domain DRC processing method of integrated circuit conversion process of the invention.
Fig. 2 is the schematic diagram that the layer in one embodiment of the present of invention for DRC mistake processes.
Specific embodiment
Below with reference to the embodiment of the present invention, the invention will be further elaborated.
Embodiment:
Embodiment one:
As shown in Figure 1, a kind of domain DRC processing method of integrated circuit conversion process, comprising the following steps:
Step 1: the territory unit that the design library of export A technique needs to modify to GDS file (graph data stream file) X, Regular inspection is designed to GDS file X using the DRC inspection of B technique；
Step 2: the layer set C for meeting DRC inspection in GDS file X and the layer for being unsatisfactory for DRC inspection are filtered out Set D；
Step 3: the layer set C in the GDS file X is imported into setting for B technique by the design library of newly-built B technique Count the CELL E in library；
Step 4: by grammer operation, adjusting the layer set D in GDS file X, is allowed to meet the DRC inspection of B technique It looks into, and the layer set D to GDS file Y after output adjustment；
Specifically, as shown in Fig. 2, there are following errors: fixed by the contact in layer set D in the present embodiment Contact size is 0.16um, the contact size in domain are 0.22um, will be especially by script in this this method Contact size diminution 0.03 is obtained into modified layer contact, size 0.16um.Similarly by layer set D In other layer do similar processing, be allowed to meet DRC requirement, be then output to GDS file Y.
Specifically, for realizing the core code of the script of automatic batchization processing figure layer in the present embodiment are as follows:
LAYOUT PRIMARY"test1"
LAYOUT PATH"test1.gds"
LAYOUT SYSTEM GDSII
TEXT DEPTH PRIMARY//1
DRC RESULTS DATABASE"test_dummy.gds"GDSII_grow USER MERGED
DRC SUMMARY REPORT"calibre_drc.rep"
DRC MAXIMUM RESULTS ALL
DRC INCREMENTAL CONNECT YES
DRC MAP TEXT YES
MASK RESULTS DATABASE"mask.db"
PRECISION 1000
RESOLUTION 5
UNIT CAPACITANCE F
UNIT RESISTANCE OHM
UNIT LENGTH U
Layer CT 50 0
CT_1=size CT by-0.03
CT_print{
Copy CT_1
}
Drc check map CT_print GDSII 50MAXIMUM RESULTS ALL
Meanwhile it is above-mentioned for directlying adopt existing grammer operation to the layer set D grammer operation being adjusted It realizes, the grammer operation used in the present embodiment specifically: calibre SVRF.
Step 5: the data in GDS file Y are read in the CELL F in the design library of B technique；
Step 6: merging CELL E and CELL F in the design library of B technique is CELL G；
Step 7: the DRC for executing B technique of the CELL G in the design library of B technique is checked, if meeting DRC and checking Reason process terminates；Return step four continues to adjust if being unsatisfactory for DRC and checking, until meeting DRC and checking.
In summary, the domain processing method of integrated circuit conversion process of the present invention, by domain number to be treated Classification is done according to level to import, and is first imported correct level, then after the level that there are problems that DRC is done mass processing with script It reads in again, all levels for finally merging two set complete treatment process.It can effectively improve working efficiency to avoid one by one Modification DRC mistake repaints domain.
It is understood that the principle that embodiment of above is intended to be merely illustrative of the present and the exemplary implementation that uses Mode, however the present invention is not limited thereto.For those skilled in the art, essence of the invention is not being departed from In the case where mind and essence, various changes and modifications can be made therein, these variations and modifications are also considered as protection scope of the present invention.

Claims (2)

1. a kind of domain DRC processing method of integrated circuit conversion process, which comprises the following steps:
A. the territory unit that the design library of export A technique needs to modify is checked using the DRC of B technique to the GDS to GDS file X File X is designed regular inspection；
B. the layer set C for meeting DRC inspection in GDS file X and the layer set D for being unsatisfactory for DRC inspection are filtered out；
C. the design library for creating B technique, the layer set C in the GDS file X is imported into the design library of B technique CELL E；
D. by grammer operation, the layer set D in GDS file X is adjusted, the DRC for being allowed to meet B technique is checked, and exports tune Layer set D to GDS file Y after whole；
E. the data in GDS file Y are read in the CELL F in the design library of B technique；
F. merging CELL E and CELL F in the design library of B technique is CELL G；
G. the DRC for executing B technique of the CELL G in the design library of B technique is checked, the process flow knot if meeting DRC and checking Beam.
2. a kind of domain DRC processing method of integrated circuit conversion process according to claim 1, which is characterized in that institute It states in step G further include: return step D continues to adjust if being unsatisfactory for DRC and checking, until meeting DRC and checking.
CN201910607637.XA 2019-07-05 2019-07-05 A kind of domain DRC processing method of integrated circuit conversion process Pending CN110321640A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910607637.XA CN110321640A (en) 2019-07-05 2019-07-05 A kind of domain DRC processing method of integrated circuit conversion process

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Application Number Priority Date Filing Date Title
CN201910607637.XA CN110321640A (en) 2019-07-05 2019-07-05 A kind of domain DRC processing method of integrated circuit conversion process

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CN110321640A true CN110321640A (en) 2019-10-11

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CN113792525A (en) * 2021-11-16 2021-12-14 北京芯愿景软件技术股份有限公司 Integrated circuit layout design method, device and equipment
CN116757145A (en) * 2023-08-16 2023-09-15 合肥奎芯集成电路设计有限公司 Integrated circuit design layout processing method and device, electronic equipment and storage medium

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Publication number Priority date Publication date Assignee Title
CN113792525A (en) * 2021-11-16 2021-12-14 北京芯愿景软件技术股份有限公司 Integrated circuit layout design method, device and equipment
CN113792525B (en) * 2021-11-16 2023-02-28 北京芯愿景软件技术股份有限公司 Integrated circuit layout design method, device and equipment
CN116757145A (en) * 2023-08-16 2023-09-15 合肥奎芯集成电路设计有限公司 Integrated circuit design layout processing method and device, electronic equipment and storage medium
CN116757145B (en) * 2023-08-16 2024-04-30 合肥奎芯集成电路设计有限公司 Integrated circuit design layout processing method and device, electronic equipment and storage medium

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Application publication date: 20191011