CN110021590A - 电源芯片集成模块、其制造方法及双面散热电源模块封装 - Google Patents
电源芯片集成模块、其制造方法及双面散热电源模块封装 Download PDFInfo
- Publication number
- CN110021590A CN110021590A CN201811464518.5A CN201811464518A CN110021590A CN 110021590 A CN110021590 A CN 110021590A CN 201811464518 A CN201811464518 A CN 201811464518A CN 110021590 A CN110021590 A CN 110021590A
- Authority
- CN
- China
- Prior art keywords
- semiconductor chip
- power supply
- chip
- integration module
- internal electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010354 integration Effects 0.000 title claims abstract description 56
- 230000005855 radiation Effects 0.000 title claims abstract description 23
- 238000005538 encapsulation Methods 0.000 title claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000004065 semiconductor Substances 0.000 claims abstract description 171
- 239000000758 substrate Substances 0.000 claims description 47
- 239000002184 metal Substances 0.000 claims description 37
- 229910052751 metal Inorganic materials 0.000 claims description 37
- 238000000034 method Methods 0.000 claims description 11
- 229910000679 solder Inorganic materials 0.000 claims description 9
- 238000012546 transfer Methods 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 5
- 238000000465 moulding Methods 0.000 claims description 4
- 238000005476 soldering Methods 0.000 claims description 3
- 238000009434 installation Methods 0.000 description 18
- 238000012545 processing Methods 0.000 description 10
- 238000012856 packing Methods 0.000 description 8
- 239000010949 copper Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 5
- 230000003071 parasitic effect Effects 0.000 description 4
- 230000008646 thermal stress Effects 0.000 description 4
- 238000003466 welding Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000446 fuel Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000009863 impact test Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000024241 parasitism Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000017260 vegetative to reproductive phase transition of meristem Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4825—Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/49531—Additional leads the additional leads being a wiring board
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49534—Multi-layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/115—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/051—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Inverter Devices (AREA)
Abstract
提供了一种电源芯片集成模块、其制造方法及双面散热电源模块封装,该电源芯片集成模块包括:第一半导体芯片;第二半导体芯片;设置在第一半导体芯片和第二半导体芯片的上表面或下表面上以电连接第一半导体芯片和第二半导体芯片的布线层;从布线层、第一半导体芯片、第二半导体芯片及其组合中的至少一个的上表面上的内部电极垫延伸至第一半导体芯片和第二半导体芯片的安装表面上的外部的焊垫的内部电极;以及具有包围第一半导体芯片、第二半导体芯片和内部电极中的至少一部分的形状的第一成型件。
Description
相关申请的交叉引用
该美国非临时专利申请要求2017年12月7日提交的韩国专利申请号10-2017-0167629的优先权,其全部内容通过引用并入本文。
技术领域
本发明涉及一种电源芯片集成模块、其制造方法及双面散热电源模块封装,更具体地说,涉及一种能够减少安装期间部件数量(由于集成芯片事先制造)并降低产品缺陷率从而大大提高产量和生产率的电源芯片集成模块、其制造方法及双面散热电源模块封装。
背景技术
用于电机驱动的电源模块被用于环保汽车,诸如混合动力汽车、电动汽车和燃料电池汽车。在环保汽车的情形中,永磁电机用作电机驱动装置,并且通过脉宽调制(PWM)信号由三相AC电压驱动电机。
在将多个半导体芯片安装在作为引线框内的芯片安装区域的焊盘(paddle)上之后,使用布线将芯片和引线框电互连,并且用诸如环氧树脂模塑料(EMC)的密封件密封。因此,电源模块封装通常可以具有保护内部的结构。
然而,这种传统的电源模块封装具有许多问题。例如,由于安装时要安装部件的数量非常大,因此极大耗费了安装时间和安装成本。另外,由于每个安装步骤需要单独的夹具,因此安装和堆叠夹具需要很多时间和人力。而且,在焊接后分离夹具的过程中芯片会受到损坏。
此外,存在如下问题:在为了改进热阻特性而使封装件厚度变薄的趋势下,导线变得更密或更长,从而引起导线短路现象或由于高寄生电感而增加开关损耗。
另外,关于双面散热型的电源模块封装,由于金属层直接形成在芯片上,因此在热冲击试验中存在热应力集中在芯片上以及芯片受损的问题。
发明内容
本发明提供了一种电源芯片集成模块及其制造方法、以及双面散热电源模块封装。关于电源芯片集成模块,通过将多个半导体芯片集成到单个模块中,可以减少安装中部件的数量并减少安装时间和安装成本。另外,由于每个安装步骤不需要单独的夹具,因此可以减少安装或堆叠夹具所消耗的时间和人力,并且可以以封装形式保护集成模块,以提高产品的耐用性和强度。此外,由于可以对以封装形式进行验证的集成模块进行最终组装,因此可以通过提高模块组装产量来提高生产率,并且芯片上的布线层或金属层可以消散热应力和物理应力。而且,可以通过现有的导线防止短路现象和寄生电感,从而提高开关效率,并且可以通过使用整体间隔件来改善热阻特性。然而,这些问题是示例性的,并且本发明的范围并不限于此。
本发明构思的实施例提供了一种电源芯片集成模块,该电源芯片集成模块包括:第一半导体芯片;第二半导体芯片;设置在第一半导体芯片和第二半导体芯片的上表面或下表面上以电连接第一半导体芯片和第二半导体芯片的布线层;从布线层、第一半导体芯片、第二半导体芯片及其组合中的至少一个的上表面上的内部电极垫延伸至第一半导体芯片和第二半导体芯片的安装表面上的外部的焊垫的内部电极;以及在形状上包围第一半导体芯片、第二半导体芯片和内部电极的至少一部分的第一成型件。
在一个实施例中,内部电极可以包括:沿布线层、第一半导体芯片和第二半导体芯片中的任何一个的上表面水平设置的水平部分;和在垂直方向上从水平部分延伸到焊垫的垂直部分。
在一个实施例中,为了用作在布线层、第一半导体芯片、第二半导体芯片及其组合中的至少一个上的传热通路,第一成型件可以设有用于暴露布线层、第一半导体芯片和第二半导体芯片中的至少一个的上表面的通框部分。
在一个实施例中,焊料或焊膏可以涂覆至焊垫、布线层、以及第一半导体芯片或第二半导体芯片的至少一部分上。
在一个实施例中,第一半导体芯片可以是绝缘栅双极晶体管(IGBT),第二半导体芯片可以是二极管。
在本发明构思的实施例中,提供了一种电源芯片集成模块的制造方法。该方法包括:在安装表面上设置第一半导体芯片和第二半导体芯片;将第一成型件的一部分初次成型为包围第一半导体芯片和第二半导体芯片的侧面的形状;通过在成型的第一成型件的一部分上穿孔并在穿孔部分上使用金属处理来形成内部电极的垂直部分;形成内部电极的水平部分以便连接到垂直部分,并形成用于电连接第一半导体芯片的上表面和第二半导体芯片的上表面的布线层;二次成型第一成型件的除了内部电极的水平部分和传热通路之外的剩余部分;以及将焊料或焊膏涂覆在暴露在外部的焊垫P2、布线层、以及第一半导体芯片或第二半导体芯片的至少一部分上。
在本发明构思的实施例中,双面散热电源模块封装包括:下基板;设置在下基板上的引线框;设置在引线框上并且集成有第一半导体芯片和第二半导体芯片以实现无需布线就焊接的电源芯片集成模块;设置在电源芯片集成模块上的上基板;以及设置在下基板和上基板之间的第二成型件,其中电源芯片集成模块包括:第一半导体芯片;第二半导体芯片;设置在第一半导体芯片和第二半导体芯片的上表面或下表面上以电连接第一半导体芯片和第二半导体芯片的布线层;从布线层、第一半导体芯片、第二半导体芯片及其组合中的至少一个的上表面上的内部电极焊垫延伸至第一半导体芯片和第二半导体芯片的安装表面上的外部的焊垫的内部电极;以及在形状上包围第一半导体芯片、第二半导体芯片和内部电极中的至少一部分的第一成型件。
在一个实施例中,上基板可包括:上绝缘基板;设置在上绝缘基板的上表面上的第一上金属层;设置在上绝缘基板的下表面上的第二上金属层;以及设置在第二上金属层和电源芯片集成模块之间的间隔部分。
在一个实施例中,第二上金属层和间隔部分可以通过蚀刻处理一体形成,使得间隔部分可以从第二上金属层突出。
在一个实施例中,引线框可以包括:第一半导体芯片和第二半导体芯片安装在其上的焊盘部分;以及通过电源芯片集成模块的内部电极电连接到第一半导体芯片和第二半导体芯片的引线部分。
在一个实施例中,下基板可以包括:下绝缘基板;设置在下绝缘基板的上表面上的第一下金属层;和设置在下绝缘基板的下表面上的第二下金属层,其中第一下金属层可以图案化以对应于电源芯片集成模块。
附图说明
采用附图以提供进一步理解本发明构思,并且附图包含在本说明书中并构成本说明书的一部分。附图示出了本发明构思的实施例,并且与说明书一起用于解释本发明构思的原理。在附图中:
图1是根据本发明一些实施例的电源芯片集成模块的剖面图;
图2至图7是根据本发明一些实施例的电源芯片集成模块的剖面图;
图8是示出制造根据本发明一些实施例的电源芯片集成模块的方法的流程图;
图9是示出根据本发明一些实施例的双面散热电源模块封装的剖面图;
图10是示出根据本发明一些其他实施例的双面散热电源模块封装的剖面图;以及
图11是示出图10的双面散热电源模块封装的电源芯片集成模块的平面图。
具体实施方式
在下文中,将参考附图详细描述本发明的实施例。
提供本发明的实施例是为了向本领域技术人员更充分地描述本发明,且可以以各种形式修改以下实施例,并且本发明的范围不限于以下实施例。相反,提供这些实施例是为了使本发明更加彻底和完整,并且将本发明的范围完全传达给本领域技术人员。另外,在附图中,为了方便和清楚地解释,放大了每层的厚度和尺寸。
本说明书中使用的术语仅用于解释特定实施例,并不意图限制本发明。如本文所用,除非上下文另有明确说明,否则单数形式可包括复数形式。此外,如本文所使用的,“包括(comprise)”和/或“包含(comprising)”指定所述形式、数字、步骤、操作、单元、元件和/或组的存在,并且不排除一个或多个其他形式、数字、步骤、操作、单元、元件和/或组的存在或添加。
在下文中,将参考示意性地示出本发明理想实施例的附图来描述本发明的实施例。在附图中,例如,取决于制造技术和/或公差,可以预期所示形状的变化。因此,本发明的实施例不应被解释为限于本文所示区域的任何特定形状,而是例如,其应包括由制造引起的形状变化。
在下文中,将参照附图详细描述根据本发明各个实施例的电源芯片集成模块、其制造方法及双面散热电源模块封装。
图1是示出根据本发明一些实施例的电源芯片集成模块100的剖面图。
首先,如图1所示,根据本发明一些实施例的电源芯片集成模块100包括第一半导体芯片C1、第二半导体芯片C2、布线层10、内部电极20和第一成型件30。
例如,第一半导体芯片C1是使用半导体处理制造的芯片,其中集成了用于驱动电机和其他电子部件所需的元件或电路,更具体地,例如,它可以是以以下结构形成的功能元件:其中至少一个有源元件或无源元件紧凑地集成在一起并且不可以彼此分开。
另外,例如,第二半导体芯片C2也是使用半导体处理制造的芯片,其中集成了用于驱动电机和其他电子部件所需的元件或电路,更具体地,例如,它可以是以至少一个有源元件或至少一个无源元件形成的功能元件。
更具体地,例如,为了构造电源芯片,第一半导体芯片C1可以是绝缘栅双极晶体管(IGBT),第二半导体芯片C2可以是二极管。
例如,当第一半导体芯片C1是IGBT时,可以在一个表面或另一个表面上形成发射电极和栅电极,并且可以在另一个表面或一个表面上形成集电极。
此外,当第二半导体芯片C2是二极管时,可以在一个表面或另一个表面上形成正电极,并且可以在另一个表面或一个表面上形成负电极。
当在第一半导体芯片C1和第二半导体芯片C2的两个表面上形成电极时,可以在第一半导体芯片C1和第二半导体芯片C2的两个表面上形成上述布线层10。然而,本发明并不限于此,并且可以仅在第一半导体芯片C1和第二半导体芯片C2的一个表面上形成电极。在这种情况下,如图1所示,可以在第一半导体芯片C1和第二半导体芯片C2上形成布线层10。
例如,如图1所示,为了电连接第一半导体芯片C1和第二半导体芯片C2,布线层10可以是形成在第一半导体芯片C1和第二半导体芯片C2上的导电金属薄膜或电路板。
同样,例如,如图1所示,通过第一成型件30,内部电极20的至少一部分可以被保护而不暴露到外部,并且内部电极20可以是从在布线层10、第一半导体芯片C1、第二半导体芯片C2及其组合中的至少一个的上表面上形成的内部电极垫P1延伸至在第一半导体芯片C1和第二半导体芯片C2的安装表面F上形成的外部的焊垫P2的电极结构。
可以使用一种可以代替导线的通孔电极处理或布线处理形成内部电极20。例如,可以通过在第一成型件30中形成稍后所述的通孔并在通孔中填充金属层形成内部电极20。然而,本发明并不限于此,可以通过各种方法形成内部电极20,例如通过焊接成品或内部引线框形成内部电极。
更具体地,例如,内部电极20包括沿布线层10、第一半导体芯片C1和第二半导体芯片C2中的任何一个的上表面水平形成的水平部分21,以及在垂直方向上从水平部分21延伸至焊垫的垂直部分22。
这里,例如,水平部分21可以使用厚膜金属处理,垂直部分22可以使用通孔电极处理。
同时,例如,如图1所示,第一成型件30可以是一种主封装构件,其是以主要包围第一半导体芯片C1、第二半导体芯片C2和内部电极20的至少一部分的形状所形成的树脂复合材料。
更具体地,例如,为了用作在布线层10、第一半导体芯片C1、第二半导体芯片C2及其组合中的至少一个上的传热通路,第一成型件30可以设有用于暴露布线层10、第一半导体芯片C1和第二半导体芯片C2中的至少一个的上表面的通框部分W。
因此,通过使用暴露的第一半导体芯片C1和第二半导体芯片C2的下表面以及通框部分W,可以将从芯片产生的热量排放到两侧。
而且,例如,如图1所示,当使用焊接处理或回流处理代替布线处理安装稍后所述的双面散热电源模块封装1000时,为了以焊料预制件的形式安装,可以将焊料S或焊膏涂覆在焊垫P2、布线层10、以及第一半导体芯片C1或第二半导体芯片C2中的至少一部分上。
因此,通过将多个半导体芯片集成到单个模块中,可以减少安装中部件的数量并减少安装时间和安装成本。另外,由于每个安装步骤不需要单独的夹具,因此可以减少安装或堆叠夹具所消耗的时间和人力,并且可以以封装形式保护集成模块,以提高产品的耐用性和强度。此外,由于可以对以封装形式进行验证的集成模块进行最终组装,因此可以通过提高模块组装产量来提高生产率,并且芯片上的布线层或金属层可以消散热应力和物理应力。而且,可以通过现有的导线防止短路现象和寄生电感,从而提高开关效率,并且可以通过使用整体间隔件来改善热阻特性。
图2至图7是示出根据本发明一些实施例的电源芯片集成模块100的剖面图。
如图2至图7所示,当描述根据本发明一些实施例的电源芯片集成模块100的制造过程时,首先,如图2所示,第一半导体芯片C1和第二半导体芯片C2可以设置在安装表面F上。
此时,安装表面F可以设有临时基板、离型纸、载带等以便以后容易地移除和安装它们,并且尽管未在图中示出,但是第一半导体芯片C1和第二半导体芯片C2可以设置在下表面布线层上。
接下来,如图3所示,可以以包围第一半导体芯片C1和第二半导体芯片C2侧面的形状首先成型第一成型件30的一部分。此时,可以暴露第一半导体芯片C1和第二半导体芯片C2的上表面。
接下来,如图4所示,可以通过蚀刻或激光钻孔对所成型的第一成型件30的一部分进行穿孔并且通过在穿孔部分上使用各种金属处理(如电镀或溅射或通孔电极处理)以形成内部电极的垂直部分22。
接下来,如图5所示,形成内部电极20的水平部分21,通过使用各种金属处理或厚金属处理使其连接到垂直部分22,并且同时,可以使用同一处理形成用于电连接第一半导体芯片C1的上表面和第二半导体芯片C2的上表面的布线层10。
接下来,如图6所示,可以通过对第一成型件30的除了内部电极20的水平部分21和传热通路的部分之外的剩余部分二次成型,完成第一成型件30。
接下来,如图7所示,将焊料S或焊膏涂覆至暴露于外部的焊垫P2、布线层10、以及第一半导体芯片C1或第二半导体芯片C2的至少一部分。
因此,可以在分离附加夹具或夹具的过程中防止芯片损坏,并且尽管在附图中示出了一个产品,但是可以以条带形式批量生产,从而大大提高生产率和产量。
图8是示出根据本发明一些实施例的电源芯片集成模块100的制造方法的流程图。
如图1至图8所示,根据本发明一些实施例的制造电源芯片集成模块100的方法包括:在安装表面F上设置第一半导体芯片C1和第二半导体芯片C2的步骤S1,将第一成型件30的一部分初次成型为包围第一半导体芯片C1和第二半导体芯片C2侧面的形状的步骤S2,通过在成型的第一成型件30的一部分上穿孔并在穿孔部分上使用金属处理来形成内部电极的垂直部分22的步骤S3,形成内部电极20的水平部分21以便连接到垂直部分22并形成用于电连接第一半导体芯片C1的上表面和第二半导体芯片C2的上表面的布线层10的步骤S4,使第一成型件30的除了内部电极20的水平部分21和传热通路之外的剩余部分二次成型的步骤S5,以及将焊料S或焊膏涂覆至暴露于外部的焊垫P2、布线层10、以及第一半导体芯片C1或第二半导体芯片C2的至少一部分的步骤S6。
图9是示出根据本发明一些实施例的双面散热电源模块封装1000的剖面图。
如图9所示,根据本发明一些实施例的双面散热电源模块封装1000可包括:下基板200,设置在下基板200上的引线框300,设置在引线框300上并且集成有第一半导体芯片C1和第二半导体芯片C2以使得能够在没有布线的情况下进行焊接的电源芯片集成模块100,设置在电源芯片集成模块100上的上基板400,和设置在下基板200和上基板400之间的第二成型件500。
这里,电源芯片集成模块100可以具有与参考图1至图8所述的电源芯片集成模块100相同的配置和作用。因此,将省略详细描述。
而且,例如,如图9所示,上基板400是用于向上排出在电源芯片集成模块100的上表面上所产生热量的散热结构。更具体地,例如,上基板400可以包括:上绝缘基板410,设置在上绝缘基板410的上表面上的第一上金属层411,设置在上绝缘基板410的下表面上的第二上金属层412,以及设置在第二上金属层412和电源芯片集成模块100之间的间隔部分413。
这里,为了通过减小边界电阻来改进热阻特性,可以通过蚀刻处理(半蚀刻等)一体地形成第二上金属层412和间隔部分413,使得间隔部分413从第二上金属层412凸出。
更具体地,例如,上基板400可以是直接接合铜(DBC:Direct Bonded Copper)基板,其中铜(Cu)板设置在陶瓷板的上表面和下表面上。
而且,例如,如图9所示,引线框300可包括:第一半导体芯片C1和第二半导体芯片C2所在的焊盘部分310,以及通过电源芯片集成模块100的内部电极20电连接到第一半导体芯片C1和第二半导体芯片C2的引线部分320。这里,如果需要的话,可以省略焊盘部分310。
因此,如图9所示,由于已经以封装形式验证的电源芯片集成模块100可以最终组装在引线框300上,所以可以提高模块组件的产量和可以提高生产率。芯片上的布线层或金属层可以消散热应力和物理应力,并且可以防止现有布线的布线短路现象或寄生电感,从而提高开关效率。
同时,如图9所示,下基板200是用于向下排出从电源芯片集成模块100的下表面所产生热量的散热结构。下基板200可以包括:下绝缘基板210,设置在下绝缘基板210的上表面上的第一下金属层211,以及设置在下绝缘基板210的下表面上的第二下金属层212。
更具体地,例如,下基板200还可以是直接接合铜(DBC)基板,其中铜(Cu)板设置在陶瓷板的上表面和下表面上。
图10是示出根据本发明一些备选实施例的双面散热电源模块封装2000的剖视图。图11是示出图10的双面散热电源模块封装2000的电源芯片集成模块100的平面图。
如图10和图11所示,关于根据本发明一些其他实施例的双面散热电源模块封装2000,第一下金属层211可以图案化以对应于电源芯片集成模块100。
因此,使用这一图案而无需布线处理,引线框300被安装在下基板200上,并且上述焊料预制件类型的电源芯片集成模块100被安装在引线框300上。在将上基板400安装在电源芯片集成模块100上之后,可以使用回流处理等来焊接上基板400。
因此,可以在两侧散热,从而散热效率高,并且在传热通路上牢固地提供焊接而没有诸如导线的任何易碎部件,从而机械、热和电接触性能优异,并因而大大提高产品的耐用性和强度。
根据如上所述的本发明的一些实施例,通过将多个半导体芯片集成到单个模块中,可以减少安装中部件的数量并减少安装时间和安装成本。另外,由于每个安装步骤不需要单独的夹具,因此可以减少安装或堆叠夹具所消耗的时间和人力,并且可以以封装形式保护集成模块,以提高产品的耐用性和强度。此外,由于可以对以封装形式进行验证的集成模块进行最终组装,因此可以通过提高模块组装产量来提高生产率,并且芯片上的布线层或金属层可以消散热应力和物理应力。而且,可以通过现有的导线防止短路现象和寄生电感,从而提高开关效率,并且可以通过使用整体间隔件来改进热阻特性。当然,本发明的范围不受这些效果的限制。
尽管已经参考附图中所示的实施例描述了本发明,但是这仅是示例性的,并且本领域技术人员将理解,在不脱离本发明范围的情况下可以进行各种改变和修改。因此,本发明的真正范围应由所附权利要求的技术思想来进行确定。
Claims (11)
1.一种电源芯片集成模块,包括:
第一半导体芯片;
第二半导体芯片;
布线层,设置在所述第一半导体芯片和所述第二半导体芯片的上表面或下表面上,以电连接所述第一半导体芯片和所述第二半导体芯片;
内部电极,从所述布线层、所述第一半导体芯片、所述第二半导体芯片及其组合中的至少一个的上表面上的内部电极垫延伸至所述第一半导体芯片和所述第二半导体芯片的安装表面上的外部的焊垫;以及
第一成型件,具有包围所述第一半导体芯片、所述第二半导体芯片和所述内部电极中的至少一部分的形状。
2.根据权利要求1所述的电源芯片集成模块,其中,所述内部电极包括:
水平部分,沿所述布线层、所述第一半导体芯片和所述第二半导体芯片中的任何一个的上表面水平设置;以及
垂直部分,在垂直方向上从所述水平部分延伸到所述焊垫。
3.根据权利要求1所述的电源芯片集成模块,其中,为了用作在所述布线层、所述第一半导体芯片、所述第二半导体芯片及其组合中的至少一个上的传热通路,所述第一成型件设有用于暴露所述布线层、所述第一半导体芯片和所述第二半导体芯片中的至少一个的上表面的通框部分。
4.根据权利要求3所述的电源芯片集成模块,其中,焊料或焊膏被涂覆至所述焊垫、所述布线层、以及所述第一半导体芯片或所述第二半导体芯片中的至少一部分上。
5.根据权利要求1所述的电源芯片集成模块,其中,所述第一半导体芯片是绝缘栅双极晶体管(IGBT),所述第二半导体芯片是二极管。
6.一种电源芯片集成模块的制造方法,所述方法包括:
在安装表面上设置第一半导体芯片和第二半导体芯片;
将第一成型件的一部分初次成型为包围所述第一半导体芯片和所述第二半导体芯片的侧面的形状;
通过在成型的所述第一成型件的一部分上穿孔并在穿孔部分上使用金属处理来形成内部电极的垂直部分;
形成所述内部电极的水平部分以便连接到所述垂直部分,并形成用于电连接所述第一半导体芯片的上表面和所述第二半导体芯片的上表面的布线层;
对所述第一成型件的除了所述内部电极的水平部分和传热通路之外的剩余部分进行二次成型;以及
将焊料或焊膏涂覆在暴露至外部的焊垫、所述布线层、以及所述第一半导体芯片或所述第二半导体芯片中的至少一部分上。
7.一种双面散热电源模块封装,包括:
下基板;
引线框,设置在所述下基板上;
电源芯片集成模块,设置在所述引线框上,并与第一半导体芯片和第二半导体芯片集成以实现无需布线就焊接;
上基板,设置在所述电源芯片集成模块上;以及
第二成型件,设置在所述下基板和所述上基板之间,
其中,所述电源芯片集成模块包括:
所述第一半导体芯片;
所述第二半导体芯片;
布线层,设置在所述第一半导体芯片和所述第二半导体芯片的上表面或下表面上,以电连接所述第一半导体芯片和所述第二半导体芯片;
内部电极,从所述布线层、所述第一半导体芯片、所述第二半导体芯片及其组合中的至少一个的上表面上的内部电极垫延伸至所述第一半导体芯片和所述第二半导体芯片的安装表面上的外部的焊垫;以及
第一成型件,具有包围所述第一半导体芯片、所述第二半导体芯片和所述内部电极中的至少一部分的形状。
8.根据权利要求7所述的双面散热电源模块封装,其中,所述上基板包括:
上绝缘基板;
第一上金属层,设置在所述上绝缘基板的上表面上;
第二上金属层,设置在所述上绝缘基板的下表面上;以及
间隔部分,设置在所述第二上金属层和所述电源芯片集成模块之间。
9.根据权利要求8所述的双面散热电源模块封装,其中,所述第二上金属层和所述间隔部分通过蚀刻处理一体形成,使得所述间隔部分从所述第二上金属层突出。
10.根据权利要求7所述的双面散热电源模块封装,其中,所述引线框包括:
焊盘部分,所述第一半导体芯片和所述第二半导体芯片安装在其上;以及
引线部分,通过所述电源芯片集成模块的所述内部电极电连接到所述第一半导体芯片和所述第二半导体芯片。
11.根据权利要求10所述的双面散热电源模块封装,其中,所述下基板包括:
下绝缘基板;
第一下金属层,设置在所述下绝缘基板的上表面上;以及
第二下金属层,设置在所述下绝缘基板的下表面上,
其中,所述第一下金属层被图案化以对应于所述电源芯片集成模块。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020170167629A KR102008278B1 (ko) | 2017-12-07 | 2017-12-07 | 파워칩 통합 모듈과 이의 제조 방법 및 양면 냉각형 파워 모듈 패키지 |
KR10-2017-0167629 | 2017-12-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110021590A true CN110021590A (zh) | 2019-07-16 |
CN110021590B CN110021590B (zh) | 2023-04-18 |
Family
ID=66629287
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811464518.5A Active CN110021590B (zh) | 2017-12-07 | 2018-12-03 | 电源芯片集成模块、其制造方法及双面散热电源模块封装 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10879222B2 (zh) |
KR (1) | KR102008278B1 (zh) |
CN (1) | CN110021590B (zh) |
DE (1) | DE102018221124A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113066776A (zh) * | 2020-01-02 | 2021-07-02 | 财团法人工业技术研究院 | 功率模块 |
CN114628263A (zh) * | 2022-05-13 | 2022-06-14 | 威海三维曲板智能装备有限公司 | 一种光电混合封装结构及其制造方法 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11081422B2 (en) * | 2019-03-14 | 2021-08-03 | Toyota Motor Engineering & Manufacturing North America, Inc. | Self-healing PDMS encapsulation and repair of power modules |
US11521921B2 (en) * | 2019-09-04 | 2022-12-06 | Semiconductor Components Industries, Llc | Semiconductor device package assemblies and methods of manufacture |
KR102459361B1 (ko) | 2020-12-14 | 2022-10-28 | 파워마스터반도체 주식회사 | 파워 모듈 패키지 |
JP2022156034A (ja) * | 2021-03-31 | 2022-10-14 | 株式会社デンソー | 半導体装置 |
KR20230046470A (ko) * | 2021-09-30 | 2023-04-06 | 주식회사 아모센스 | 파워모듈용 세라믹 기판, 그 제조방법 및 이를 구비한 파워모듈 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101752326A (zh) * | 2008-12-17 | 2010-06-23 | 费查尔德半导体有限公司 | 具有隔离的散热件的功率四方平板形无引线半导体芯片封装件、使用其的***及其制造方法 |
US20130049137A1 (en) * | 2011-08-26 | 2013-02-28 | Renesas Electronics Corporation | Semiconductor device |
US20130256856A1 (en) * | 2012-03-27 | 2013-10-03 | Infineon Technologies Ag | Multichip Power Semiconductor Device |
CN105140205A (zh) * | 2015-06-30 | 2015-12-09 | 南通富士通微电子股份有限公司 | 一种双面散热的半导体叠层封装结构 |
US20160071778A1 (en) * | 2014-09-10 | 2016-03-10 | Mitsubishi Electric Corporation | Semiconductor Device and Manufacturing Method Thereof |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10231091A1 (de) * | 2002-07-10 | 2004-01-22 | Robert Bosch Gmbh | Aktivgleichrichter-Modul für Drehstromgeneratoren von Fahrzeugen |
JP5947537B2 (ja) * | 2011-04-19 | 2016-07-06 | トヨタ自動車株式会社 | 半導体装置及びその製造方法 |
JP2013016629A (ja) * | 2011-07-04 | 2013-01-24 | Mitsubishi Electric Corp | 半導体モジュール |
JP2015119072A (ja) * | 2013-12-19 | 2015-06-25 | 富士電機株式会社 | レーザ溶接方法、レーザ溶接治具、半導体装置 |
CN105981168B (zh) * | 2014-08-28 | 2018-10-16 | 富士电机株式会社 | 功率半导体模块 |
CN106158734B (zh) * | 2014-10-03 | 2019-01-08 | 力祥半导体股份有限公司 | 半导体封装装置 |
-
2017
- 2017-12-07 KR KR1020170167629A patent/KR102008278B1/ko active IP Right Grant
-
2018
- 2018-11-28 US US16/203,354 patent/US10879222B2/en active Active
- 2018-12-03 CN CN201811464518.5A patent/CN110021590B/zh active Active
- 2018-12-06 DE DE102018221124.8A patent/DE102018221124A1/de active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101752326A (zh) * | 2008-12-17 | 2010-06-23 | 费查尔德半导体有限公司 | 具有隔离的散热件的功率四方平板形无引线半导体芯片封装件、使用其的***及其制造方法 |
US20130049137A1 (en) * | 2011-08-26 | 2013-02-28 | Renesas Electronics Corporation | Semiconductor device |
US20130256856A1 (en) * | 2012-03-27 | 2013-10-03 | Infineon Technologies Ag | Multichip Power Semiconductor Device |
US20160071778A1 (en) * | 2014-09-10 | 2016-03-10 | Mitsubishi Electric Corporation | Semiconductor Device and Manufacturing Method Thereof |
CN105140205A (zh) * | 2015-06-30 | 2015-12-09 | 南通富士通微电子股份有限公司 | 一种双面散热的半导体叠层封装结构 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113066776A (zh) * | 2020-01-02 | 2021-07-02 | 财团法人工业技术研究院 | 功率模块 |
CN114628263A (zh) * | 2022-05-13 | 2022-06-14 | 威海三维曲板智能装备有限公司 | 一种光电混合封装结构及其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
US20190181125A1 (en) | 2019-06-13 |
KR20190067566A (ko) | 2019-06-17 |
DE102018221124A1 (de) | 2019-06-13 |
KR102008278B1 (ko) | 2019-08-07 |
US10879222B2 (en) | 2020-12-29 |
CN110021590B (zh) | 2023-04-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110021590A (zh) | 电源芯片集成模块、其制造方法及双面散热电源模块封装 | |
CN104517954B (zh) | 在两个衬底之间具有半导体芯片的晶体管布置 | |
US10950516B2 (en) | Resin encapsulated power semiconductor module with exposed terminal areas | |
US10319671B2 (en) | Semiconductor package with leadframe | |
CN104637891B (zh) | 包括两个半导体模块和横向延伸连接器的半导体封装 | |
JP2017163135A (ja) | 半導体モジュール | |
CN104659012A (zh) | 具有在再分配结构和装配结构之间的电子芯片的电子部件 | |
US10079195B2 (en) | Semiconductor chip package comprising laterally extending connectors | |
CN113097173A (zh) | 半导体封装及其制造方法 | |
JP2023544138A (ja) | 統合信号ボードを備えたエレベーテッドパワープレーンを有するパワーモジュール及びその実装プロセス | |
US20070145576A1 (en) | Power Semiconductor Circuit And Method Of Manufacturing A Power Semiconductor Circuit | |
US20180211917A1 (en) | Semiconductor module comprising transistor chips, diode chips and driver chips arranged in a common plane | |
KR101994727B1 (ko) | 전력 모듈 패키지 및 그 제조방법 | |
WO2019171804A1 (ja) | 半導体装置 | |
WO2017112863A1 (en) | Metal slugs for double-sided cooling of power module | |
KR20170068037A (ko) | 리드 프레임 일체형 파워 모듈 패키지 | |
CN112582386B (zh) | 功率模块及其制备方法、电器设备 | |
CN212209492U (zh) | 功率模块 | |
EP4283670A2 (en) | Molded power modules | |
CN216413085U (zh) | 半导体电路 | |
CN114050134B (zh) | 半导体电路 | |
US20240213124A1 (en) | Power electronics package layouts, structures, and/or configurations for one or more power devices and processes implementing the same | |
JP7428679B2 (ja) | パワー半導体装置および電力変換装置 | |
EP4141925A1 (en) | Power module with semiconductor packages mounted on metal frame | |
JP6647187B2 (ja) | パワーモジュールおよびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20210310 Address after: Seoul, South Kerean Applicant after: HYUNDAI MOBIS Co.,Ltd. Address before: Seoul, South Kerean Applicant before: HYUNDAI AUTRON Co.,Ltd. |
|
GR01 | Patent grant | ||
GR01 | Patent grant |