CN109144806A - A kind of function verification method and device of register transfer level circuit - Google Patents
A kind of function verification method and device of register transfer level circuit Download PDFInfo
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- CN109144806A CN109144806A CN201710464293.2A CN201710464293A CN109144806A CN 109144806 A CN109144806 A CN 109144806A CN 201710464293 A CN201710464293 A CN 201710464293A CN 109144806 A CN109144806 A CN 109144806A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns
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Abstract
The embodiment of the invention provides a kind of function verification method of register transfer level circuit and devices, to solve the problems, such as that the functional verification of prior art register transfer level circuit is time-consuming too long.This method comprises: register transfer level circuit is divided into several computing units, and for controlling each computing unit collaboration to realize the control unit of circuit function；The computing unit is tested；Described control unit is tested；When determine each computing unit and control unit test pass through when, determine that the functional verification of register transfer level circuit passes through.
Description
Technical field
The present invention relates to digital circuit technique field more particularly to a kind of function verification methods of register transfer level circuit
And device.
Background technique
With the high speed development of digital circuit technique, will be used wider and wider it is general, chip-scale become it is increasing,
Function becomes to become increasingly complex, so that this work of Circuit verification becomes more important, more arduous.And if in Qualify Phase
Mistake cannot be found in time, it will cause huge loss.
For the hardware design of Method at Register Transfer Level (Register Transfer Level, RTL), general authentication
Method can be carried out from the following aspects: full traversal verifying, full accidental validation, critical parameters (corner) verifying, and largely be copied
Machine verifying.In general, if a design can accomplish all standing verifying, the reliability of this design is very
High, but for the design of the class of algorithms, because the parameter of input is very more, the value range of each parameter is again very big,
If all authenticate to, emulate required for test case (case) amount be it is huge, the time may need to grow very much, for
It is a very big test for the duration of project.
Existing verifying process is as shown in Figure 1, full traversal test, orientation traverse test, full random test is three main
Test process.Full traversal test refers to that the traversal test for all input conditions of each function, orientation traversal test are
Refer to that, for the test under special input condition, full random test refers to the test under completely random Parameter Conditions.Wherein, full traversal
All input conditions due to traverse each function are tested, spend the time too long.How to be dropped while ensureing verification the verifying results
The time required to low verifying, the prior art provides solution not yet.
Summary of the invention
The embodiment of the invention provides a kind of function verification method of register transfer level circuit and devices, to solve mesh
The preceding time-consuming too long problem of RTL circuit function verifying.
Concrete scheme provided in an embodiment of the present invention is as follows:
In a first aspect, a kind of function verification method of register transfer level circuit, comprising:
Register transfer level circuit is divided into several computing units, and for controlling each computing unit collaboration to realize
The control unit of circuit function；
The computing unit is tested；
Described control unit is tested；
When determine each computing unit and control unit test pass through when, determine that the function of register transfer level circuit is tested
Card passes through.
With reference to first aspect, in the first possible implementation, the computing unit is tested, comprising:
Determine the corresponding each input parameter of the computing unit；
Determine whole valued combinations of the corresponding each input parameter of the computing unit；
According to the computing unit it is corresponding it is each input parameter whole valued combinations, successively to the computing unit into
Row test.
The possible implementation of with reference to first aspect the first, in the second possible implementation, according to described
Whole valued combinations of the corresponding each input parameter of computing unit, successively test the computing unit, comprising:
Probe unit identical with the computing unit computing function is set；
The input terminal of the probe unit is connect with the input terminal of the computing unit；
The whole valued combinations for sequentially inputting the corresponding each input parameter of the computing unit, compare the defeated of probe unit
The output result of result and computing unit out；
When determining that all output results are identical, determine that the computing unit test passes through.
With reference to first aspect, in the third possible implementation, described control unit is tested, comprising:
It is successively directed to each function of register transfer level circuit, determines the corresponding each input ginseng of current function
Number；
The valued combinations for choosing the corresponding each input parameter of the current function, test described control unit.
The third possible implementation with reference to first aspect, in the fourth possible implementation, described in selection
The currently valued combinations of the corresponding each input parameter of function, test described control unit, comprising:
It is that the corresponding each input parameter of the current function distinguishes value according to preset step-length；
According to each output parameter according to the combination of preset step-length value result, successively described control unit is surveyed
Examination.
Second aspect, a kind of functional verification device of register transfer level circuit, comprising:
Division module, for register transfer level circuit to be divided into several computing units, and for controlling each calculating
Unit cooperates with the control unit to realize circuit function；
Computing unit test module, for testing the computing unit；
Control unit test module, for testing described control unit；
As a result determining module, for when determine each computing unit and control unit test pass through when, determine register
The functional verification of transmitting stage circuit passes through.
In conjunction with second aspect, in the first possible implementation, the computing unit test module, comprising:
First parameter identification module, for determining the corresponding each input parameter of the computing unit；
Value determining module, for determining whole valued combinations of the corresponding each input parameter of the computing unit；
First parametric testing module, for whole value groups according to the corresponding each input parameter of the computing unit
It closes, successively the computing unit is tested.
In conjunction with the first possible implementation of second aspect, in the second possible implementation, described first
Parametric testing module is specifically used for:
Probe unit identical with the computing unit computing function is set；
The input terminal of the probe unit is connect with the input terminal of the computing unit；
The whole valued combinations for sequentially inputting the corresponding each input parameter of the computing unit, compare the defeated of probe unit
The output result of result and computing unit out；
When determining that all output results are identical, determine that the computing unit test passes through.
In conjunction with second aspect, in the third possible implementation, described control unit test module, comprising:
Second parameter identification module is determined current for being successively directed to each function of register transfer level circuit
The corresponding each input parameter of function；
Second parametric testing module, it is right for choosing the valued combinations of the corresponding each input parameter of the current function
Described control unit is tested.
In conjunction with the third possible implementation of second aspect, in the fourth possible implementation, described second
Parametric testing module is specifically used for:
It is that the corresponding each input parameter of the current function distinguishes value according to preset step-length；
According to each output parameter according to the combination of preset step-length value result, successively described control unit is surveyed
Examination.
Register transfer level circuit is divided into several computing units by the embodiment of the present invention, and for controlling each calculating
Unit cooperates with the control unit to realize circuit function, tests the computing unit, surveys to described control unit
Examination, when determine each computing unit and control unit test pass through when, determine register transfer level circuit functional verification lead to
It crosses；Directly circuit function is unfolded to test compared with the prior art, the number for the input parameter tested each time is greatly reduced,
To reduce the kind number combined between each parameter, the number of test case is thereby reduced, meanwhile, control unit is surveyed
Examination, ensures that each computing unit can normally cooperate, the embodiment of the present invention has finally reached at faster speed on the whole
Complete the effect tested circuit function.
Detailed description of the invention
Fig. 1 is the flow diagram of the validation test of RTL in the prior art provided in an embodiment of the present invention；
Fig. 2 is a kind of process signal of the function verification method of register transfer level circuit provided in an embodiment of the present invention
Figure；
Fig. 3 is the flow diagram of computing unit test method provided in an embodiment of the present invention；
Fig. 4 is the RTL electrical block diagram that the specific embodiment of the invention provides；
Fig. 5 is the flow diagram for the RTL validation test that the specific embodiment of the invention provides；
RTL electrical block diagram when the verifying computing unit that Fig. 6 provides for the specific embodiment of the invention；
Fig. 7 is a kind of structural representation of the functional verification device of register transfer level circuit provided in an embodiment of the present invention
Figure；
Fig. 8 is that a kind of another structure of the functional verification device of register transfer level circuit provided in an embodiment of the present invention is shown
It is intended to；
Fig. 9 is the another structural representation of the device of maximum similar area in a kind of determining figure provided in an embodiment of the present invention
Figure.
Specific embodiment
The embodiment of the invention provides a kind of function verification method of register transfer level circuit and devices, solve existing
The time-consuming too long problem of the functional verification of technology register transfer level circuit.
Referring to fig. 2, a kind of function verification method of register transfer level circuit provided in an embodiment of the present invention includes:
S210, register transfer level circuit is divided into several computing units, and for controlling each computing unit collaboration
To realize the control unit of circuit function.
Division mode can divide automatically according to pre-set programs, can also be by division result is manually entered.
Wherein, the corresponding fixed output of the input of each group of fixation, setting input, output ginseng are the characteristics of computing unit
The corresponding test case of number；And control unit is then related to the collaboration of multiple computing units, it is therefore desirable to functional plane into
Row verifying, including the verifying to the input and final output that are related to multiple computing units.
S220, the computing unit is tested.
Preferably, S220 comprises determining that the corresponding each input parameter of the computing unit；Determine the computing unit pair
The whole valued combinations for each input parameter answered；According to whole value groups of the corresponding each input parameter of the computing unit
It closes, successively the computing unit is tested.It is that full traversal test is carried out to computing unit.
Specifically, as shown in figure 3, the method tested computing unit includes:
S310, setting probe unit identical with the computing unit computing function；
S320, the input terminal of the probe unit is connect with the input terminal of the computing unit；
S330, the whole valued combinations for sequentially inputting the corresponding each input parameter of the computing unit, compare probe list
The output result of member and the output result of computing unit；
S340, when determining that all output results are identical, determine that computing unit test passes through.
Probe unit generates input stimulus and correctly output as a result, the output result and probe list for taking computing unit to generate
The output result that member generates compares, that is, can determine whether computing unit with the presence or absence of problem.
After the completion of test, before hardware realization, probe unit code is deleted.
S230, described control unit is tested.
Preferably, testing described control unit, comprising: be successively directed to each function of register transfer level circuit
Can, determine the corresponding each input parameter of current function；Choose the value of the corresponding each input parameter of the current function
Combination, tests described control unit.
Specifically, the valued combinations for choosing the corresponding each input parameter of the current function, to described control unit into
Row test, comprising: according to preset step-length be the corresponding each input parameter difference value of the current function；According to each defeated
Parameter successively tests described control unit according to the combination of preset step-length value result out.Due to the survey of control unit
Examination is mainly whether access control logic is normal, for each group of Verification part value, does not need to cover same control
Each possible value condition under logic processed, therefore according to certain step-length value, it can reduce test volume, improve test
Efficiency.
S240, when determine each computing unit and control unit test pass through when, determine register transfer level circuit
Functional verification passes through.
Combined with specific embodiments below, present inventive concept is described in detail.
Fig. 4 is a circuit under test schematic diagram, and the circuit is based on computing function, wherein there is 8 computing unit (calc_
Unit) and and relevant control unit (control_unit), the input parameter of the module have 8 (par_0, par_1,
Par_2 ... par_7), the bit wide of each parameter is 10.
For circuit function, full traversal verifying is a kind of than more comprehensive verifying means, as long as input parameter
All situations all traverse, then ensuring that function, there is no problem.In the specific embodiment of the invention, input parameter has 8,
The bit wide of each parameter is 10, if that required maximum case number is 2 if doing full traversal coverage test80
It is a, it is assumed that a case can be run through within 3 seconds, then running through these case needs 256 days, this time is obviously too long.
In addition, the verifying for control unit, it can be complete by whether being verified from the point of view of analysis coverage rate, but for meter
It calculates for unit, either Condition Coverage Testing rate, toggle coverage rate or row coverage rate etc., even if all reaching 100%, all
Whether the calculating logic that the design can not be characterized completely is verified completely, therefore, only sees that coverage rate is to be unable to reach to have verified
Full purpose.
Based on the above reasons, the embodiment of the present invention verifies each computing unit respectively, if all meters
It calculates unit to traverse one time, the verifying in conjunction with pseudo- full traversal test to control unit logic is equivalent to the function for having traversed entire circuit
Energy.
Referring to Fig. 5, the verification method that the specific embodiment of the invention provides includes following several test process:
1, pseudo- full traversal test；
Pseudo- full traversal testing needle tests the control logic of function, can be increased with certain step-length as parameters
Value, step-length can be set to 2.Compared with true full traversal, the number of pseudo- full traversal case be equivalent to before 1/ (28).It is pseudo-
Full traversal is the most test item one by one of case, therefore the selection of step-length directly affects testing time length, this is pseudo-
Full traversal design only needs that the maximum value that function corresponds to parameter, minimum value and some medians can be traversed, and walks
Length can be set larger, therefore this is designed to pseudo- full traversal design.
2, probe traversal test
The calculating logic in design is decomposed first, resolves into several small computing units, it should be noted that
Each computing unit be in calculating logic it is independent, the input parameter of each computing unit cannot be too many, generally in 5-6
It is a.It has decomposed and then has traversed test logic entirely for the design of each computing unit is corresponding, as " probe unit ", this
A little probe units can be put into test platform (TestBench).It is single that the excitation that probe unit generates is added to calculating by directly
In member, while the output result of computing unit and the output result of probe unit being taken to compare, to complete to traverse test entirely.These are visited
Needle unit can be opened simultaneously, because the input parameter of each probe unit only has 5-6, the case traversed entirely respectively
Quantity very little, used time are very short.Fig. 6 gives the schematic diagram of probe test pattern.Because computing unit is only in computing function
Vertical, therefore their combination just represents entire calculating logic, the traversal combination of computing unit is also equivalent to entire calculate and leads to
The traversal on road.
3, orientation traversal design；
Orientation test is tested comprising corner, and specific function point test etc., orientation traversal is not midpoint of the invention, herein
It does not repeat them here.
4, full Random Design；
Full random test is exactly that all parameters are all random, is largely emulated, full random ergodic is not weight of the invention
Point, this will not be repeated here.
After above-mentioned 4 tests all pass through, coverage rate collection step is entered.If coverage rate does not reach requirement,
Need to analyze reason, while polishing case, the requirement until meeting coverage rate, test is just calculated and completed.
Referring to Fig. 7, the embodiment of the invention provides a kind of functional verification devices of register transfer level circuit, comprising:
Division module 710, for register transfer level circuit to be divided into several computing units, and by control it is each based on
Unit collaboration is calculated to realize the control unit of circuit function；
Computing unit test module 720, for testing the computing unit；
Control unit test module 730, for testing described control unit；
As a result determining module 740, for when determine each computing unit and control unit test pass through when, determine deposit
The functional verification of device transmitting stage circuit passes through.
Referring to Fig. 8, the computing unit test module 720, comprising:
First parameter identification module 721, for determining the corresponding each input parameter of the computing unit；
Value determining module 722, for determining whole valued combinations of the corresponding each input parameter of the computing unit；
First parametric testing module 723, for whole values according to the corresponding each input parameter of the computing unit
Combination, successively tests the computing unit.
Preferably, first parametric testing module 723 is specifically used for:
Probe unit identical with the computing unit computing function is set；
The input terminal of the probe unit is connect with the input terminal of the computing unit；
The whole valued combinations for sequentially inputting the corresponding each input parameter of the computing unit, compare the defeated of probe unit
The output result of result and computing unit out；
When determining that all output results are identical, determine that the computing unit test passes through.
Referring to Fig. 8, described control unit test module 730, comprising:
Second parameter identification module 731 is determined to work as being successively directed to each function of register transfer level circuit
The corresponding each input parameter of preceding function；
Second parametric testing module 732, for choosing the valued combinations of the corresponding each input parameter of the current function,
Described control unit is tested.
Preferably, second parametric testing module 732 is specifically used for:
It is that the corresponding each input parameter of the current function distinguishes value according to preset step-length；
According to each output parameter according to the combination of preset step-length value result, successively described control unit is surveyed
Examination.
In conclusion overall data access is by being resolved into small computing unit by the present invention, and to these computing units
The method for doing traversal test respectively, to achieve the purpose that the equivalent entire data path of traversal is reached in conjunction with the verifying to control unit
While having arrived reduction emulation case, and the effect of emulation reliability will not be reduced.
It should be understood by those skilled in the art that, the embodiment of the present invention can provide as method, system or computer program
Product.Therefore, complete hardware embodiment, complete software embodiment or reality combining software and hardware aspects can be used in the present invention
Apply the form of example.Moreover, it wherein includes the computer of computer usable program code that the present invention, which can be used in one or more,
The shape for the computer program product implemented in usable storage medium (including but not limited to magnetic disk storage and optical memory etc.)
Formula.
The present invention be referring to according to the method for the embodiment of the present invention, the process of equipment (system) and computer program product
Figure and/or block diagram describe.It should be understood that every one stream in flowchart and/or the block diagram can be realized by computer program instructions
The combination of process and/or box in journey and/or box and flowchart and/or the block diagram.It can provide these computer programs
Instruct the processor of general purpose computer, special purpose computer, Embedded Processor or other programmable data processing devices to produce
A raw machine, so that being generated by the instruction that computer or the processor of other programmable data processing devices execute for real
The device for the function of being specified in present one or more flows of the flowchart and/or one or more blocks of the block diagram.
These computer program instructions, which may also be stored in, is able to guide computer or other programmable data processing devices with spy
Determine in the computer-readable memory that mode works, so that it includes referring to that instruction stored in the computer readable memory, which generates,
Enable the manufacture of device, the command device realize in one box of one or more flows of the flowchart and/or block diagram or
The function of being specified in multiple boxes.
These computer program instructions also can be loaded onto a computer or other programmable data processing device, so that counting
Series of operation steps are executed on calculation machine or other programmable devices to generate computer implemented processing, thus in computer or
The instruction executed on other programmable devices is provided for realizing in one or more flows of the flowchart and/or block diagram one
The step of function of being specified in a box or multiple boxes.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. a kind of function verification method of register transfer level circuit characterized by comprising
Register transfer level circuit is divided into several computing units, and for controlling each computing unit collaboration to realize circuit
The control unit of function；
The computing unit is tested；
Described control unit is tested；
When determine each computing unit and control unit test pass through when, determine that the functional verification of register transfer level circuit is logical
It crosses.
2. the method as described in claim 1, which is characterized in that test the computing unit, comprising:
Determine the corresponding each input parameter of the computing unit；
Determine whole valued combinations of the corresponding each input parameter of the computing unit；
According to whole valued combinations of the corresponding each input parameter of the computing unit, successively the computing unit is surveyed
Examination.
3. method according to claim 2, which is characterized in that according to the complete of the corresponding each input parameter of the computing unit
Portion's valued combinations successively test the computing unit, comprising:
Probe unit identical with the computing unit computing function is set；
The input terminal of the probe unit is connect with the input terminal of the computing unit；
The whole valued combinations for sequentially inputting the corresponding each input parameter of the computing unit, compare the output knot of probe unit
The output result of fruit and computing unit；
When determining that all output results are identical, determine that the computing unit test passes through.
4. the method as described in claim 1, which is characterized in that test described control unit, comprising:
It is successively directed to each function of register transfer level circuit, determines the corresponding each input parameter of current function；
The valued combinations for choosing the corresponding each input parameter of the current function, test described control unit.
5. method as claimed in claim 4, which is characterized in that choose taking for the corresponding each input parameter of current function
Value combination, tests described control unit, comprising:
It is that the corresponding each input parameter of the current function distinguishes value according to preset step-length；
According to each output parameter according to the combination of preset step-length value result, successively described control unit is tested.
6. a kind of functional verification device of register transfer level circuit characterized by comprising
Division module, for register transfer level circuit to be divided into several computing units, and for controlling each computing unit
Cooperate with the control unit to realize circuit function；
Computing unit test module, for testing the computing unit；
Control unit test module, for testing described control unit；
As a result determining module, for when determine each computing unit and control unit test pass through when, determine register transfer
The functional verification of grade circuit passes through.
7. device as claimed in claim 6, which is characterized in that the computing unit test module, comprising:
First parameter identification module, for determining the corresponding each input parameter of the computing unit；
Value determining module, for determining whole valued combinations of the corresponding each input parameter of the computing unit；
First parametric testing module, for according to the computing unit it is corresponding it is each input parameter whole valued combinations, according to
It is secondary that the computing unit is tested.
8. device as claimed in claim 7, which is characterized in that first parametric testing module is specifically used for:
Probe unit identical with the computing unit computing function is set；
The input terminal of the probe unit is connect with the input terminal of the computing unit；
The whole valued combinations for sequentially inputting the corresponding each input parameter of the computing unit, compare the output knot of probe unit
The output result of fruit and computing unit；
When determining that all output results are identical, determine that the computing unit test passes through.
9. device as claimed in claim 6, which is characterized in that described control unit test module, comprising:
Second parameter identification module determines current function for being successively directed to each function of register transfer level circuit
Corresponding each input parameter；
Second parametric testing module, for choosing the valued combinations of the corresponding each input parameter of the current function, to described
Control unit is tested.
10. device as claimed in claim 9, which is characterized in that second parametric testing module is specifically used for:
It is that the corresponding each input parameter of the current function distinguishes value according to preset step-length；
According to each output parameter according to the combination of preset step-length value result, successively described control unit is tested.
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