Disclosure of Invention
In order to solve the problems, the invention aims to provide a simulation model of a high-voltage variable-frequency driving induction motor, which can well simulate the actual running condition of a medium-high-voltage induction motor.
The invention provides a simulation model of a high-voltage variable-frequency driving induction motor, which comprises the following components:
the 12-pulse rectification circuit consists of two groups of three-phase symmetrical alternating-current voltage sources and a 12-pulse rectification bridge, and the line voltages of the two groups of three-phase symmetrical alternating-current voltage sources are connected to the input end of the 12-pulse rectification bridge;
the direct current bus filter capacitor is connected to the output end of the 12-pulse rectifier bridge;
the load circuit is connected with two ends of the direct current bus filter capacitor;
the input end of the H bridge unit circuit is connected with the two ends of the direct current bus filter capacitor, the output end of the H bridge unit circuit is output to the induction motor, the H bridge unit circuit consists of a modulation circuit and an H bridge inverter, a modulation signal is connected to the input end of the modulation circuit, the output end of the modulation circuit is connected with the g end of the H bridge inverter, and the terminal voltage output by the A, B end of the H bridge inverter is output to the induction motor;
a cascade H-bridge circuit for connecting A, B ends of the H-bridge inverters in the 6H-bridge unit circuits in series;
the induction motor compensation circuit is connected to the induction motor and is used for compensating reactive power of the induction motor;
and the indirect vector control circuit is connected to the induction motor and used for controlling the output torque and the stator exciting current of the induction motor.
As a further improvement of the invention, the 12-pulse rectifier bridge comprises a rectifier transformer and a thyristor rectifier bridge, wherein the rectifier transformer is a three-winding three-phase transformer, the primary side of the rectifier transformer is connected with the line voltage of the three-phase symmetrical alternating-current voltage source, the branch voltage of the secondary side of the rectifier transformer is respectively connected with the input ends of the two thyristor rectifier bridges, and the two output ends of the two thyristor rectifier bridges are connected with the direct-current bus filter capacitor.
As a further improvement of the present invention, the load circuit includes a start circuit, a switch circuit, an energy consumption circuit, a discharge circuit, an induction motor load and a brake power supply, wherein an input end of the start circuit is connected with an input end of a thyristor rectifier bridge, an output end of the start circuit is connected with an input end of the switch circuit, an output end of the switch circuit is connected with an input end of the energy consumption circuit, an output end of the energy consumption circuit is connected with the discharge circuit, the discharge circuit is connected with the induction motor load, and the brake power supply is connected to the induction motor.
As a further improvement of the invention, the induction motor load is a constant power load.
As a further improvement of the invention, the modulation circuit is a frequency multiplication modulation circuit, four driving signals S1, S2, S3 and S4 of the frequency multiplication modulation circuit are respectively an upper bridge arm driving signal on the left side of an H bridge, a lower bridge arm driving signal on the left side of the H bridge, an upper bridge arm driving signal on the right side of the H bridge and a lower bridge arm driving signal on the right side of the H bridge, when a carrier wave is not phase-shifted, the carrier wave is used as a carrier wave signal of the left bridge arm of the H bridge, carrier wave phase-shifted 180 degrees is used as a modulation signal of the right bridge arm of the H bridge, and two voltages modulated by two bridge arms of the H bridge are output by difference to obtain an output voltage, and the output voltage is connected to the g end of the H bridge inverter.
As a further improvement of the invention, the cascade H-bridge circuit adopts carrier horizontal phase shift modulation, carrier phase shift pi/6, wave delay Ts/12 and bridge arm signal delay Ts/12 at the same position.
As a further improvement of the invention, the calculation formula of the direct current bus filter capacitor is as follows:
L=P/(2πfC n-1 U 2 )
n=1,2,3...
wherein C is 3 The DC bus filter capacitor is characterized in that P is 3 times of rated power, f is input power frequency, U is bus voltage peak value, and a is DC bus voltage ripple quantity.
As a further improvement of the invention, the induction motor compensation circuit adopts a compensation capacitor, and the calculation formula of the compensation capacitor is as follows:
in the method, in the process of the invention,for the initial power factor angle, +.>To compensate for the power factorThe digital angle, P is the induction motor output power, C is the compensation capacitance, U is the phase voltage, ω=100 pi.
The beneficial effects of the invention are as follows:
the method can simulate the actual running condition of the medium-high voltage induction motor well, has good guiding significance for the design of the whole driving control system in engineering practice, and has practical application value.
Drawings
FIG. 1 is a schematic diagram of a 12-pulse rectifier circuit and a load circuit;
FIG. 2 is a schematic diagram of a 12-pulse rectifier circuit;
FIG. 3 is a schematic diagram of a load circuit;
FIG. 4 is a schematic diagram of a start-up circuit;
FIG. 5 is a schematic diagram of a switching circuit;
FIG. 6 is a schematic diagram of a power consumption circuit;
FIG. 7 is a schematic diagram of a discharge circuit;
FIG. 8 is a schematic diagram of a DC voltage waveform in a load circuit;
FIG. 9 is a schematic diagram of a DC waveform in a load circuit;
FIG. 10 is a schematic diagram of a DC voltage waveform in a filtered load circuit;
FIG. 11 is a schematic diagram of a DC waveform in a filtered load circuit;
FIG. 12 is a schematic diagram of a DC bus resistance mode test;
FIG. 13 is a schematic diagram of a DC bus PWM mode of operation test;
FIG. 14 is a schematic diagram of an H-bridge cell circuit;
FIG. 15 is a schematic diagram of a frequency doubling modulation circuit;
FIG. 16 is a schematic diagram of a frequency multiplied modulation waveform;
fig. 17 is a schematic diagram of a bipolar modulation waveform when thd=11.13%;
fig. 18 is a schematic diagram of a frequency-doubled modulation waveform when thd=3.06%;
FIG. 19 is a schematic diagram of a cascaded H-bridge circuit;
FIG. 20 is a schematic diagram of an a-phase inverter module;
FIG. 21 is a schematic diagram of an a-phase modulation module;
FIG. 22 is a schematic diagram of carrier horizontal phase shift modulation;
FIG. 23 is a schematic diagram of a DC bus voltage waveform of an H-bridge unit;
FIG. 24 is a schematic diagram of an H-bridge cell voltage waveform;
FIG. 25 is a schematic diagram of the H-bridge cell voltage waveform at a first order filter cutoff frequency of 1000 pi;
FIG. 26 is a schematic diagram of a phase voltage waveform;
FIG. 27 is a schematic diagram of a three-phase voltage waveform with a first order filter cutoff frequency of 1000 pi;
FIG. 28 is a schematic diagram of a phase a current waveform;
FIG. 29 is a schematic diagram of three-phase current waveforms with a first order filter cutoff frequency of 1000 pi;
FIG. 30 is a direct start motor simulation model;
FIG. 31 is a schematic diagram of direct start phase voltage waveforms for an induction motor;
FIG. 32 is a schematic diagram of direct start phase current waveforms for an induction motor;
FIG. 33 is a schematic diagram of a start-up current waveform;
FIG. 34 is a schematic diagram of an idle current waveform;
FIG. 35 is a schematic diagram of a nominal load current waveform;
FIG. 36 is a schematic diagram of motor speed waveforms;
FIG. 37 is a schematic diagram of motor torque waveforms;
FIG. 38 is a schematic diagram of an active power waveform during a start-up process;
FIG. 39 is a schematic diagram of a nominal operating active power waveform;
FIG. 40 is a schematic diagram of reactive power waveforms during start-up;
FIG. 41 is a schematic diagram of a nominal operating reactive power waveform;
FIG. 42 is a schematic diagram of reactive power waveforms during start-up after compensation;
FIG. 43 is a schematic diagram of a nominal operating reactive power waveform after compensation;
FIG. 44 is a vector control block diagram;
FIG. 45 is a vector control simulation model;
FIG. 46 is an abc- αβ coordinate transformation module of FIG. 45;
FIG. 47 is the α β -dq coordinate transformation module of FIG. 45;
FIG. 48 is the dq- αβ coordinate transformation module of FIG. 45;
FIG. 49 is the α, β -abc coordinate transformation module of FIG. 45;
FIG. 50 is a schematic diagram of indirect vector control motor phase voltage waveforms;
FIG. 51 is a schematic diagram of indirect vector control motor phase current waveforms;
FIG. 52 is a schematic diagram of an indirect vector control motor load torque waveform;
FIG. 53 is a schematic diagram of an indirect vector control motor speed waveform;
FIG. 54 is a schematic diagram of an indirect vector control motor flux linkage waveform;
fig. 55 is a schematic diagram of an indirect vector control motor torque waveform.
Detailed Description
The invention will now be described in further detail with reference to specific examples thereof in connection with the accompanying drawings.
The embodiment of the invention provides a simulation model of a high-voltage variable-frequency driving induction motor, which comprises the following steps:
the 12-pulse rectification circuit consists of two groups of three-phase symmetrical alternating-current voltage sources and a 12-pulse rectification bridge, and the line voltages of the two groups of three-phase symmetrical alternating-current voltage sources are connected to the input end of the 12-pulse rectification bridge;
the direct current bus filter capacitor is connected to the output end of the 12-pulse rectifier bridge;
the load circuit is connected with two ends of the direct current bus filter capacitor;
the input end of the H bridge unit circuit is connected with two ends of the direct current bus filter capacitor, the output end of the H bridge unit circuit is output to the induction motor, the H bridge unit circuit consists of a modulation circuit and an H bridge inverter, a modulation signal is connected to the input end of the modulation circuit, the output end of the modulation circuit is connected with the g end of the H bridge inverter, and the terminal voltage output by the A, B end of the H bridge inverter is output to the induction motor;
a cascade H-bridge circuit for connecting A, B ends of the H-bridge inverters in the 6H-bridge unit circuits in series;
the induction motor compensation circuit is connected to the induction motor and used for compensating reactive power of the induction motor;
and the indirect vector control circuit is connected with the induction motor and is used for controlling the output torque and the stator exciting current of the induction motor.
In order to reduce the ripple quantity of the DC bus voltage and reduce the capacity of the filter capacitor, a 12-pulse rectifying circuit is selected. The connection between the 12-pulse rectifier circuit and the load circuit is shown in fig. 1, and the output end udc+, udc-of the 12-pulse rectifier circuit is connected with the input end udc+, udc-of the load circuit. As shown in fig. 2, the 12-pulse rectifier bridge comprises a rectifier transformer and a thyristor rectifier bridge, the rectifier transformer is a three-winding three-phase transformer, the primary side of the rectifier transformer is connected with the line voltage of a three-phase symmetrical alternating current voltage source, the branch voltage of the secondary side of the rectifier transformer is respectively connected with the input ends of the two thyristor rectifier bridges, and the two output ends of the two thyristor rectifier bridges are connected with a direct current bus filter capacitor. Ua, ub, uc, ua1, ub1 and Uc1 are voltages obtained by transforming three-phase symmetrical alternating current voltage sources through a three-winding three-phase transformer, and serve as input voltages of two thyristor rectifier bridges, and Udc+ and Udc-at output ends of the two thyristor rectifier bridges serve as output voltages. The line voltage of the three-phase symmetrical alternating-current voltage source has an effective value of 400V, and the phase difference of the two voltage sources is 30 degrees. The peak value of the direct current voltage output by the thyristor rectifier bridge is 1090V.
As shown in fig. 3, the load circuit comprises a starting circuit, a switching circuit, an energy consumption circuit, a discharging circuit, an induction motor load and a braking power supply, wherein the input end of the starting circuit is connected with the input end of a thyristor rectifier bridge, the output end of the starting circuit is connected with the input end of the switching circuit, the output end of the switching circuit is connected with the input end of the energy consumption circuit, the output end of the energy consumption circuit is connected with the discharging circuit, the discharging circuit is connected with the induction motor load, and the braking power supply is connected to the induction motor.
Carrying out load test on a direct current bus circuit, adopting a resistance load model, wherein an actual load circuit is an induction motor load, and is a constant power load under rated power, the rated power is 2MW, and the bus current is as follows:
wherein, P is rated power, m=3, the number of induction motor phases, N=6, the number of cascade H bridges, U dc And 1090V, which is the output peak of the 12-pulse rectifier bridge, namely the dc bus voltage.
Can calculate I dc When the filter capacitor is not added, the load circuit waveform at rated load is shown in fig. 8 and 9, and it can be seen that the ripple amount of the dc bus voltage is about 3.21%, so that the filter capacitor is required to be added to reduce the ripple amount of the output voltage, wherein in order to determine the ripple amount of the bus voltage, the load resistor r=3.56 Ω is determined by setting 3 times of the actual load power in consideration of the design margin, and the ripple amount a=%1u is determined by adding the filter capacitor dc The design is required, and the selection of the 12-pulse wave filter capacitor is determined according to the design process of the 3-phase 6-pulse wave bridge type uncontrolled rectifying circuit.
The calculation formula of the DC bus filter capacitor is as follows:
L=P/(2πfC n-1 U 2 )
wherein n=1, 2,3 3 The DC bus filter capacitor is characterized in that P is 3 times of rated power, f is input power frequency, U is bus voltage peak value, and a is DC bus voltage ripple quantity.
C is obtained according to the above parameters 0 The final capacitance value is calculated to be C by iteration for 3 times 3 = 0.0307F, add filterAfter the capacitor, at the time of 3 times rated power, the output waveform of the rectifier bridge is shown in fig. 10 and 11. It can be seen that the bus voltage ripple quantity is less than 1%, and the design requirement is met.
As shown in fig. 4-7, the starting circuit, the switching circuit, the energy consumption circuit and the discharging circuit respectively play a role in controlling the load circuit. The starting circuit limits the DC bus establishment speed, ensures that the charging current and the capacitor voltage are in an allowable range, can set the size of the charging resistor according to the bus voltage pumping limit in simulation, does not consider the charging current (the charging resistor is determined according to the voltage and the current in actual engineering), wherein the starting resistor R=0.02Ω, the starting time t=0.001 s, the system switch controls the DC bus output, the setting t=0.2 s, the bus voltage pumping is limited by the power consumption circuit when the motor is braked, the power consumption resistor R=0.1Ω, the discharging circuit releases the bus capacitor charge cleanly, the discharging time is the same as the system outage time t=0.2 s, the discharging resistor R=1Ω (the actual design is the same as the starting resistor process), the braking power supply simulates the motor braking process, and the DC voltage is set to 2500V, and the action time t=0.05 to 0.2 s.
The simulation waveforms of the process of starting the DC bus capacitor, braking the motor energy consumption and ending the discharging in the actual process under the rated power are shown in figure 12, no overvoltage is started, when the motor is braked to enable the bus voltage to rise to 1500V, a braking circuit is opened, braking energy is consumed through a resistor, stability of the bus voltage is guaranteed, and after the motor is stopped, a discharging circuit is started to release the bus voltage. The actual load characteristic is a PWM type constant power load, so that it is necessary to verify the reliability of the system operation in the PWM circuit, and simulation is performed, as shown in fig. 13, when t >0.02s, the motor is braked to generate reverse charging current, and in order to ensure the stability of the bus voltage, the bus voltage limits 1100V, and the test shows that the bus voltage waveform is stable (the PWM operation mode is the test result after the cascade H bridge is built).
As shown in FIG. 14, the H-bridge unit circuit simulation circuit can know that the effective value of the line voltage of the induction motor is 6000V according to the parameters of the induction motor, thus the effective value of the phase voltage is 3464V, the peak value is 4899V, each phase inverter adopts a mode of cascade connection of 6H-bridge units,the peak value of the output voltage of each unit is 816.5V, according to the simulation result of the previous bus voltage, U dc =1090v, thus modulating signal U r The frequency doubling modulation circuit is shown in fig. 15, and four driving signals S1, S2, S3, S4 of the frequency doubling modulation circuit are an upper H-bridge left-side arm driving signal, a lower H-bridge left-side arm driving signal, an upper H-bridge right-side arm driving signal, and a lower H-bridge right-side arm driving signal, respectively. When the carrier wave is not phase-shifted, the carrier wave signal is used as a left bridge arm of the H bridge, and the modulation process is U r >Uc1, S1 is on, S2 is off; carrier wave phase shift 180 degrees is used as the modulating signal of the right side bridge arm of the H bridge, and the modulating process is U r <Uc1, S3 is on, S4 is off; thus, the two voltages modulated by the two bridge arms of the H bridge are subjected to difference output to obtain an output voltage, and the output voltage is connected to the g end of the H bridge inverter in a pressing mode. Because the action time is not uniform when the two bridge arms are modulated, the equivalent switching frequency is doubled, the THD of the output voltage waveform is obviously smaller than that of bipolar and unipolar modulation, and the modulation waveform is shown in figure 16. In contrast to the bipolar modulation strategy, the output waveforms are shown in fig. 17 and 18. The frequency doubling modulation effect is better (the cut-off frequency of the first order filter is 1000 pi), in fig. 15, the carrier frequency fs=5khz, the same dc offset is performed with the modulated signal, and the triangular signal is set as follows: [0ts/4ts/23 ts/4ts ]],Output values:[1 2 1 0 1]。
According to the previous analysis result, each phase inverter is provided with 6H bridge units, each H bridge unit adopts frequency multiplication modulation, a cascade H bridge circuit adopts carrier horizontal phase shift modulation, carrier phase shift pi/6, wave delay Ts/12 and bridge arm signal delay Ts/12 at the same position. The cascade H-bridge circuit is shown in FIG. 19, wherein the a-phase inverter module is shown in FIG. 20, the DC power supply adopts a 12-pulse rectification circuit, the carrier modulation circuit is shown in FIG. 21, the carriers are respectively shifted by Ts/12, the carrier waveforms after the phase shift are shown in FIG. 22, and S is the same as the carrier waveforms after the phase shift 1 -S 6 The driving signals of the left bridge arm of the H-bridge unit are respectively represented, so that carrier delay Ts/12 and the bridge arm signals at the same position are delayed by Ts/12.
The full-bridge inverter test is performed by using a resistive load, the system works under rated power, the efficiency and the power factor of the system (default is 100 percent, capacity margin is increased) are not considered, the amplitude of the phase current can be calculated to be about ia=1.414×2e6/1.732/6e3=272A, and when the rated power is operated, the bus voltage of the H-bridge unit is shown in fig. 23. FIG. 23 shows that the ripple magnitude of the DC bus is 0.4%, meeting the previous design requirements, U, according to the previous design requirements of 3 times the power capacity (6 MW) dc The ripple amount of (2) is less than 1%, and the rated operating state is about 0.36%.
The simulation results at rated power of the cascaded H-bridge inverter designed according to the system voltage class and capacity are shown in fig. 24-29, fig. 24 is an output voltage of an H-bridge unit, a dc bus voltage is about 1090V, a ripple quantity is small in a rated operation state, fig. 25 is an output voltage of the H-bridge unit after filtering, an amplitude is about 816.5V, a filter cut-off frequency is high, no signal attenuation occurs, the output voltage is basically consistent with a set modulation voltage, fig. 26 is an a-phase output voltage, fig. 27 is an a-phase filtered phase voltage, about 4900V, fig. 28 is an a-phase current, fig. 29 is an a-phase current after filtering, and an amplitude is about 271A.
The simulation parameters of the induction motor are as follows:
line voltage urms=6 KV, power p=2 MW, efficiency 97%, power factor 0.93, stator resistance: 0.5 Ω, rotor resistance: 0.12 Ω, stator leakage inductance: 2.9mH, rotor leakage inductance: 2.9mH, excitation inductance: 0.18H, moment of inertia: 66Kg.m2, maximum torque coefficient: 3.8Tn, maximum slip coefficient: 0.067, rated torque: 12732N, rated slip: 0.8%, rated rotation speed: 1488rpm, start torque: 0.60Tn, start current: 8In.
In order to analyze the dynamic process of direct start of the high-power induction motor, reactive compensation is performed on motor excitation, and first, direct start test of the induction motor is performed, and a direct start motor simulation model is shown in fig. 30. The simulation time was 2.5s and the load torque was added to the rated load torque tl=12732 n.m at t=1.2 s. Simulation results are shown in fig. 31 and 32. As can be seen from fig. 31 and 32, direct start-up generates a large start-up current, and the start-up to rated load stabilization current process is shown in fig. 33-35.
According to the motor parameters, the motor phase current amplitude at rated power can be calculated according to the output power:
where p=2mw, u line =6000V,η=0.97,Calculating to obtain I a =301.7a, fig. 33 shows that the starting current amplitude is about 2420A to 8In, fig. 24 shows that the no-load current amplitude is 100A, and fig. 35 shows that the rated current amplitude is 302A.
The starting torque and the rotational speed waveforms are shown in fig. 36 and 37, and the electromagnetic torque generates severe oscillation during the starting process, so that the rotational speed generates high-frequency vibration, which is very impact on the motor with very large rotational inertia. The active and reactive power during motor start-up is shown in fig. 38-41. The reactive power is very high when starting, mainly because the slip ratio is 1 when starting, the rotor electric equivalent resistance is very small, the system generates very large reactive current, the reactive power is very large when starting and the power factor is very low when all the reactive power is used for establishing the magnetic field and the leakage magnetomotive force of the rotor, the slip ratio is reduced along with the rising of the rotating speed, the torque is increased, the active power is increased, when the maximum slip ratio is reached, the torque is maximum, the reactive power of the rotor side leakage impedance is negligible, the active power is output mainly, the single-phase active power P= 0.6835MW when the motor is operated in the rated state is obtained by testing, the single-phase reactive power Q= 0.2686MW is obtained by the test, the power factor is 0.93 because the power level of the motor is higher, the generated reactive power is very large though the power factor is required to be compensated, the compensation calculation can be carried out according to the power triangle, the target power factor is 0.98, and the calculation process is as follows:
in the method, in the process of the invention,for the initial power factor angle, +.>For the compensated power factor angle, P is the induction motor output power, C is the compensation capacitance, U is the induction motor phase voltage, ω=100 pi. Can be calculated according to the compensation targetThe output power p=2mw, the phase voltage u=3464v, ω=100pi, and the compensation capacitance c= 3.3635e-5F can be calculated. The reactive power waveform after compensation is shown in fig. 42 and 43, the reactive power is 0.142MW, and the power factor is 0.979 (active power is unchanged).
The vector control block diagram is shown in fig. 44, and the simulation model is shown in fig. 45. The coordinate transformation module simulation models of abc- αβ, αβ -dq, dq- αβ and αβ -abc in fig. 45 are shown in fig. 46 to 49.
The results of the indirect vector control simulation are shown in fig. 50-55. In order to realize complete decoupling of exciting current and torque current at the stator side, a flux linkage closed loop is adopted, the flux linkage establishment time constant Tr is controlled to be eliminated, the flux linkage establishment time is shortened, the flux linkage response rate is improved, a rotating speed signal is not given when simulation starts, after the flux linkage establishment is completed (t <0.3 s), the rotating speed signal is given, in order to ensure quick torque response, the torque closed loop is established, the torque adjusting process of the system is quicker, the innermost loop is a current closed loop, quick adjustment of current is realized, and the response performance of the outer loop is ensured. In the simulation process, the stator current limiting value is 2In=600A, and the simulation result shows that the indirect vector control characteristic is obviously better than the first two control modes, and the method can be completely applied to a high-performance induction motor driving system.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.