CN105374332A - Liquid display and source electrode side fan-out area circuit thereof - Google Patents
Liquid display and source electrode side fan-out area circuit thereof Download PDFInfo
- Publication number
- CN105374332A CN105374332A CN201510918482.3A CN201510918482A CN105374332A CN 105374332 A CN105374332 A CN 105374332A CN 201510918482 A CN201510918482 A CN 201510918482A CN 105374332 A CN105374332 A CN 105374332A
- Authority
- CN
- China
- Prior art keywords
- switch
- output terminal
- data line
- control signal
- out area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
Disclosed are a liquid display and a source electrode side fan-out area circuit thereof. The source electrode side fan-out area circuit comprises a first switch, a second switch, a third switch and a fourth switch which are controlled by a control signal jointly, the first switch is connected between a first output end and a first data line, the second switch is connected between the first output end and a third data line, switching action of the second switch is opposite to that of the first switch, the third switch is connected between a third output end and the first data line, switching action of the third switch is opposite to that of the first switch, and the fourth switch is connected between the third output end and the third data line, and switching action of the fourth switch is identical with that of the first switch. Consequently, transmission direction of sub-pixel signals can be changed by changing the control signal, and the liquid display is supportive of specific display applications.
Description
[technical field]
The invention relates to field of liquid crystal, relate to a kind of liquid crystal display and source side fan-out area circuit thereof especially.
[background technology]
Thin Film Transistor-LCD (ThinFilmTransistorLiquidCrystalDisplay, TFT-LCD) be one of the major product of current plane display, become show tools important in present information scientific and technological industry, video product.As shown in Figure 1, the main drive principle of Thin Film Transistor-LCD is by red/green/blue (R/G/B) compressed signal by system board, control signal and power supply are connected with the splicing ear on printed circuit board by wire rod, timing controller (the TimingController of data on printed circuit board 90, TCON) after process, through the transmission of printed circuit board 90, be connected with the viewing area 93 by sweep trace and data line definition with grid drive chip 92 by source driving chip 91, thus make the power supply needed for Thin Film Transistor-LCD acquisition, sweep signal and data-signal.
Generally speaking, as shown in Figure 2, each pixel P1 ~ Pn is made up of red, green, blue (R/G/B) three sub-pixels the pixel arrangement in the viewing area 93 of Thin Film Transistor-LCD.Under normal circumstances, the direction of scanning of the sub-pixel in horizontal direction is as shown in A1, sequentially open according to sweep signal from pixel P1 →...→ pixel Pn, and the pixel data in each pixel is transmitted by the order of R (red) → G (green) → B (indigo plant).But under the applicable cases that some are special, there is particular/special requirement the direction of scanning of such as display manufacturer to liquid crystal display, or when user needs liquid crystal display to be inverted display, the direction of scanning of the sub-pixel in horizontal direction will as shown in A2, i.e. pixel Pn →...→ pixel P1, pixel data in each pixel then can transmit with the order of B (indigo plant) → G (green) → R (red), but the compressed signal format of R/G/B due to front end input remains and is set to and transmits with the order of R (red) → G (green) → B (indigo plant), so can cause should being switched to the data of Rn by the Bn that misinformates from R1, the Rn and the data that should be switched to Bn from B1 are misinformated to, cause picture abnormal.
Although part timing controller can support R/BSwap (exchanges data by R/B), this measure needs to increase extra data processing unit, will improve the cost of liquid crystal display.
Therefore, be necessary to provide a kind of liquid crystal display and source side fan-out area circuit thereof, to solve the problem existing for prior art.
[summary of the invention]
Because the shortcoming of prior art, fundamental purpose of the present invention is to provide a kind of liquid crystal display and source side fan-out area circuit thereof, to improve the problem that existing Thin Film Transistor-LCD does not support R/BSwap.
For reaching aforementioned object of the present invention, the invention provides a kind of source side fan-out area circuit, in order to be connected between one source pole driving circuit and a pel array, described source electrode drive circuit comprises the first output terminal, the second output terminal and the 3rd output terminal, respectively in order to export sub-pixel data signal, described pel array comprises the first data line, the second data line and the 3rd data line, described source side fan-out area circuit comprises: the first switch, it is connected between described first output terminal and described first data line, and according to control signal conducting or a shutoff; One second switch, it is connected between described first output terminal and described 3rd data line, and according to described control signal conducting or shutoff, its switch motion is contrary with described first switch; One the 3rd switch, it is connected between described 3rd output terminal and described first data line, and according to described control signal conducting or shutoff, its switch motion is contrary with described first switch; And one the 4th switch, it is connected between described 3rd output terminal and described 3rd data line, and according to described control signal conducting or shutoff, its switch motion is identical with described first switch.
In one embodiment of this invention, described source side fan-out area circuit also comprises a connecting line, is connected between described second output terminal and described second data line.
In one embodiment of this invention, when the first switch and the 4th switch open and second switch and the 3rd switch are closed time, described first output terminal exports a red subpixel data signal to described first data line, and described 3rd output terminal exports a blue subpixel data signal to described 3rd data line; When the first switch and the 4th switch close and second switch and the 3rd switch open time, described first output terminal exports a red subpixel data signal to described 3rd data line, and described 3rd output terminal exports a blue subpixel data signal to described first data line.
In one embodiment of this invention, described first switch, second switch, the 3rd switch and the 4th switch are connected to a control signal end jointly to receive described control signal.
In one embodiment of this invention, described first switch and the 4th switch are nmos pass transistor; Second switch and the 3rd switch are PMOS transistor.
In one embodiment of this invention, the drain electrode of described first switch connects described first output terminal, and grid connects described control signal end, and source electrode connects described first data line; The source electrode of described second switch connects described first output terminal, and grid connects described control signal end, and drain electrode connects described 3rd data line; The source electrode of described 3rd switch connects described 3rd output terminal, and grid connects described control signal end, and drain electrode connects described first data line; The drain electrode of described 4th switch connects described 3rd output terminal, and grid connects described control signal end, and source electrode connects described 3rd data line.
The present invention separately provides a kind of liquid crystal display, and it comprises: one source pole driving circuit, comprises at least one first output terminal, the second output terminal and the 3rd output terminal, respectively in order to export sub-pixel data signal; One pel array, comprises at least one first data line, the second data line and the 3rd data line; And fan-out area, one source pole side circuit, be connected between one source pole driving circuit and a pel array, and comprise: one first switch, it is connected between described first output terminal and described first data line, and according to control signal conducting or a shutoff; One second switch, it is connected between described first output terminal and described 3rd data line, and according to described control signal conducting or shutoff, its switch motion is contrary with described first switch; One the 3rd switch, it is connected between described 3rd output terminal and described first data line, and according to described control signal conducting or shutoff, its switch motion is contrary with described first switch; And one the 4th switch, it is connected between described 3rd output terminal and described 3rd data line, and according to described control signal conducting or shutoff, its switch motion is identical with described first switch.
The present invention mainly arranges fan-out area, one source pole side circuit between source electrode drive circuit and the source side of pel array, the source side fan-out area circuit that should consist of several MOS switch can realize R/BSwap simply by the output voltage of change one control signal, and then can improve the problem that existing Thin Film Transistor-LCD does not support R/BSwap.
[accompanying drawing explanation]
Fig. 1 is the driving configuration diagram of existing Thin Film Transistor-LCD.
Fig. 2 is the transmission direction schematic diagram of the pixel data of the viewing area of signal Thin Film Transistor-LCD.
Fig. 3 is the circuit diagram of the source side fan-out area circuit of one embodiment of the present invention.
[embodiment]
For allowing above-mentioned purpose of the present invention, feature and advantage become apparent, present pre-ferred embodiments cited below particularly, and coordinate accompanying drawing, be described in detail below.Moreover, the direction term that the present invention mentions, such as " on ", D score, "front", "rear", "left", "right", " interior ", " outward ", " side " etc., be only the direction with reference to annexed drawings.Therefore, the direction term of use is in order to illustrate and to understand the present invention, and is not used to limit the present invention.
Please refer to shown in Fig. 3, Fig. 3 is the circuit diagram of the source side fan-out area circuit of one embodiment of the present invention.Source side fan-out area of the present invention circuit is connected between one source pole driving circuit and a pel array.Described source electrode drive circuit can be a COF (chiponfilm) encapsulation unit, comprises at least one first output terminal Rn, the second output terminal Gn and the 3rd output terminal Bn.Described first output terminal Rn, the second output terminal Gn and the 3rd output terminal Bn are adjacent one another are, respectively in order to export sub-pixel data signal.Such as, described first output terminal Rn, the second output terminal Gn and the 3rd output terminal Bn can in order to respectively output red sub-pixel data signal, green subpixel data signal and blue subpixel data signals, to form the view data of a pixel cell.Described pel array is defined by a plurality of data lines, many sweep traces interlaced with data line and multiple film crystal pipe unit and forms, a wherein corresponding pixel cell, described data line comprises adjacent at least one first data line D1, the second data line D2 and the 3rd data line D3, to be formed three sub-pixel unit with described sweep trace.
As shown in Figure 3, described source side fan-out area main circuit will comprise one first switch M1, a second switch M2, one the 3rd switch M3 and the 4th switch M4, described first switch M1, second switch M2, the 3rd switch M3 and the 4th switch M4 are connected to a control signal end B jointly, to receive the control signal from this control signal end B.Because R/Bswap mainly relates to the exchange of red subpixel data and blue subpixel data, therefore described source side fan-out area circuit also can comprise a connecting line, between the second output terminal Gn being used for described in being directly connected in exporting green subpixel data signal and described second data line D2.
As shown in Figure 3, described first switch M1 is connected between described first output terminal Rn and described first data line D1, it can according to described control signal conducting or shutoff, to determine whether the red subpixel data signal of described first output terminal Rn is transferred to the first data line D1.In the present embodiment, described first switch M1 is preferably nmos pass transistor, and its drain electrode connects described first output terminal Rn, and grid connects described control signal end B, and source electrode connects described first data line D1.
Described second switch M2 is connected between described first output terminal Rn and described 3rd data line D3, and according to described control signal conducting or shutoff.The switch motion of described second switch M2 is contrary with described first switch M1, such as described second switch M2 can be PMOS transistor, the switch motion different from described first switch M1 can be presented according to same control signal, now the source electrode of described second switch M2 connects described first output terminal Rn, grid connects described control signal end B, and drain electrode connects described 3rd data line D3.
Described 3rd switch M3 is connected between described 3rd output terminal Bn and described first data line D1, and according to described control signal conducting or shutoff.The switch motion of described 3rd switch M3 is also contrary with described first switch M1, such as described 3rd switch M3 can be PMOS transistor, the switch motion different from described first switch M1 can be presented according to same control signal, now the source electrode of described 3rd switch M3 connects described 3rd output terminal Bn, grid connects described control signal end B, and drain electrode then connects described first data line D1.
Described 4th switch M4 is connected between described 3rd output terminal Bn and described 3rd data line D3, and same according to described control signal conducting or shutoff.The switch motion of described 4th switch M4 is identical with described first switch M1, that is, described 4th switch M4 can be a nmos pass transistor, the now drain electrode of described 4th switch M4 connects described 3rd output terminal Bn, grid connects described control signal end B, and source electrode connects described 3rd data line D3.
Because described first switch M1 is identical with the switch motion of the 4th switch M4, be different from the switch motion of second switch M2 and the 3rd switch M3, therefore, be controlled by under same control signal, when the first switch M1 and the 4th switch M4 opens and second switch M2 and the 3rd switch M3 closes, described first output terminal Rn will export described red subpixel data signal will export described blue subpixel data signal to described 3rd data line D3 to described first data line D1, described 3rd output terminal Bn.Now, the pixel data in a pixel is transmitted by the order of R (red) → G (green) → B (indigo plant).Contrary, when described control signal changes, first switch M1 and the 4th switch M4 is closed and second switch M2 and the 3rd switch M3 opens time, described first output terminal Rn will export described red subpixel data signal will export described blue subpixel data signal to described first data line D1 to described 3rd data line D3, described 3rd output terminal Bn.Now, the sub-pixel data in a pixel is transmitted being transformed into the order of B (indigo plant) → G (green) → R (red).
Therefore, user simply by the output voltage changing control signal, can realize the circuit function that sub-pixel data exchanges.Because the switch element forming described source side fan-out area circuit can make in the lump when shaping picture element array structure, therefore the present invention does not need to increase the technique effect that extra data processing unit can reach R/Bswap, and then the versatility of product can be improved on the basis not increasing cost, finally improve product competitiveness.
The present invention also provides a kind of liquid crystal indicator, includes source electrode drive circuit as above, pel array and source side fan-out area circuit.
Present invention also offers the liquid crystal indicator comprising source electrode drive circuit as above, pel array and source side fan-out area circuit, its concrete structure describes in the circuit of above-mentioned source side fan-out area, repeats no more.
In sum, the present invention mainly first makes discontinuous grid line segment in gate electrode forming step, be shaped the bridgeware of the grid line segment being connected adjacent afterwards again in the forming step of data line and drain/source metal level simultaneously, bridgeware adopts low impedance metal material to make, the overall impedance of gate electrode line is declined, and then the problem of signal RC delays of existing LTPS thin-film transistor element can be improved, and then increase the response speed of display panels, be conducive to the exploitation of high resolving power, large-sized LPTS panel.
The present invention is described by above-mentioned related embodiment, but above-described embodiment is only enforcement example of the present invention.Must it is noted that published embodiment limit the scope of the invention.On the contrary, be contained in the spirit of claims and the amendment of scope and impartial setting to be included in scope of the present invention.
Claims (10)
1. a source side fan-out area circuit, it is characterized in that: described source side fan-out area circuit is in order to be connected between one source pole driving circuit and a pel array, described source electrode drive circuit comprises the first output terminal, the second output terminal and the 3rd output terminal, respectively in order to export sub-pixel data signal, described pel array comprises the first data line, the second data line and the 3rd data line, and described source side fan-out area circuit comprises:
First switch, it is connected between described first output terminal and described first data line, and according to control signal conducting or a shutoff;
One second switch, it is connected between described first output terminal and described 3rd data line, and according to described control signal conducting or shutoff, its switch motion is contrary with described first switch;
One the 3rd switch, it is connected between described 3rd output terminal and described first data line, and according to described control signal conducting or shutoff, its switch motion is contrary with described first switch; And
One the 4th switch, it is connected between described 3rd output terminal and described 3rd data line, and according to described control signal conducting or shutoff, its switch motion is identical with described first switch.
2. source side fan-out area as claimed in claim 1 circuit, is characterized in that: also comprise a connecting line, is connected between described second output terminal and described second data line.
3. source side fan-out area as claimed in claim 1 circuit, it is characterized in that: when the first switch and the 4th switch open and second switch and the 3rd switch are closed time, described first output terminal exports a red subpixel data signal to described first data line, and described 3rd output terminal exports a blue subpixel data signal to described 3rd data line; When the first switch and the 4th switch close and second switch and the 3rd switch open time, described first output terminal exports a red subpixel data signal to described 3rd data line, and described 3rd output terminal exports a blue subpixel data signal to described first data line.
4. source side fan-out area as claimed in claim 1 circuit, is characterized in that: described first switch, second switch, the 3rd switch and the 4th switch are connected to a control signal end jointly to receive described control signal.
5. source side fan-out area as claimed in claim 4 circuit, is characterized in that: described first switch and the 4th switch are nmos pass transistor; Second switch and the 3rd switch are PMOS transistor.
6. source side fan-out area as claimed in claim 5 circuit, is characterized in that: the drain electrode of described first switch connects described first output terminal, and grid connects described control signal end, and source electrode connects described first data line; The source electrode of described second switch connects described first output terminal, and grid connects described control signal end, and drain electrode connects described 3rd data line; The source electrode of described 3rd switch connects described 3rd output terminal, and grid connects described control signal end, and drain electrode connects described first data line; The drain electrode of described 4th switch connects described 3rd output terminal, and grid connects described control signal end, and source electrode connects described 3rd data line.
7. a liquid crystal display, is characterized in that: comprising:
One source pole driving circuit, comprises at least one first output terminal, the second output terminal and the 3rd output terminal, respectively in order to export sub-pixel data signal;
One pel array, comprises at least one first data line, the second data line and the 3rd data line; And
Fan-out area, one source pole side circuit, is connected between one source pole driving circuit and a pel array, and comprises:
One first switch, it is connected between described first output terminal and described first data line, and according to control signal conducting or a shutoff;
One second switch, it is connected between described first output terminal and described 3rd data line, and according to described control signal conducting or shutoff, its switch motion is contrary with described first switch;
One the 3rd switch, it is connected between described 3rd output terminal and described first data line, and according to described control signal conducting or shutoff, its switch motion is contrary with described first switch; And
One the 4th switch, it is connected between described 3rd output terminal and described 3rd data line, and according to described control signal conducting or shutoff, its switch motion is identical with described first switch.
8. liquid crystal display as claimed in claim 7, is characterized in that: described source side fan-out area circuit also comprises a connecting line, is connected between described second output terminal and described second data line.
9. liquid crystal display as claimed in claim 7, it is characterized in that: when the first switch and the 4th switch open and second switch and the 3rd switch are closed time, described first output terminal exports a red subpixel data signal to described first data line, and described 3rd output terminal exports a blue subpixel data signal to described 3rd data line; When the first switch and the 4th switch close and second switch and the 3rd switch open time, described first output terminal exports a red subpixel data signal to described 3rd data line, and described 3rd output terminal exports a blue subpixel data signal to described first data line.
10. liquid crystal display as claimed in claim 7, is characterized in that: described first switch, second switch, the 3rd switch and the 4th switch are connected to a control signal end jointly to receive described control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510918482.3A CN105374332B (en) | 2015-12-10 | 2015-12-10 | liquid crystal display and its source side fan-out area circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510918482.3A CN105374332B (en) | 2015-12-10 | 2015-12-10 | liquid crystal display and its source side fan-out area circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105374332A true CN105374332A (en) | 2016-03-02 |
| CN105374332B CN105374332B (en) | 2017-11-17 |
Family
ID=55376466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510918482.3A Active CN105374332B (en) | 2015-12-10 | 2015-12-10 | liquid crystal display and its source side fan-out area circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105374332B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105609082A (en) * | 2016-03-30 | 2016-05-25 | 深圳市华星光电技术有限公司 | Data driver and liquid crystal display comprising same |
| CN107146587A (en) * | 2017-06-21 | 2017-09-08 | 昆山龙腾光电有限公司 | Source electrode drive circuit and display panel |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1222038A (en) * | 1997-12-31 | 1999-07-07 | 三星电子株式会社 | Ingress noise measuring device in data communication network using CATV network |
| JP2002185305A (en) * | 2000-12-18 | 2002-06-28 | Sony Corp | Voltage level converting circuit |
| CN1455383A (en) * | 2002-05-02 | 2003-11-12 | 索尼公司 | Display device and its driving method and portable terminal device |
| CN1222038C (en) * | 2001-12-13 | 2005-10-05 | 三菱电机株式会社 | Semiconductor circuit and semiconductor device |
| CN201159815Y (en) * | 2008-03-13 | 2008-12-03 | 天津力伟创科技有限公司 | LCOS image element unit circuit based on complementary MOS transistor |
| CN102117602A (en) * | 2009-12-31 | 2011-07-06 | 上海天马微电子有限公司 | Driving structure of display panel |
| US20130328758A1 (en) * | 2012-06-08 | 2013-12-12 | Apple Inc. | Differential active-matrix displays |
| CN103944553A (en) * | 2014-04-18 | 2014-07-23 | 京东方科技集团股份有限公司 | Output buffer, gate driving circuit and control method of gate driving circuit |
| JP2014179777A (en) * | 2013-03-14 | 2014-09-25 | Renesas Sp Drivers Inc | Output circuit, selection circuit, gate driver circuit, display device and matrix device |
| WO2014153523A1 (en) * | 2013-03-21 | 2014-09-25 | Pixtronix, Inc. | Display device |
-
2015
- 2015-12-10 CN CN201510918482.3A patent/CN105374332B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1222038A (en) * | 1997-12-31 | 1999-07-07 | 三星电子株式会社 | Ingress noise measuring device in data communication network using CATV network |
| JP2002185305A (en) * | 2000-12-18 | 2002-06-28 | Sony Corp | Voltage level converting circuit |
| CN1222038C (en) * | 2001-12-13 | 2005-10-05 | 三菱电机株式会社 | Semiconductor circuit and semiconductor device |
| CN1455383A (en) * | 2002-05-02 | 2003-11-12 | 索尼公司 | Display device and its driving method and portable terminal device |
| CN201159815Y (en) * | 2008-03-13 | 2008-12-03 | 天津力伟创科技有限公司 | LCOS image element unit circuit based on complementary MOS transistor |
| CN102117602A (en) * | 2009-12-31 | 2011-07-06 | 上海天马微电子有限公司 | Driving structure of display panel |
| US20130328758A1 (en) * | 2012-06-08 | 2013-12-12 | Apple Inc. | Differential active-matrix displays |
| JP2014179777A (en) * | 2013-03-14 | 2014-09-25 | Renesas Sp Drivers Inc | Output circuit, selection circuit, gate driver circuit, display device and matrix device |
| WO2014153523A1 (en) * | 2013-03-21 | 2014-09-25 | Pixtronix, Inc. | Display device |
| CN103944553A (en) * | 2014-04-18 | 2014-07-23 | 京东方科技集团股份有限公司 | Output buffer, gate driving circuit and control method of gate driving circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105609082A (en) * | 2016-03-30 | 2016-05-25 | 深圳市华星光电技术有限公司 | Data driver and liquid crystal display comprising same |
| US10269315B2 (en) | 2016-03-30 | 2019-04-23 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Data driver and liquid crystal display having the same |
| CN107146587A (en) * | 2017-06-21 | 2017-09-08 | 昆山龙腾光电有限公司 | Source electrode drive circuit and display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105374332B (en) | 2017-11-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102270509B (en) | Shift register circuit | |
| KR102275693B1 (en) | Selection circuit and display device having the same | |
| KR102233626B1 (en) | Display device | |
| US9672776B2 (en) | Driving circuits of liquid crystal panel and liquid crystal devices | |
| CN108335663A (en) | The driving method and display panel of display panel, display device | |
| CN104332150A (en) | Display panel and signal transmission method thereof | |
| CN103454823B (en) | A kind of array base palte and display panels | |
| CN103187038A (en) | Double-gate liquid crystal display device and driving method thereof | |
| CN107741660B (en) | Pixel driving framework, display panel and display device | |
| CN103544926A (en) | Liquid crystal display panel and display device | |
| KR20160009793A (en) | Display apparatus and method for driving the same | |
| CN103412427A (en) | Liquid crystal display panel | |
| CN104880875A (en) | Array substrate and liquid-crystal display panel | |
| CN106652930B (en) | Display panel and its data drive circuit and display device | |
| CN101620353A (en) | Liquid crystal display device and driving method of the same | |
| CN105096804A (en) | Display panel | |
| CN105425486A (en) | Array substrate and display panel | |
| KR20150022182A (en) | Display device | |
| CN103439809B (en) | Display panel and driving method thereof | |
| CN104062790A (en) | Display device and driving method thereof | |
| CN103901688A (en) | LCD panel | |
| CN103021366B (en) | The polarity reversal driving method of display panels, device and liquid crystal display | |
| KR102459705B1 (en) | Liquid crystal display device | |
| CN107765482A (en) | Array substrate and display panel applying same | |
| CN105374332A (en) | Liquid display and source electrode side fan-out area circuit thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |