CN104811082B - A kind of nanosecond rising edge pulse power supply - Google Patents
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Abstract
The present invention provides a kind of nanosecond rising edge pulse power supply, including the instruction generation unit being linked in sequence, communication unit, central control unit, NMOS driver elements and NMOS tube, NMOS tube receives the first driving voltage from NMOS driver elements and turned on, make diode operation in cut-off state, it is the voltage that 5~15V of DC adjustable elements are exported to control pulse output unit output high level voltage；And receive the second driving voltage from NMOS driver elements and turn off, make diode operation in conducting state, it is the voltage that 1.2~5V of DC adjustable elements are exported to control pulse output unit to export low level voltage.The present invention ensure that the pulse voltage rising time of pulse power output is less than 100ns, success rate is once trimmed to the integrated circuit of polysilicon fuse so as to be effectively ensured, and pulse width, pulse frequency, the high-level DC voltage of pulse and the low-level DC voltage of pulse power output can be adjusted, so as to reduce the production cost of high-precision integrated circuit.
Description
Technical Field
The invention belongs to the technical field of pulse power supplies, and particularly relates to a nanosecond rising edge pulse power supply applied to trimming of a high-precision integrated circuit (such as an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC)) with a polysilicon fuse.
Background
With the increasing requirements for high performance indexes of integrated circuits, the high precision requirements of the integrated circuits are becoming more and more obvious, and the trimming technology is a necessary means for realizing the high precision integrated circuits. Trimming techniques are widely used for trimming the accuracy of ADCs and DACs, the frequency of V/F (voltage to frequency) converters, the zero frequency of active filters, the offset voltage of operational amplifiers, various high-accuracy reference sources, and the like. The trimming technology in the integrated circuit design mainly aims at trimming the resistor and the resistor network (or the capacitor network), and different trimming technologies are adopted, so that the resistance value (or the capacitance value) can be increased or reduced.
The blowing condition of the polysilicon fuse is to ensure a certain current density (the current density refers to the amount of electricity passing through a certain unit area in a unit time), so the time of the rising edge of the power output pulse for trimming must be ensured to be sufficiently small (to ensure that the current density is sufficiently large). However, the inventor of the present invention has found that the conventional trimming power supply cannot guarantee that the time of the rising edge of the output pulse is less than 100ns, and therefore, the one-time trimming success of the polysilicon fuse cannot be effectively guaranteed. For some fuse structures, if one trimming fails, the second trimming correction cannot be performed, and the circuit is invalidated, thereby causing the yield reduction of high-precision integrated circuits, wasting resources and reducing economic benefits. And the width and frequency of the low level voltage, the high level voltage, the pulse output by the traditional trimming power supply are not convenient to adjust, so that trimming power supplies of different models are required for trimming integrated circuits with different voltage standards, and additional production cost is brought to the production of the integrated circuits.
Disclosure of Invention
The invention provides a novel nanosecond rising edge pulse power supply, aiming at the technical problems that the existing trimming power supply can not ensure that the rising edge time of an output pulse is less than 100ns, the one-time trimming success of an integrated circuit with a polysilicon fuse wire can not be effectively ensured, and the low level voltage, the high level voltage, the pulse width and the frequency output by the trimming power supply are inconvenient to adjust, so that the additional production cost is brought to the production of the integrated circuit.
In order to achieve the purpose, the invention adopts the following technical scheme:
a nanosecond rising edge pulse power supply comprises an instruction generation unit, a communication unit, a central control unit, an NMOS driving unit, an NMOS tube, a diode, a pulse output unit, a DC 5-15V adjustable unit and a DC 1.2-5V adjustable unit; wherein,
the instruction generating unit is used for generating a control signal instruction for controlling the on-off of the NMOS tube;
the communication unit receives the control signal command from the command generating unit, codes the control signal command and generates a control signal code stream which can be identified by the central control unit;
the central control unit receives the control signal code stream from the communication unit, analyzes the specific meaning of the control signal code stream according to an internal algorithm and generates a corresponding pulse control signal;
the NMOS driving unit receives a pulse control signal sent by the central control unit, generates a first driving voltage when the pulse control signal is at a high level, and generates a second driving voltage when the pulse control signal is at a low level;
the NMOS tube receives a first driving voltage from the NMOS driving unit and is conducted, so that the diode works in a cut-off state, and the pulse output unit is controlled to output a high-level voltage which is the voltage output by the DC 5-15V adjustable unit; and
and receiving a second driving voltage from the NMOS driving unit and switching off the second driving voltage to enable the diode to work in a conducting state, and controlling the pulse output unit to output a low-level voltage which is the voltage output by the DC 1.2-5V adjustable unit.
The nanosecond rising edge pulse power supply comprises an NMOS tube, wherein the NMOS tube can ensure that the rising edge time of pulse voltage output by the pulse power supply is less than 100ns, so that the one-time trimming success rate of an integrated circuit of a polysilicon fuse wire is effectively ensured, the pulse width and the pulse frequency output by the pulse power supply can be adjusted through an internal algorithm of a central control unit, meanwhile, the high-level direct-current voltage and the low-level direct-current voltage of pulse output by the pulse power supply can be adjusted within a certain range according to the characteristics of the actual trimming integrated circuit, and further, an integrated circuit trimming device is optimized, so that the production cost of a high-precision integrated circuit is reduced.
Further, the instruction generating unit is a PC, an embedded device or a board card.
Furthermore, the communication unit is an RS-232 interface, an RS-485 interface, an RS-422 interface or a USB interface.
Further, the central control unit is a single chip microcomputer, an ARM, a CPLD or an FPGA.
Further, an internal algorithm analysis module is arranged in the central control unit and used for analyzing the specific meaning of the control signal code stream and generating a corresponding pulse control signal.
Further, the NMOS driving unit is a MOSFET gate driver with a model MAX627, which is manufactured by the american letter corporation.
Furthermore, the NMOS transistor is an N-channel field effect transistor with the model number of IRF7413 produced by the American IR company.
Further, the pulse output unit is an SMA connector joint.
Further, the DC 1.2-5V adjustable unit comprises a first low-dropout linear regulator, a first potentiometer, a first inductor, a first capacitor and a second capacitor, wherein an adjusting end of the first low-dropout linear regulator is connected with one end of the first potentiometer, the other end of the first potentiometer is grounded, an output end of the first low-dropout linear regulator is connected with one end of the first inductor and one end of the first capacitor, the other end of the first inductor is connected with one end of the second capacitor and an anode of the diode, and the other end of the first capacitor is connected with the other end of the second capacitor and grounded.
Further, the DC 5-15V adjustable unit comprises a second low-dropout linear regulator, a second potentiometer, a second inductor, a third capacitor and a fourth capacitor, wherein the adjusting end of the second low-dropout linear regulator is connected with one end of the second potentiometer, the other end of the second potentiometer is grounded, the output end of the second low-dropout linear regulator is connected with one end of the second inductor and one end of the fourth capacitor, the other end of the second inductor is connected with one end of the third capacitor and the drain electrode of the NMOS tube, and the other end of the third capacitor is connected with the other end of the fourth capacitor and grounded.
Drawings
Fig. 1 is a block diagram of a nanosecond rising edge pulse power supply provided by the present invention.
Fig. 2 is a schematic circuit diagram of a nanosecond rising edge pulse power supply provided by the invention.
Fig. 3 is a schematic analysis flow diagram of an internal algorithm analysis module of the nanosecond rising edge pulse power supply provided by the invention.
Fig. 4 is a schematic diagram of a test curve of pulse output of the nanosecond rising edge pulse power supply provided by the invention when the load is 1000 mA.
In the figure, 1, an instruction generating unit; 2. a communication unit; 3. a central control unit; 4. an NMOS drive unit; 5. an NMOS tube; 6. a diode; 7. a pulse output unit; 8. a DC 5-15V adjustable unit; 9. and a DC 1.2-5V adjustable unit.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further explained below by combining the specific drawings.
Referring to fig. 1, the present invention provides a nanosecond rising edge pulse power supply, which includes an instruction generating unit 1, a communication unit 2, a central control unit 3, an NMOS driving unit 4, an NMOS transistor 5, a diode 6, a pulse output unit 7, a DC 5-15V adjustable unit 8, and a DC 1.2-5V adjustable unit 9; wherein,
the instruction generating unit 1 is used for generating a control signal instruction for controlling the on-off of the NMOS tube;
a communication unit 2 for receiving the control signal command from the command generating unit 1, encoding the control signal command, and generating a control signal code stream which can be recognized by the central control unit 3;
the central control unit 3 receives the control signal code stream from the communication unit 2, analyzes the specific meaning of the control signal code stream according to an internal algorithm and generates a corresponding pulse control signal;
the NMOS driving unit 4 receives the pulse control signal sent by the central control unit 3, generates a first driving voltage when the pulse control signal is at a high level, and generates a second driving voltage when the pulse control signal is at a low level;
the NMOS tube 5 receives the first driving voltage from the NMOS driving unit 4 and is conducted, so that the diode 6 works in a cut-off state, and the pulse output unit 7 is controlled to output high-level voltage which is the voltage output by the DC 5-15V adjustable unit 8; and
and receiving a second driving voltage from the NMOS driving unit 4, switching off the second driving voltage to enable the diode 6 to work in a conducting state, and controlling the pulse output unit 7 to output a low-level voltage which is the voltage output by the DC 1.2-5V adjustable unit 9.
The nanosecond rising edge pulse power supply comprises an NMOS tube, wherein the NMOS tube can ensure that the rising edge time of pulse voltage output by the pulse power supply is less than 100ns, so that the one-time trimming success rate of an integrated circuit of a polysilicon fuse wire is effectively ensured, the pulse width and the pulse frequency output by the pulse power supply can be adjusted through an internal algorithm of a central control unit, meanwhile, the high-level direct-current voltage and the low-level direct-current voltage of pulse output by the pulse power supply can be adjusted within a certain range according to the characteristics of the actual trimming integrated circuit, and further, an integrated circuit trimming device is optimized, so that the production cost of a high-precision integrated circuit is reduced.
As a specific embodiment, a schematic circuit diagram of the present invention is shown in fig. 2, in which the instruction generating unit 1, the communication unit 2, the central control unit 3, and the NMOS driving unit 4 are sequentially connected, an output end of the NMOS driving unit 4 is connected to a gate of an NMOS transistor 5, a drain of the NMOS transistor 5 is connected to a DC 5-15V adjustable unit 8, a source of the NMOS transistor 5 is connected to a cathode of a diode 6 and a pulse output unit 7, and an anode of the diode 6 is connected to a DC 1.2-5V adjustable unit 9.
As a specific embodiment, the instruction generating unit 1 is a PC, an embedded device or a board card, and generates a control signal instruction for controlling the on/off of the NMOS transistor 5; preferably, the instruction generating unit 1 is a PC, and the PC is a personal computer and can be connected with the communication unit 2 through a standard RS-232 cable.
As a specific embodiment, the communication unit 2 is an RS-232 interface, an RS-485 interface, an RS-422 interface or a USB interface; preferably, the communication unit 2 is an RS-232 standard serial port communication interface, and may specifically be a MAX232 single power level conversion chip manufactured by american national standards institute (MAXIM).
As a specific embodiment, the central control unit 3 is a single chip, an ARM, a CPLD (complex Programmable Logic Device), or an FPGA (Field-Programmable gate array); preferably, the central control unit 3 is a single chip microcomputer, specifically, a single chip microcomputer of an ATMEL company in the united states of america, of which the model is Atmega128, and the single chip microcomputer is provided with a programmable serial USART interface, a programmable I/O interface, a programmable Flash in a128 k-byte system and a 4 k-byte EEPROM, and supports JTAG interface programming; the communication unit 2 and the central control unit 3 can be connected through the serial USART interface, and the input end of the NMOS drive unit 4 and the central control unit 3 can be connected through the programmable I/O interface.
As a specific embodiment, an internal algorithm analysis module is arranged in the central control unit 3, and the internal algorithm analysis module is used for analyzing specific meanings of control signal code streams and generating corresponding pulse control signals; the internal algorithm is a method for parsing the communication protocol byte by byte, and a specific parsing flow of the internal algorithm parsing module is shown in fig. 3. Specifically, the byte transmission protocol of the data is asynchronous communication, the baud rate is 9600, 1 bit start bit, 8 bit data bit, 1 bit check bit (parity check), and 1 bit stop bit. The communication protocol content is as follows:
parameter setting data frame protocol format:
| ADDR | CTRL | LNG | FREQ_H | FREQ_L | HDC_H | HDC_L | CRC-1 | CRC-2 | EXT | SF |
output control command frame protocol format:
| ADDR | CTRL | SF |
the meaning of each byte representation in the protocol format is as follows:
ADDR: indicating the address of the pulsed power supply, in the range 00H-1 FH.
CTRL: indicating the type of the transmission command, 01H is a parameter setting data frame, and 02H is an output control command frame.
LNG: indicating the length of the parameter bytes.
FREQ _ H: a high byte representing the pulse frequency of the pulsed power supply output.
FREQ _ L: a low byte representing the pulse frequency of the pulsed power supply output.
HDC _ H: a pulse positive pulse width high byte representing the pulsed power supply output.
HDC _ L: a pulse positive pulse width low byte representing the pulsed power supply output.
The parameter setting data frame is initialized to zero by calculating the CRC value starting from the ADDR byte and ending at the HDC _ L byte using a standard CRC-16 check.
CRC-1: the low byte of the CRC-16 check.
CRC _ 2: CRC-16 checked high byte.
EXT and SF: indicating the end of the data frame, EXT is 06H and SF is FFH.
The parsing flow chart shown in fig. 3 is a parsing flow of the parsing module of the internal algorithm, after the central control unit receives the recognizable control signal code stream, the internal algorithm is started, starts to receive the first byte data ADDR, determines whether the first byte data is equal to the local address, and ends the internal algorithm flow if the first byte data is not equal to the local address; if equal, the reception of the second byte data CTRL is continued. Judging the type of the command represented by the second byte, if the type of the command is 02H, indicating that the command is an output control command frame, sending an output control signal, and then ending the internal algorithm flow; when the length is 01H, sequentially receiving data with the subsequent length of LNG bytes, then sequentially receiving data CRC-1 and CRC-2 and ending bytes EXT and SF of a data frame, then calculating a CRC value of the received data according to protocol specification by using standard CRC-16 check, and judging whether the lower byte of the calculated CRC value is the same as the CRC-1 value in the received data and whether the higher byte of the calculated CRC value is the same as the CRC-2 value in the received data, if not, ending the internal algorithm flow; if the high byte and the low byte are the same, the pulse frequency parameter and the positive pulse width parameter are extracted and the pulse control signal variable is given, the central control unit can generate a corresponding pulse control signal according to the updated parameter information, and then the internal algorithm is finished.
As a specific embodiment, the NMOS driving unit 4 is a MOSFET gate driver, and may specifically be a MOSFET gate driver with a model of MAX627, which is manufactured by the american and american letter company.
As a specific embodiment, the NMOS transistor 5 is an N-channel field effect transistor manufactured by IR corporation of usa and having a model of IRF7413, and the maximum value of the on-resistance of the transistor is 0.018 Ω and the continuous drain current is 13A when VGS is 5V; with a VDS of 15V and a drain persistent current of 7.3A, a typical value for the on-delay time is 8.6ns, a typical value for the rise time is 50ns, a typical value for the off-delay time is 52ns, and a typical value for the fall time is 46 ns. The rising edge time of the pulse voltage of the pulse power supply is mainly determined by the conduction delay time and the rising time of the NMOS tube, and the conduction delay time and the rising time of the NMOS tube are less than 100ns, so that the rising edge time of the pulse voltage of the nanosecond rising edge pulse power supply provided by the invention can be guaranteed to be less than 100 ns.
As a specific embodiment, due to the unidirectional conductivity of the diode 6, when the NMOS transistor 5 is turned on, the voltage of the pulse output unit 7 is higher than the output voltage of the DC 1.2-5V adjustable unit, that is, the positive voltage of the diode 6 is lower than the negative voltage, the diode 6 is turned off, and the pulse output unit 7 outputs a high-level voltage which is the voltage output by the DC 5-15V adjustable unit 8; when the NMOS transistor 5 is turned off, the voltage of the pulse output unit 7 is lower than the output voltage of the DC 1.2-5V adjustable unit, that is, the voltage at the positive end of the diode 6 is higher than the voltage at the negative end, the diode 6 is turned on, and the low level voltage output by the pulse output unit 7 is the voltage output by the DC 1.2-5V adjustable unit 9. Therefore, the diode 6 can always keep the low-level voltage output by the pulse output unit 7 to be the output voltage of the adjustable unit of DC 1.2-5V.
As a specific embodiment, the pulse output unit 7 is an SMA connector, and a nanosecond rising edge pulse power supply provided by the present invention is connected to a load through the SMA connector.
As a specific embodiment, referring to fig. 2, the DC 1.2-5V adjustable unit 9 includes a first low dropout regulator (LDO) U1, a first potentiometer R1, a first inductor L1, a first capacitor C1, and a second capacitor C2, wherein a regulation end of the first low dropout regulator U1 is connected to one end of the first potentiometer R1, the other end of the first potentiometer R1 is connected to GND, an output end of the first low dropout regulator U1 is connected to one end of the first inductor L1 and one end of the first capacitor C1, the other end of the first inductor L1 is connected to one end of the second capacitor C2 and the anode of the diode 6, and the other end of the first capacitor C1 is connected to the other end of the second capacitor C2 and connected to GND. In this embodiment, the first capacitor C1, the first inductor L1, and the second capacitor C2 form a pi-type filter, and the DC voltage output by the DC 1.2-5V adjustable unit can be changed by adjusting the resistance of the first potentiometer R1.
As a specific embodiment, referring to fig. 2, the DC 5-15V adjustable unit 8 includes a second low dropout regulator (LDO) U2, a second potentiometer R2, a second inductor L2, a third capacitor C3, and a fourth capacitor C4, wherein a regulation end of the second low dropout regulator U2 is connected to one end of the second potentiometer R2, the other end of the second potentiometer R2 is connected to the ground GND, an output end of the second low dropout regulator U2 is connected to one end of the second inductor L2 and one end of the fourth capacitor C4, the other end of the second inductor L2 is connected to one end of the third capacitor C3 and the drain of the NMOS transistor 5, and the other end of the third capacitor C3 and the other end of the fourth capacitor C4 are connected to the ground GND. In this embodiment, the third capacitor C3, the second inductor L2 and the fourth capacitor C4 form a pi-type filter, and the direct-current voltage output by the DC 5-15V adjustable unit can be changed by adjusting the resistance of the second potentiometer R2.
The output test curve of the nanosecond rising edge pulse power supply provided by the invention is shown in fig. 4, which represents the pulse output curve captured by an agilent oscilloscope when the load is 1000mA, and the test curve shows that the pulse output high-level direct current voltage is 10.95V, the pulse output low-level direct current voltage is 3.33V, and the pulse output rising edge time is 30ns (less than 100 ns).
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures made by using the contents of the present specification and the drawings can be directly or indirectly applied to other related technical fields, and are within the scope of the present invention.
Claims (9)
1. A nanosecond-level rising edge pulse power supply is characterized by comprising an instruction generating unit, a communication unit, a central control unit, an NMOS driving unit, an NMOS tube, a diode, a pulse output unit, a DC 5-15V adjustable unit and a DC 1.2-5V adjustable unit; wherein,
the instruction generating unit is used for generating a control signal instruction for controlling the on-off of the NMOS tube;
the communication unit receives the control signal command from the command generating unit, codes the control signal command and generates a control signal code stream which can be identified by the central control unit;
the central control unit receives the control signal code stream from the communication unit, analyzes the specific meaning of the control signal code stream according to an internal algorithm and generates a corresponding pulse control signal;
the NMOS driving unit receives a pulse control signal sent by the central control unit, generates a first driving voltage when the pulse control signal is at a high level, and generates a second driving voltage when the pulse control signal is at a low level;
the NMOS tube receives a first driving voltage from the NMOS driving unit and is conducted, so that the diode works in a cut-off state, and the pulse output unit is controlled to output a high-level voltage which is the voltage output by the DC 5-15V adjustable unit; and
receiving a second driving voltage from the NMOS driving unit and switching off the second driving voltage to enable the diode to work in a conducting state, and controlling the pulse output unit to output a low-level voltage which is a voltage output by the DC 1.2-5V adjustable unit;
the adjustable unit of DC 1.2 ~ 5V includes first low-dropout linear regulator, first potentiometre, first inductor, first condenser and second condenser, the regulation end of first low-dropout linear regulator is connected with the one end of first potentiometre, and the other end ground connection of first potentiometre, the output of first low-dropout linear regulator is connected with the one end of first inductor and the one end of first condenser, and the other end of first inductor is connected with the one end of second condenser and the positive pole of diode, and the other end of first condenser and the other end of second condenser are connected and ground connection.
2. The nanosecond rising edge pulsed power supply according to claim 1, wherein the instruction generating unit is a PC, an embedded device or a board.
3. The nanosecond rising edge pulse power supply according to claim 1, wherein the communication unit is an RS-232 interface, an RS-485 interface, an RS-422 interface or a USB interface.
4. The nanosecond level rising edge pulse power supply according to claim 1, wherein the central control unit is a single chip microcomputer, an ARM, a CPLD, or an FPGA.
5. The nanosecond level rising edge pulse power supply according to claim 1, wherein an internal algorithm analysis module is arranged in the central control unit, and the internal algorithm analysis module is used for analyzing specific meanings of control signal code streams to generate corresponding pulse control signals.
6. The nanosecond rising edge pulse power supply according to claim 1, wherein the NMOS driver unit is a MOSFET gate driver of MAX627, manufactured by the american letter corporation.
7. The nanosecond rising edge pulse power supply according to claim 1, wherein the NMOS transistor is an N-channel field effect transistor model IRF7413, manufactured by IR corporation, usa.
8. The nanosecond rising edge pulse power supply according to claim 1, wherein the pulse output unit is an SMA connector tab.
9. The nanosecond-level rising edge pulse power supply according to claim 1, wherein the DC 5-15V adjustable unit comprises a second low dropout linear regulator, a second potentiometer, a second inductor, a third capacitor and a fourth capacitor, wherein an adjusting end of the second low dropout linear regulator is connected with one end of the second potentiometer, the other end of the second potentiometer is grounded, an output end of the second low dropout linear regulator is connected with one end of the second inductor and one end of the fourth capacitor, the other end of the second inductor is connected with one end of the third capacitor and a drain electrode of the NMOS tube, and the other end of the third capacitor and the other end of the fourth capacitor are connected and grounded.
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| CN112165240B (en) * | 2020-08-27 | 2022-05-13 | 山东航天电子技术研究所 | Nanosecond high-voltage pulse switch driving circuit |
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| CN101047334A (en) * | 2006-03-31 | 2007-10-03 | 深圳市朗科科技有限公司 | Common power supply anti-interference power supply method and circuit for hand transmitting equipment |
| CN102185592A (en) * | 2011-01-27 | 2011-09-14 | 电子科技大学 | Level shift circuit |
| CN104467748A (en) * | 2014-11-11 | 2015-03-25 | 绵阳市维博电子有限责任公司 | Fast edge pulse generator based on optoelectronic isolation |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101047334A (en) * | 2006-03-31 | 2007-10-03 | 深圳市朗科科技有限公司 | Common power supply anti-interference power supply method and circuit for hand transmitting equipment |
| CN102185592A (en) * | 2011-01-27 | 2011-09-14 | 电子科技大学 | Level shift circuit |
| CN104467748A (en) * | 2014-11-11 | 2015-03-25 | 绵阳市维博电子有限责任公司 | Fast edge pulse generator based on optoelectronic isolation |
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